xref: /openbmc/linux/arch/x86/include/asm/kvm_host.h (revision 95e9fd10)
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This header defines architecture specific interfaces, x86 version
5  *
6  * This work is licensed under the terms of the GNU GPL, version 2.  See
7  * the COPYING file in the top-level directory.
8  *
9  */
10 
11 #ifndef _ASM_X86_KVM_HOST_H
12 #define _ASM_X86_KVM_HOST_H
13 
14 #include <linux/types.h>
15 #include <linux/mm.h>
16 #include <linux/mmu_notifier.h>
17 #include <linux/tracepoint.h>
18 #include <linux/cpumask.h>
19 #include <linux/irq_work.h>
20 
21 #include <linux/kvm.h>
22 #include <linux/kvm_para.h>
23 #include <linux/kvm_types.h>
24 #include <linux/perf_event.h>
25 
26 #include <asm/pvclock-abi.h>
27 #include <asm/desc.h>
28 #include <asm/mtrr.h>
29 #include <asm/msr-index.h>
30 #include <asm/asm.h>
31 
32 #define KVM_MAX_VCPUS 254
33 #define KVM_SOFT_MAX_VCPUS 160
34 #define KVM_MEMORY_SLOTS 32
35 /* memory slots that does not exposed to userspace */
36 #define KVM_PRIVATE_MEM_SLOTS 4
37 #define KVM_MEM_SLOTS_NUM (KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS)
38 
39 #define KVM_MMIO_SIZE 16
40 
41 #define KVM_PIO_PAGE_OFFSET 1
42 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
43 
44 #define CR0_RESERVED_BITS                                               \
45 	(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
46 			  | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
47 			  | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
48 
49 #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
50 #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
51 #define CR3_PCID_ENABLED_RESERVED_BITS 0xFFFFFF0000000000ULL
52 #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS |	\
53 				  0xFFFFFF0000000000ULL)
54 #define CR4_RESERVED_BITS                                               \
55 	(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
56 			  | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
57 			  | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
58 			  | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_RDWRGSFS \
59 			  | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
60 
61 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
62 
63 
64 
65 #define INVALID_PAGE (~(hpa_t)0)
66 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
67 
68 #define UNMAPPED_GVA (~(gpa_t)0)
69 
70 /* KVM Hugepage definitions for x86 */
71 #define KVM_NR_PAGE_SIZES	3
72 #define KVM_HPAGE_GFN_SHIFT(x)	(((x) - 1) * 9)
73 #define KVM_HPAGE_SHIFT(x)	(PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
74 #define KVM_HPAGE_SIZE(x)	(1UL << KVM_HPAGE_SHIFT(x))
75 #define KVM_HPAGE_MASK(x)	(~(KVM_HPAGE_SIZE(x) - 1))
76 #define KVM_PAGES_PER_HPAGE(x)	(KVM_HPAGE_SIZE(x) / PAGE_SIZE)
77 
78 #define DE_VECTOR 0
79 #define DB_VECTOR 1
80 #define BP_VECTOR 3
81 #define OF_VECTOR 4
82 #define BR_VECTOR 5
83 #define UD_VECTOR 6
84 #define NM_VECTOR 7
85 #define DF_VECTOR 8
86 #define TS_VECTOR 10
87 #define NP_VECTOR 11
88 #define SS_VECTOR 12
89 #define GP_VECTOR 13
90 #define PF_VECTOR 14
91 #define MF_VECTOR 16
92 #define MC_VECTOR 18
93 
94 #define SELECTOR_TI_MASK (1 << 2)
95 #define SELECTOR_RPL_MASK 0x03
96 
97 #define IOPL_SHIFT 12
98 
99 #define KVM_PERMILLE_MMU_PAGES 20
100 #define KVM_MIN_ALLOC_MMU_PAGES 64
101 #define KVM_MMU_HASH_SHIFT 10
102 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
103 #define KVM_MIN_FREE_MMU_PAGES 5
104 #define KVM_REFILL_PAGES 25
105 #define KVM_MAX_CPUID_ENTRIES 80
106 #define KVM_NR_FIXED_MTRR_REGION 88
107 #define KVM_NR_VAR_MTRR 8
108 
109 #define ASYNC_PF_PER_VCPU 64
110 
111 extern raw_spinlock_t kvm_lock;
112 extern struct list_head vm_list;
113 
114 struct kvm_vcpu;
115 struct kvm;
116 struct kvm_async_pf;
117 
118 enum kvm_reg {
119 	VCPU_REGS_RAX = 0,
120 	VCPU_REGS_RCX = 1,
121 	VCPU_REGS_RDX = 2,
122 	VCPU_REGS_RBX = 3,
123 	VCPU_REGS_RSP = 4,
124 	VCPU_REGS_RBP = 5,
125 	VCPU_REGS_RSI = 6,
126 	VCPU_REGS_RDI = 7,
127 #ifdef CONFIG_X86_64
128 	VCPU_REGS_R8 = 8,
129 	VCPU_REGS_R9 = 9,
130 	VCPU_REGS_R10 = 10,
131 	VCPU_REGS_R11 = 11,
132 	VCPU_REGS_R12 = 12,
133 	VCPU_REGS_R13 = 13,
134 	VCPU_REGS_R14 = 14,
135 	VCPU_REGS_R15 = 15,
136 #endif
137 	VCPU_REGS_RIP,
138 	NR_VCPU_REGS
139 };
140 
141 enum kvm_reg_ex {
142 	VCPU_EXREG_PDPTR = NR_VCPU_REGS,
143 	VCPU_EXREG_CR3,
144 	VCPU_EXREG_RFLAGS,
145 	VCPU_EXREG_CPL,
146 	VCPU_EXREG_SEGMENTS,
147 };
148 
149 enum {
150 	VCPU_SREG_ES,
151 	VCPU_SREG_CS,
152 	VCPU_SREG_SS,
153 	VCPU_SREG_DS,
154 	VCPU_SREG_FS,
155 	VCPU_SREG_GS,
156 	VCPU_SREG_TR,
157 	VCPU_SREG_LDTR,
158 };
159 
160 #include <asm/kvm_emulate.h>
161 
162 #define KVM_NR_MEM_OBJS 40
163 
164 #define KVM_NR_DB_REGS	4
165 
166 #define DR6_BD		(1 << 13)
167 #define DR6_BS		(1 << 14)
168 #define DR6_FIXED_1	0xffff0ff0
169 #define DR6_VOLATILE	0x0000e00f
170 
171 #define DR7_BP_EN_MASK	0x000000ff
172 #define DR7_GE		(1 << 9)
173 #define DR7_GD		(1 << 13)
174 #define DR7_FIXED_1	0x00000400
175 #define DR7_VOLATILE	0xffff23ff
176 
177 /* apic attention bits */
178 #define KVM_APIC_CHECK_VAPIC	0
179 /*
180  * The following bit is set with PV-EOI, unset on EOI.
181  * We detect PV-EOI changes by guest by comparing
182  * this bit with PV-EOI in guest memory.
183  * See the implementation in apic_update_pv_eoi.
184  */
185 #define KVM_APIC_PV_EOI_PENDING	1
186 
187 /*
188  * We don't want allocation failures within the mmu code, so we preallocate
189  * enough memory for a single page fault in a cache.
190  */
191 struct kvm_mmu_memory_cache {
192 	int nobjs;
193 	void *objects[KVM_NR_MEM_OBJS];
194 };
195 
196 /*
197  * kvm_mmu_page_role, below, is defined as:
198  *
199  *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
200  *   bits 4:7 - page table level for this shadow (1-4)
201  *   bits 8:9 - page table quadrant for 2-level guests
202  *   bit   16 - direct mapping of virtual to physical mapping at gfn
203  *              used for real mode and two-dimensional paging
204  *   bits 17:19 - common access permissions for all ptes in this shadow page
205  */
206 union kvm_mmu_page_role {
207 	unsigned word;
208 	struct {
209 		unsigned level:4;
210 		unsigned cr4_pae:1;
211 		unsigned quadrant:2;
212 		unsigned pad_for_nice_hex_output:6;
213 		unsigned direct:1;
214 		unsigned access:3;
215 		unsigned invalid:1;
216 		unsigned nxe:1;
217 		unsigned cr0_wp:1;
218 		unsigned smep_andnot_wp:1;
219 	};
220 };
221 
222 struct kvm_mmu_page {
223 	struct list_head link;
224 	struct hlist_node hash_link;
225 
226 	/*
227 	 * The following two entries are used to key the shadow page in the
228 	 * hash table.
229 	 */
230 	gfn_t gfn;
231 	union kvm_mmu_page_role role;
232 
233 	u64 *spt;
234 	/* hold the gfn of each spte inside spt */
235 	gfn_t *gfns;
236 	/*
237 	 * One bit set per slot which has memory
238 	 * in this shadow page.
239 	 */
240 	DECLARE_BITMAP(slot_bitmap, KVM_MEM_SLOTS_NUM);
241 	bool unsync;
242 	int root_count;          /* Currently serving as active root */
243 	unsigned int unsync_children;
244 	unsigned long parent_ptes;	/* Reverse mapping for parent_pte */
245 	DECLARE_BITMAP(unsync_child_bitmap, 512);
246 
247 #ifdef CONFIG_X86_32
248 	int clear_spte_count;
249 #endif
250 
251 	int write_flooding_count;
252 };
253 
254 struct kvm_pio_request {
255 	unsigned long count;
256 	int in;
257 	int port;
258 	int size;
259 };
260 
261 /*
262  * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
263  * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
264  * mode.
265  */
266 struct kvm_mmu {
267 	void (*new_cr3)(struct kvm_vcpu *vcpu);
268 	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
269 	unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
270 	u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
271 	int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
272 			  bool prefault);
273 	void (*inject_page_fault)(struct kvm_vcpu *vcpu,
274 				  struct x86_exception *fault);
275 	void (*free)(struct kvm_vcpu *vcpu);
276 	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
277 			    struct x86_exception *exception);
278 	gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
279 	int (*sync_page)(struct kvm_vcpu *vcpu,
280 			 struct kvm_mmu_page *sp);
281 	void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
282 	void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
283 			   u64 *spte, const void *pte);
284 	hpa_t root_hpa;
285 	int root_level;
286 	int shadow_root_level;
287 	union kvm_mmu_page_role base_role;
288 	bool direct_map;
289 
290 	u64 *pae_root;
291 	u64 *lm_root;
292 	u64 rsvd_bits_mask[2][4];
293 
294 	bool nx;
295 
296 	u64 pdptrs[4]; /* pae */
297 };
298 
299 enum pmc_type {
300 	KVM_PMC_GP = 0,
301 	KVM_PMC_FIXED,
302 };
303 
304 struct kvm_pmc {
305 	enum pmc_type type;
306 	u8 idx;
307 	u64 counter;
308 	u64 eventsel;
309 	struct perf_event *perf_event;
310 	struct kvm_vcpu *vcpu;
311 };
312 
313 struct kvm_pmu {
314 	unsigned nr_arch_gp_counters;
315 	unsigned nr_arch_fixed_counters;
316 	unsigned available_event_types;
317 	u64 fixed_ctr_ctrl;
318 	u64 global_ctrl;
319 	u64 global_status;
320 	u64 global_ovf_ctrl;
321 	u64 counter_bitmask[2];
322 	u64 global_ctrl_mask;
323 	u8 version;
324 	struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
325 	struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
326 	struct irq_work irq_work;
327 	u64 reprogram_pmi;
328 };
329 
330 struct kvm_vcpu_arch {
331 	/*
332 	 * rip and regs accesses must go through
333 	 * kvm_{register,rip}_{read,write} functions.
334 	 */
335 	unsigned long regs[NR_VCPU_REGS];
336 	u32 regs_avail;
337 	u32 regs_dirty;
338 
339 	unsigned long cr0;
340 	unsigned long cr0_guest_owned_bits;
341 	unsigned long cr2;
342 	unsigned long cr3;
343 	unsigned long cr4;
344 	unsigned long cr4_guest_owned_bits;
345 	unsigned long cr8;
346 	u32 hflags;
347 	u64 efer;
348 	u64 apic_base;
349 	struct kvm_lapic *apic;    /* kernel irqchip context */
350 	unsigned long apic_attention;
351 	int32_t apic_arb_prio;
352 	int mp_state;
353 	int sipi_vector;
354 	u64 ia32_misc_enable_msr;
355 	bool tpr_access_reporting;
356 
357 	/*
358 	 * Paging state of the vcpu
359 	 *
360 	 * If the vcpu runs in guest mode with two level paging this still saves
361 	 * the paging mode of the l1 guest. This context is always used to
362 	 * handle faults.
363 	 */
364 	struct kvm_mmu mmu;
365 
366 	/*
367 	 * Paging state of an L2 guest (used for nested npt)
368 	 *
369 	 * This context will save all necessary information to walk page tables
370 	 * of the an L2 guest. This context is only initialized for page table
371 	 * walking and not for faulting since we never handle l2 page faults on
372 	 * the host.
373 	 */
374 	struct kvm_mmu nested_mmu;
375 
376 	/*
377 	 * Pointer to the mmu context currently used for
378 	 * gva_to_gpa translations.
379 	 */
380 	struct kvm_mmu *walk_mmu;
381 
382 	struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
383 	struct kvm_mmu_memory_cache mmu_page_cache;
384 	struct kvm_mmu_memory_cache mmu_page_header_cache;
385 
386 	struct fpu guest_fpu;
387 	u64 xcr0;
388 
389 	struct kvm_pio_request pio;
390 	void *pio_data;
391 
392 	u8 event_exit_inst_len;
393 
394 	struct kvm_queued_exception {
395 		bool pending;
396 		bool has_error_code;
397 		bool reinject;
398 		u8 nr;
399 		u32 error_code;
400 	} exception;
401 
402 	struct kvm_queued_interrupt {
403 		bool pending;
404 		bool soft;
405 		u8 nr;
406 	} interrupt;
407 
408 	int halt_request; /* real mode on Intel only */
409 
410 	int cpuid_nent;
411 	struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
412 	/* emulate context */
413 
414 	struct x86_emulate_ctxt emulate_ctxt;
415 	bool emulate_regs_need_sync_to_vcpu;
416 	bool emulate_regs_need_sync_from_vcpu;
417 
418 	gpa_t time;
419 	struct pvclock_vcpu_time_info hv_clock;
420 	unsigned int hw_tsc_khz;
421 	unsigned int time_offset;
422 	struct page *time_page;
423 
424 	struct {
425 		u64 msr_val;
426 		u64 last_steal;
427 		u64 accum_steal;
428 		struct gfn_to_hva_cache stime;
429 		struct kvm_steal_time steal;
430 	} st;
431 
432 	u64 last_guest_tsc;
433 	u64 last_kernel_ns;
434 	u64 last_host_tsc;
435 	u64 tsc_offset_adjustment;
436 	u64 this_tsc_nsec;
437 	u64 this_tsc_write;
438 	u8  this_tsc_generation;
439 	bool tsc_catchup;
440 	bool tsc_always_catchup;
441 	s8 virtual_tsc_shift;
442 	u32 virtual_tsc_mult;
443 	u32 virtual_tsc_khz;
444 
445 	atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */
446 	unsigned nmi_pending; /* NMI queued after currently running handler */
447 	bool nmi_injected;    /* Trying to inject an NMI this entry */
448 
449 	struct mtrr_state_type mtrr_state;
450 	u32 pat;
451 
452 	int switch_db_regs;
453 	unsigned long db[KVM_NR_DB_REGS];
454 	unsigned long dr6;
455 	unsigned long dr7;
456 	unsigned long eff_db[KVM_NR_DB_REGS];
457 
458 	u64 mcg_cap;
459 	u64 mcg_status;
460 	u64 mcg_ctl;
461 	u64 *mce_banks;
462 
463 	/* Cache MMIO info */
464 	u64 mmio_gva;
465 	unsigned access;
466 	gfn_t mmio_gfn;
467 
468 	struct kvm_pmu pmu;
469 
470 	/* used for guest single stepping over the given code position */
471 	unsigned long singlestep_rip;
472 
473 	/* fields used by HYPER-V emulation */
474 	u64 hv_vapic;
475 
476 	cpumask_var_t wbinvd_dirty_mask;
477 
478 	unsigned long last_retry_eip;
479 	unsigned long last_retry_addr;
480 
481 	struct {
482 		bool halted;
483 		gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
484 		struct gfn_to_hva_cache data;
485 		u64 msr_val;
486 		u32 id;
487 		bool send_user_only;
488 	} apf;
489 
490 	/* OSVW MSRs (AMD only) */
491 	struct {
492 		u64 length;
493 		u64 status;
494 	} osvw;
495 
496 	struct {
497 		u64 msr_val;
498 		struct gfn_to_hva_cache data;
499 	} pv_eoi;
500 };
501 
502 struct kvm_lpage_info {
503 	unsigned long rmap_pde;
504 	int write_count;
505 };
506 
507 struct kvm_arch_memory_slot {
508 	struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
509 };
510 
511 struct kvm_arch {
512 	unsigned int n_used_mmu_pages;
513 	unsigned int n_requested_mmu_pages;
514 	unsigned int n_max_mmu_pages;
515 	unsigned int indirect_shadow_pages;
516 	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
517 	/*
518 	 * Hash table of struct kvm_mmu_page.
519 	 */
520 	struct list_head active_mmu_pages;
521 	struct list_head assigned_dev_head;
522 	struct iommu_domain *iommu_domain;
523 	int iommu_flags;
524 	struct kvm_pic *vpic;
525 	struct kvm_ioapic *vioapic;
526 	struct kvm_pit *vpit;
527 	int vapics_in_nmi_mode;
528 
529 	unsigned int tss_addr;
530 	struct page *apic_access_page;
531 
532 	gpa_t wall_clock;
533 
534 	struct page *ept_identity_pagetable;
535 	bool ept_identity_pagetable_done;
536 	gpa_t ept_identity_map_addr;
537 
538 	unsigned long irq_sources_bitmap;
539 	s64 kvmclock_offset;
540 	raw_spinlock_t tsc_write_lock;
541 	u64 last_tsc_nsec;
542 	u64 last_tsc_write;
543 	u32 last_tsc_khz;
544 	u64 cur_tsc_nsec;
545 	u64 cur_tsc_write;
546 	u64 cur_tsc_offset;
547 	u8  cur_tsc_generation;
548 
549 	struct kvm_xen_hvm_config xen_hvm_config;
550 
551 	/* fields used by HYPER-V emulation */
552 	u64 hv_guest_os_id;
553 	u64 hv_hypercall;
554 
555 	#ifdef CONFIG_KVM_MMU_AUDIT
556 	int audit_point;
557 	#endif
558 };
559 
560 struct kvm_vm_stat {
561 	u32 mmu_shadow_zapped;
562 	u32 mmu_pte_write;
563 	u32 mmu_pte_updated;
564 	u32 mmu_pde_zapped;
565 	u32 mmu_flooded;
566 	u32 mmu_recycled;
567 	u32 mmu_cache_miss;
568 	u32 mmu_unsync;
569 	u32 remote_tlb_flush;
570 	u32 lpages;
571 };
572 
573 struct kvm_vcpu_stat {
574 	u32 pf_fixed;
575 	u32 pf_guest;
576 	u32 tlb_flush;
577 	u32 invlpg;
578 
579 	u32 exits;
580 	u32 io_exits;
581 	u32 mmio_exits;
582 	u32 signal_exits;
583 	u32 irq_window_exits;
584 	u32 nmi_window_exits;
585 	u32 halt_exits;
586 	u32 halt_wakeup;
587 	u32 request_irq_exits;
588 	u32 irq_exits;
589 	u32 host_state_reload;
590 	u32 efer_reload;
591 	u32 fpu_reload;
592 	u32 insn_emulation;
593 	u32 insn_emulation_fail;
594 	u32 hypercalls;
595 	u32 irq_injections;
596 	u32 nmi_injections;
597 };
598 
599 struct x86_instruction_info;
600 
601 struct kvm_x86_ops {
602 	int (*cpu_has_kvm_support)(void);          /* __init */
603 	int (*disabled_by_bios)(void);             /* __init */
604 	int (*hardware_enable)(void *dummy);
605 	void (*hardware_disable)(void *dummy);
606 	void (*check_processor_compatibility)(void *rtn);
607 	int (*hardware_setup)(void);               /* __init */
608 	void (*hardware_unsetup)(void);            /* __exit */
609 	bool (*cpu_has_accelerated_tpr)(void);
610 	void (*cpuid_update)(struct kvm_vcpu *vcpu);
611 
612 	/* Create, but do not attach this VCPU */
613 	struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
614 	void (*vcpu_free)(struct kvm_vcpu *vcpu);
615 	int (*vcpu_reset)(struct kvm_vcpu *vcpu);
616 
617 	void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
618 	void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
619 	void (*vcpu_put)(struct kvm_vcpu *vcpu);
620 
621 	void (*set_guest_debug)(struct kvm_vcpu *vcpu,
622 				struct kvm_guest_debug *dbg);
623 	int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
624 	int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
625 	u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
626 	void (*get_segment)(struct kvm_vcpu *vcpu,
627 			    struct kvm_segment *var, int seg);
628 	int (*get_cpl)(struct kvm_vcpu *vcpu);
629 	void (*set_segment)(struct kvm_vcpu *vcpu,
630 			    struct kvm_segment *var, int seg);
631 	void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
632 	void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
633 	void (*decache_cr3)(struct kvm_vcpu *vcpu);
634 	void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
635 	void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
636 	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
637 	int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
638 	void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
639 	void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
640 	void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
641 	void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
642 	void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
643 	void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
644 	void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
645 	unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
646 	void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
647 	void (*fpu_activate)(struct kvm_vcpu *vcpu);
648 	void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
649 
650 	void (*tlb_flush)(struct kvm_vcpu *vcpu);
651 
652 	void (*run)(struct kvm_vcpu *vcpu);
653 	int (*handle_exit)(struct kvm_vcpu *vcpu);
654 	void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
655 	void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
656 	u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
657 	void (*patch_hypercall)(struct kvm_vcpu *vcpu,
658 				unsigned char *hypercall_addr);
659 	void (*set_irq)(struct kvm_vcpu *vcpu);
660 	void (*set_nmi)(struct kvm_vcpu *vcpu);
661 	void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
662 				bool has_error_code, u32 error_code,
663 				bool reinject);
664 	void (*cancel_injection)(struct kvm_vcpu *vcpu);
665 	int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
666 	int (*nmi_allowed)(struct kvm_vcpu *vcpu);
667 	bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
668 	void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
669 	void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
670 	void (*enable_irq_window)(struct kvm_vcpu *vcpu);
671 	void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
672 	int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
673 	int (*get_tdp_level)(void);
674 	u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
675 	int (*get_lpage_level)(void);
676 	bool (*rdtscp_supported)(void);
677 	bool (*invpcid_supported)(void);
678 	void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
679 
680 	void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
681 
682 	void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
683 
684 	bool (*has_wbinvd_exit)(void);
685 
686 	void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
687 	void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
688 
689 	u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
690 	u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu);
691 
692 	void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
693 
694 	int (*check_intercept)(struct kvm_vcpu *vcpu,
695 			       struct x86_instruction_info *info,
696 			       enum x86_intercept_stage stage);
697 };
698 
699 struct kvm_arch_async_pf {
700 	u32 token;
701 	gfn_t gfn;
702 	unsigned long cr3;
703 	bool direct_map;
704 };
705 
706 extern struct kvm_x86_ops *kvm_x86_ops;
707 
708 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
709 					   s64 adjustment)
710 {
711 	kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
712 }
713 
714 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
715 {
716 	kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
717 }
718 
719 int kvm_mmu_module_init(void);
720 void kvm_mmu_module_exit(void);
721 
722 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
723 int kvm_mmu_create(struct kvm_vcpu *vcpu);
724 int kvm_mmu_setup(struct kvm_vcpu *vcpu);
725 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
726 		u64 dirty_mask, u64 nx_mask, u64 x_mask);
727 
728 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
729 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
730 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
731 				     struct kvm_memory_slot *slot,
732 				     gfn_t gfn_offset, unsigned long mask);
733 void kvm_mmu_zap_all(struct kvm *kvm);
734 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
735 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
736 
737 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
738 
739 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
740 			  const void *val, int bytes);
741 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
742 
743 extern bool tdp_enabled;
744 
745 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
746 
747 /* control of guest tsc rate supported? */
748 extern bool kvm_has_tsc_control;
749 /* minimum supported tsc_khz for guests */
750 extern u32  kvm_min_guest_tsc_khz;
751 /* maximum supported tsc_khz for guests */
752 extern u32  kvm_max_guest_tsc_khz;
753 
754 enum emulation_result {
755 	EMULATE_DONE,       /* no further processing */
756 	EMULATE_DO_MMIO,      /* kvm_run filled with mmio request */
757 	EMULATE_FAIL,         /* can't emulate this instruction */
758 };
759 
760 #define EMULTYPE_NO_DECODE	    (1 << 0)
761 #define EMULTYPE_TRAP_UD	    (1 << 1)
762 #define EMULTYPE_SKIP		    (1 << 2)
763 #define EMULTYPE_RETRY		    (1 << 3)
764 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
765 			    int emulation_type, void *insn, int insn_len);
766 
767 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
768 			int emulation_type)
769 {
770 	return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
771 }
772 
773 void kvm_enable_efer_bits(u64);
774 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
775 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
776 
777 struct x86_emulate_ctxt;
778 
779 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
780 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
781 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
782 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
783 
784 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
785 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
786 
787 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
788 		    int reason, bool has_error_code, u32 error_code);
789 
790 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
791 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
792 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
793 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
794 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
795 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
796 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
797 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
798 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
799 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
800 
801 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
802 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
803 
804 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
805 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
806 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
807 
808 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
809 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
810 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
811 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
812 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
813 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
814 			    gfn_t gfn, void *data, int offset, int len,
815 			    u32 access);
816 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
817 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
818 
819 static inline int __kvm_irq_line_state(unsigned long *irq_state,
820 				       int irq_source_id, int level)
821 {
822 	/* Logical OR for level trig interrupt */
823 	if (level)
824 		__set_bit(irq_source_id, irq_state);
825 	else
826 		__clear_bit(irq_source_id, irq_state);
827 
828 	return !!(*irq_state);
829 }
830 
831 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
832 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
833 
834 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
835 
836 int fx_init(struct kvm_vcpu *vcpu);
837 
838 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
839 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
840 		       const u8 *new, int bytes);
841 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
842 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
843 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
844 int kvm_mmu_load(struct kvm_vcpu *vcpu);
845 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
846 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
847 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
848 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
849 			      struct x86_exception *exception);
850 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
851 			       struct x86_exception *exception);
852 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
853 			       struct x86_exception *exception);
854 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
855 				struct x86_exception *exception);
856 
857 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
858 
859 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
860 		       void *insn, int insn_len);
861 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
862 
863 void kvm_enable_tdp(void);
864 void kvm_disable_tdp(void);
865 
866 int complete_pio(struct kvm_vcpu *vcpu);
867 bool kvm_check_iopl(struct kvm_vcpu *vcpu);
868 
869 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
870 {
871 	return gpa;
872 }
873 
874 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
875 {
876 	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
877 
878 	return (struct kvm_mmu_page *)page_private(page);
879 }
880 
881 static inline u16 kvm_read_ldt(void)
882 {
883 	u16 ldt;
884 	asm("sldt %0" : "=g"(ldt));
885 	return ldt;
886 }
887 
888 static inline void kvm_load_ldt(u16 sel)
889 {
890 	asm("lldt %0" : : "rm"(sel));
891 }
892 
893 #ifdef CONFIG_X86_64
894 static inline unsigned long read_msr(unsigned long msr)
895 {
896 	u64 value;
897 
898 	rdmsrl(msr, value);
899 	return value;
900 }
901 #endif
902 
903 static inline u32 get_rdx_init_val(void)
904 {
905 	return 0x600; /* P6 family */
906 }
907 
908 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
909 {
910 	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
911 }
912 
913 #define TSS_IOPB_BASE_OFFSET 0x66
914 #define TSS_BASE_SIZE 0x68
915 #define TSS_IOPB_SIZE (65536 / 8)
916 #define TSS_REDIRECTION_SIZE (256 / 8)
917 #define RMODE_TSS_SIZE							\
918 	(TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
919 
920 enum {
921 	TASK_SWITCH_CALL = 0,
922 	TASK_SWITCH_IRET = 1,
923 	TASK_SWITCH_JMP = 2,
924 	TASK_SWITCH_GATE = 3,
925 };
926 
927 #define HF_GIF_MASK		(1 << 0)
928 #define HF_HIF_MASK		(1 << 1)
929 #define HF_VINTR_MASK		(1 << 2)
930 #define HF_NMI_MASK		(1 << 3)
931 #define HF_IRET_MASK		(1 << 4)
932 #define HF_GUEST_MASK		(1 << 5) /* VCPU is in guest-mode */
933 
934 /*
935  * Hardware virtualization extension instructions may fault if a
936  * reboot turns off virtualization while processes are running.
937  * Trap the fault and ignore the instruction if that happens.
938  */
939 asmlinkage void kvm_spurious_fault(void);
940 extern bool kvm_rebooting;
941 
942 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn)	\
943 	"666: " insn "\n\t" \
944 	"668: \n\t"                           \
945 	".pushsection .fixup, \"ax\" \n" \
946 	"667: \n\t" \
947 	cleanup_insn "\n\t"		      \
948 	"cmpb $0, kvm_rebooting \n\t"	      \
949 	"jne 668b \n\t"      		      \
950 	__ASM_SIZE(push) " $666b \n\t"	      \
951 	"call kvm_spurious_fault \n\t"	      \
952 	".popsection \n\t" \
953 	_ASM_EXTABLE(666b, 667b)
954 
955 #define __kvm_handle_fault_on_reboot(insn)		\
956 	____kvm_handle_fault_on_reboot(insn, "")
957 
958 #define KVM_ARCH_WANT_MMU_NOTIFIER
959 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
960 int kvm_age_hva(struct kvm *kvm, unsigned long hva);
961 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
962 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
963 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
964 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
965 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
966 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
967 
968 void kvm_define_shared_msr(unsigned index, u32 msr);
969 void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
970 
971 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
972 
973 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
974 				     struct kvm_async_pf *work);
975 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
976 				 struct kvm_async_pf *work);
977 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
978 			       struct kvm_async_pf *work);
979 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
980 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
981 
982 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
983 
984 int kvm_is_in_guest(void);
985 
986 void kvm_pmu_init(struct kvm_vcpu *vcpu);
987 void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
988 void kvm_pmu_reset(struct kvm_vcpu *vcpu);
989 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);
990 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);
991 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
992 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
993 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
994 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);
995 void kvm_deliver_pmi(struct kvm_vcpu *vcpu);
996 
997 #endif /* _ASM_X86_KVM_HOST_H */
998