1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 /* memory slots that are not exposed to userspace */ 44 #define KVM_PRIVATE_MEM_SLOTS 3 45 46 #define KVM_HALT_POLL_NS_DEFAULT 200000 47 48 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 49 50 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 51 KVM_DIRTY_LOG_INITIALLY_SET) 52 53 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \ 54 KVM_BUS_LOCK_DETECTION_EXIT) 55 56 /* x86-specific vcpu->requests bit members */ 57 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 58 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 59 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 60 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 61 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 62 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 63 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 64 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 65 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 66 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 67 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 68 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 69 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 70 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 71 #define KVM_REQ_MCLOCK_INPROGRESS \ 72 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 73 #define KVM_REQ_SCAN_IOAPIC \ 74 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 75 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 76 #define KVM_REQ_APIC_PAGE_RELOAD \ 77 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 78 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 79 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 80 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 81 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 82 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 83 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 84 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 85 #define KVM_REQ_APICV_UPDATE \ 86 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 87 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 88 #define KVM_REQ_HV_TLB_FLUSH \ 89 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_NO_WAKEUP) 90 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 91 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 92 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \ 93 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 94 95 #define CR0_RESERVED_BITS \ 96 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 97 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 98 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 99 100 #define CR4_RESERVED_BITS \ 101 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 102 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 103 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 104 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 105 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 106 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 107 108 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 109 110 111 112 #define INVALID_PAGE (~(hpa_t)0) 113 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 114 115 #define UNMAPPED_GVA (~(gpa_t)0) 116 117 /* KVM Hugepage definitions for x86 */ 118 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 119 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 120 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 121 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 122 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 123 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 124 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 125 126 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 127 { 128 /* KVM_HPAGE_GFN_SHIFT(PG_LEVEL_4K) must be 0. */ 129 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 130 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 131 } 132 133 #define KVM_PERMILLE_MMU_PAGES 20 134 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 135 #define KVM_MMU_HASH_SHIFT 12 136 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 137 #define KVM_MIN_FREE_MMU_PAGES 5 138 #define KVM_REFILL_PAGES 25 139 #define KVM_MAX_CPUID_ENTRIES 256 140 #define KVM_NR_FIXED_MTRR_REGION 88 141 #define KVM_NR_VAR_MTRR 8 142 143 #define ASYNC_PF_PER_VCPU 64 144 145 enum kvm_reg { 146 VCPU_REGS_RAX = __VCPU_REGS_RAX, 147 VCPU_REGS_RCX = __VCPU_REGS_RCX, 148 VCPU_REGS_RDX = __VCPU_REGS_RDX, 149 VCPU_REGS_RBX = __VCPU_REGS_RBX, 150 VCPU_REGS_RSP = __VCPU_REGS_RSP, 151 VCPU_REGS_RBP = __VCPU_REGS_RBP, 152 VCPU_REGS_RSI = __VCPU_REGS_RSI, 153 VCPU_REGS_RDI = __VCPU_REGS_RDI, 154 #ifdef CONFIG_X86_64 155 VCPU_REGS_R8 = __VCPU_REGS_R8, 156 VCPU_REGS_R9 = __VCPU_REGS_R9, 157 VCPU_REGS_R10 = __VCPU_REGS_R10, 158 VCPU_REGS_R11 = __VCPU_REGS_R11, 159 VCPU_REGS_R12 = __VCPU_REGS_R12, 160 VCPU_REGS_R13 = __VCPU_REGS_R13, 161 VCPU_REGS_R14 = __VCPU_REGS_R14, 162 VCPU_REGS_R15 = __VCPU_REGS_R15, 163 #endif 164 VCPU_REGS_RIP, 165 NR_VCPU_REGS, 166 167 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 168 VCPU_EXREG_CR0, 169 VCPU_EXREG_CR3, 170 VCPU_EXREG_CR4, 171 VCPU_EXREG_RFLAGS, 172 VCPU_EXREG_SEGMENTS, 173 VCPU_EXREG_EXIT_INFO_1, 174 VCPU_EXREG_EXIT_INFO_2, 175 }; 176 177 enum { 178 VCPU_SREG_ES, 179 VCPU_SREG_CS, 180 VCPU_SREG_SS, 181 VCPU_SREG_DS, 182 VCPU_SREG_FS, 183 VCPU_SREG_GS, 184 VCPU_SREG_TR, 185 VCPU_SREG_LDTR, 186 }; 187 188 enum exit_fastpath_completion { 189 EXIT_FASTPATH_NONE, 190 EXIT_FASTPATH_REENTER_GUEST, 191 EXIT_FASTPATH_EXIT_HANDLED, 192 }; 193 typedef enum exit_fastpath_completion fastpath_t; 194 195 struct x86_emulate_ctxt; 196 struct x86_exception; 197 enum x86_intercept; 198 enum x86_intercept_stage; 199 200 #define KVM_NR_DB_REGS 4 201 202 #define DR6_BD (1 << 13) 203 #define DR6_BS (1 << 14) 204 #define DR6_BT (1 << 15) 205 #define DR6_RTM (1 << 16) 206 /* 207 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits. 208 * We can regard all the bits in DR6_FIXED_1 as active_low bits; 209 * they will never be 0 for now, but when they are defined 210 * in the future it will require no code change. 211 * 212 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6. 213 */ 214 #define DR6_ACTIVE_LOW 0xffff0ff0 215 #define DR6_VOLATILE 0x0001e00f 216 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE) 217 218 #define DR7_BP_EN_MASK 0x000000ff 219 #define DR7_GE (1 << 9) 220 #define DR7_GD (1 << 13) 221 #define DR7_FIXED_1 0x00000400 222 #define DR7_VOLATILE 0xffff2bff 223 224 #define PFERR_PRESENT_BIT 0 225 #define PFERR_WRITE_BIT 1 226 #define PFERR_USER_BIT 2 227 #define PFERR_RSVD_BIT 3 228 #define PFERR_FETCH_BIT 4 229 #define PFERR_PK_BIT 5 230 #define PFERR_GUEST_FINAL_BIT 32 231 #define PFERR_GUEST_PAGE_BIT 33 232 233 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 234 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 235 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 236 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 237 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 238 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 239 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 240 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 241 242 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 243 PFERR_WRITE_MASK | \ 244 PFERR_PRESENT_MASK) 245 246 /* apic attention bits */ 247 #define KVM_APIC_CHECK_VAPIC 0 248 /* 249 * The following bit is set with PV-EOI, unset on EOI. 250 * We detect PV-EOI changes by guest by comparing 251 * this bit with PV-EOI in guest memory. 252 * See the implementation in apic_update_pv_eoi. 253 */ 254 #define KVM_APIC_PV_EOI_PENDING 1 255 256 struct kvm_kernel_irq_routing_entry; 257 258 /* 259 * the pages used as guest page table on soft mmu are tracked by 260 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 261 * by indirect shadow page can not be more than 15 bits. 262 * 263 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 264 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 265 */ 266 union kvm_mmu_page_role { 267 u32 word; 268 struct { 269 unsigned level:4; 270 unsigned gpte_is_8_bytes:1; 271 unsigned quadrant:2; 272 unsigned direct:1; 273 unsigned access:3; 274 unsigned invalid:1; 275 unsigned nxe:1; 276 unsigned cr0_wp:1; 277 unsigned smep_andnot_wp:1; 278 unsigned smap_andnot_wp:1; 279 unsigned ad_disabled:1; 280 unsigned guest_mode:1; 281 unsigned :6; 282 283 /* 284 * This is left at the top of the word so that 285 * kvm_memslots_for_spte_role can extract it with a 286 * simple shift. While there is room, give it a whole 287 * byte so it is also faster to load it from memory. 288 */ 289 unsigned smm:8; 290 }; 291 }; 292 293 union kvm_mmu_extended_role { 294 /* 295 * This structure complements kvm_mmu_page_role caching everything needed for 296 * MMU configuration. If nothing in both these structures changed, MMU 297 * re-configuration can be skipped. @valid bit is set on first usage so we don't 298 * treat all-zero structure as valid data. 299 */ 300 u32 word; 301 struct { 302 unsigned int valid:1; 303 unsigned int execonly:1; 304 unsigned int cr0_pg:1; 305 unsigned int cr4_pae:1; 306 unsigned int cr4_pse:1; 307 unsigned int cr4_pke:1; 308 unsigned int cr4_smap:1; 309 unsigned int cr4_smep:1; 310 unsigned int maxphyaddr:6; 311 }; 312 }; 313 314 union kvm_mmu_role { 315 u64 as_u64; 316 struct { 317 union kvm_mmu_page_role base; 318 union kvm_mmu_extended_role ext; 319 }; 320 }; 321 322 struct kvm_rmap_head { 323 unsigned long val; 324 }; 325 326 struct kvm_pio_request { 327 unsigned long linear_rip; 328 unsigned long count; 329 int in; 330 int port; 331 int size; 332 }; 333 334 #define PT64_ROOT_MAX_LEVEL 5 335 336 struct rsvd_bits_validate { 337 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 338 u64 bad_mt_xwr; 339 }; 340 341 struct kvm_mmu_root_info { 342 gpa_t pgd; 343 hpa_t hpa; 344 }; 345 346 #define KVM_MMU_ROOT_INFO_INVALID \ 347 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 348 349 #define KVM_MMU_NUM_PREV_ROOTS 3 350 351 #define KVM_HAVE_MMU_RWLOCK 352 353 struct kvm_mmu_page; 354 355 /* 356 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 357 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 358 * current mmu mode. 359 */ 360 struct kvm_mmu { 361 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 362 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 363 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err, 364 bool prefault); 365 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 366 struct x86_exception *fault); 367 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 368 u32 access, struct x86_exception *exception); 369 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 370 struct x86_exception *exception); 371 int (*sync_page)(struct kvm_vcpu *vcpu, 372 struct kvm_mmu_page *sp); 373 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 374 hpa_t root_hpa; 375 gpa_t root_pgd; 376 union kvm_mmu_role mmu_role; 377 u8 root_level; 378 u8 shadow_root_level; 379 u8 ept_ad; 380 bool direct_map; 381 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 382 383 /* 384 * Bitmap; bit set = permission fault 385 * Byte index: page fault error code [4:1] 386 * Bit index: pte permissions in ACC_* format 387 */ 388 u8 permissions[16]; 389 390 /* 391 * The pkru_mask indicates if protection key checks are needed. It 392 * consists of 16 domains indexed by page fault error code bits [4:1], 393 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 394 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 395 */ 396 u32 pkru_mask; 397 398 u64 *pae_root; 399 u64 *lm_root; 400 401 /* 402 * check zero bits on shadow page table entries, these 403 * bits include not only hardware reserved bits but also 404 * the bits spte never used. 405 */ 406 struct rsvd_bits_validate shadow_zero_check; 407 408 struct rsvd_bits_validate guest_rsvd_check; 409 410 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 411 u8 last_nonleaf_level; 412 413 bool nx; 414 415 u64 pdptrs[4]; /* pae */ 416 }; 417 418 struct kvm_tlb_range { 419 u64 start_gfn; 420 u64 pages; 421 }; 422 423 enum pmc_type { 424 KVM_PMC_GP = 0, 425 KVM_PMC_FIXED, 426 }; 427 428 struct kvm_pmc { 429 enum pmc_type type; 430 u8 idx; 431 u64 counter; 432 u64 eventsel; 433 struct perf_event *perf_event; 434 struct kvm_vcpu *vcpu; 435 /* 436 * eventsel value for general purpose counters, 437 * ctrl value for fixed counters. 438 */ 439 u64 current_config; 440 }; 441 442 struct kvm_pmu { 443 unsigned nr_arch_gp_counters; 444 unsigned nr_arch_fixed_counters; 445 unsigned available_event_types; 446 u64 fixed_ctr_ctrl; 447 u64 global_ctrl; 448 u64 global_status; 449 u64 global_ovf_ctrl; 450 u64 counter_bitmask[2]; 451 u64 global_ctrl_mask; 452 u64 global_ovf_ctrl_mask; 453 u64 reserved_bits; 454 u8 version; 455 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 456 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 457 struct irq_work irq_work; 458 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 459 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 460 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 461 462 /* 463 * The gate to release perf_events not marked in 464 * pmc_in_use only once in a vcpu time slice. 465 */ 466 bool need_cleanup; 467 468 /* 469 * The total number of programmed perf_events and it helps to avoid 470 * redundant check before cleanup if guest don't use vPMU at all. 471 */ 472 u8 event_count; 473 }; 474 475 struct kvm_pmu_ops; 476 477 enum { 478 KVM_DEBUGREG_BP_ENABLED = 1, 479 KVM_DEBUGREG_WONT_EXIT = 2, 480 KVM_DEBUGREG_RELOAD = 4, 481 }; 482 483 struct kvm_mtrr_range { 484 u64 base; 485 u64 mask; 486 struct list_head node; 487 }; 488 489 struct kvm_mtrr { 490 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 491 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 492 u64 deftype; 493 494 struct list_head head; 495 }; 496 497 /* Hyper-V SynIC timer */ 498 struct kvm_vcpu_hv_stimer { 499 struct hrtimer timer; 500 int index; 501 union hv_stimer_config config; 502 u64 count; 503 u64 exp_time; 504 struct hv_message msg; 505 bool msg_pending; 506 }; 507 508 /* Hyper-V synthetic interrupt controller (SynIC)*/ 509 struct kvm_vcpu_hv_synic { 510 u64 version; 511 u64 control; 512 u64 msg_page; 513 u64 evt_page; 514 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 515 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 516 DECLARE_BITMAP(auto_eoi_bitmap, 256); 517 DECLARE_BITMAP(vec_bitmap, 256); 518 bool active; 519 bool dont_zero_synic_pages; 520 }; 521 522 /* Hyper-V per vcpu emulation context */ 523 struct kvm_vcpu_hv { 524 struct kvm_vcpu *vcpu; 525 u32 vp_index; 526 u64 hv_vapic; 527 s64 runtime_offset; 528 struct kvm_vcpu_hv_synic synic; 529 struct kvm_hyperv_exit exit; 530 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 531 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 532 cpumask_t tlb_flush; 533 }; 534 535 /* Xen HVM per vcpu emulation context */ 536 struct kvm_vcpu_xen { 537 u64 hypercall_rip; 538 bool vcpu_info_set; 539 bool vcpu_time_info_set; 540 struct gfn_to_hva_cache vcpu_info_cache; 541 struct gfn_to_hva_cache vcpu_time_info_cache; 542 }; 543 544 struct kvm_vcpu_arch { 545 /* 546 * rip and regs accesses must go through 547 * kvm_{register,rip}_{read,write} functions. 548 */ 549 unsigned long regs[NR_VCPU_REGS]; 550 u32 regs_avail; 551 u32 regs_dirty; 552 553 unsigned long cr0; 554 unsigned long cr0_guest_owned_bits; 555 unsigned long cr2; 556 unsigned long cr3; 557 unsigned long cr4; 558 unsigned long cr4_guest_owned_bits; 559 unsigned long cr4_guest_rsvd_bits; 560 unsigned long cr8; 561 u32 host_pkru; 562 u32 pkru; 563 u32 hflags; 564 u64 efer; 565 u64 apic_base; 566 struct kvm_lapic *apic; /* kernel irqchip context */ 567 bool apicv_active; 568 bool load_eoi_exitmap_pending; 569 DECLARE_BITMAP(ioapic_handled_vectors, 256); 570 unsigned long apic_attention; 571 int32_t apic_arb_prio; 572 int mp_state; 573 u64 ia32_misc_enable_msr; 574 u64 smbase; 575 u64 smi_count; 576 bool tpr_access_reporting; 577 bool xsaves_enabled; 578 u64 ia32_xss; 579 u64 microcode_version; 580 u64 arch_capabilities; 581 u64 perf_capabilities; 582 583 /* 584 * Paging state of the vcpu 585 * 586 * If the vcpu runs in guest mode with two level paging this still saves 587 * the paging mode of the l1 guest. This context is always used to 588 * handle faults. 589 */ 590 struct kvm_mmu *mmu; 591 592 /* Non-nested MMU for L1 */ 593 struct kvm_mmu root_mmu; 594 595 /* L1 MMU when running nested */ 596 struct kvm_mmu guest_mmu; 597 598 /* 599 * Paging state of an L2 guest (used for nested npt) 600 * 601 * This context will save all necessary information to walk page tables 602 * of an L2 guest. This context is only initialized for page table 603 * walking and not for faulting since we never handle l2 page faults on 604 * the host. 605 */ 606 struct kvm_mmu nested_mmu; 607 608 /* 609 * Pointer to the mmu context currently used for 610 * gva_to_gpa translations. 611 */ 612 struct kvm_mmu *walk_mmu; 613 614 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 615 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 616 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 617 struct kvm_mmu_memory_cache mmu_page_header_cache; 618 619 /* 620 * QEMU userspace and the guest each have their own FPU state. 621 * In vcpu_run, we switch between the user and guest FPU contexts. 622 * While running a VCPU, the VCPU thread will have the guest FPU 623 * context. 624 * 625 * Note that while the PKRU state lives inside the fpu registers, 626 * it is switched out separately at VMENTER and VMEXIT time. The 627 * "guest_fpu" state here contains the guest FPU context, with the 628 * host PRKU bits. 629 */ 630 struct fpu *user_fpu; 631 struct fpu *guest_fpu; 632 633 u64 xcr0; 634 u64 guest_supported_xcr0; 635 636 struct kvm_pio_request pio; 637 void *pio_data; 638 void *guest_ins_data; 639 640 u8 event_exit_inst_len; 641 642 struct kvm_queued_exception { 643 bool pending; 644 bool injected; 645 bool has_error_code; 646 u8 nr; 647 u32 error_code; 648 unsigned long payload; 649 bool has_payload; 650 u8 nested_apf; 651 } exception; 652 653 struct kvm_queued_interrupt { 654 bool injected; 655 bool soft; 656 u8 nr; 657 } interrupt; 658 659 int halt_request; /* real mode on Intel only */ 660 661 int cpuid_nent; 662 struct kvm_cpuid_entry2 *cpuid_entries; 663 664 u64 reserved_gpa_bits; 665 int maxphyaddr; 666 int max_tdp_level; 667 668 /* emulate context */ 669 670 struct x86_emulate_ctxt *emulate_ctxt; 671 bool emulate_regs_need_sync_to_vcpu; 672 bool emulate_regs_need_sync_from_vcpu; 673 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 674 675 gpa_t time; 676 struct pvclock_vcpu_time_info hv_clock; 677 unsigned int hw_tsc_khz; 678 struct gfn_to_hva_cache pv_time; 679 bool pv_time_enabled; 680 /* set guest stopped flag in pvclock flags field */ 681 bool pvclock_set_guest_stopped_request; 682 683 struct { 684 u8 preempted; 685 u64 msr_val; 686 u64 last_steal; 687 struct gfn_to_pfn_cache cache; 688 } st; 689 690 u64 l1_tsc_offset; 691 u64 tsc_offset; 692 u64 last_guest_tsc; 693 u64 last_host_tsc; 694 u64 tsc_offset_adjustment; 695 u64 this_tsc_nsec; 696 u64 this_tsc_write; 697 u64 this_tsc_generation; 698 bool tsc_catchup; 699 bool tsc_always_catchup; 700 s8 virtual_tsc_shift; 701 u32 virtual_tsc_mult; 702 u32 virtual_tsc_khz; 703 s64 ia32_tsc_adjust_msr; 704 u64 msr_ia32_power_ctl; 705 u64 tsc_scaling_ratio; 706 707 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 708 unsigned nmi_pending; /* NMI queued after currently running handler */ 709 bool nmi_injected; /* Trying to inject an NMI this entry */ 710 bool smi_pending; /* SMI queued after currently running handler */ 711 712 struct kvm_mtrr mtrr_state; 713 u64 pat; 714 715 unsigned switch_db_regs; 716 unsigned long db[KVM_NR_DB_REGS]; 717 unsigned long dr6; 718 unsigned long dr7; 719 unsigned long eff_db[KVM_NR_DB_REGS]; 720 unsigned long guest_debug_dr7; 721 u64 msr_platform_info; 722 u64 msr_misc_features_enables; 723 724 u64 mcg_cap; 725 u64 mcg_status; 726 u64 mcg_ctl; 727 u64 mcg_ext_ctl; 728 u64 *mce_banks; 729 730 /* Cache MMIO info */ 731 u64 mmio_gva; 732 unsigned mmio_access; 733 gfn_t mmio_gfn; 734 u64 mmio_gen; 735 736 struct kvm_pmu pmu; 737 738 /* used for guest single stepping over the given code position */ 739 unsigned long singlestep_rip; 740 741 bool hyperv_enabled; 742 struct kvm_vcpu_hv *hyperv; 743 struct kvm_vcpu_xen xen; 744 745 cpumask_var_t wbinvd_dirty_mask; 746 747 unsigned long last_retry_eip; 748 unsigned long last_retry_addr; 749 750 struct { 751 bool halted; 752 gfn_t gfns[ASYNC_PF_PER_VCPU]; 753 struct gfn_to_hva_cache data; 754 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 755 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 756 u16 vec; 757 u32 id; 758 bool send_user_only; 759 u32 host_apf_flags; 760 unsigned long nested_apf_token; 761 bool delivery_as_pf_vmexit; 762 bool pageready_pending; 763 } apf; 764 765 /* OSVW MSRs (AMD only) */ 766 struct { 767 u64 length; 768 u64 status; 769 } osvw; 770 771 struct { 772 u64 msr_val; 773 struct gfn_to_hva_cache data; 774 } pv_eoi; 775 776 u64 msr_kvm_poll_control; 777 778 /* 779 * Indicates the guest is trying to write a gfn that contains one or 780 * more of the PTEs used to translate the write itself, i.e. the access 781 * is changing its own translation in the guest page tables. KVM exits 782 * to userspace if emulation of the faulting instruction fails and this 783 * flag is set, as KVM cannot make forward progress. 784 * 785 * If emulation fails for a write to guest page tables, KVM unprotects 786 * (zaps) the shadow page for the target gfn and resumes the guest to 787 * retry the non-emulatable instruction (on hardware). Unprotecting the 788 * gfn doesn't allow forward progress for a self-changing access because 789 * doing so also zaps the translation for the gfn, i.e. retrying the 790 * instruction will hit a !PRESENT fault, which results in a new shadow 791 * page and sends KVM back to square one. 792 */ 793 bool write_fault_to_shadow_pgtable; 794 795 /* set at EPT violation at this point */ 796 unsigned long exit_qualification; 797 798 /* pv related host specific info */ 799 struct { 800 bool pv_unhalted; 801 } pv; 802 803 int pending_ioapic_eoi; 804 int pending_external_vector; 805 806 /* be preempted when it's in kernel-mode(cpl=0) */ 807 bool preempted_in_kernel; 808 809 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 810 bool l1tf_flush_l1d; 811 812 /* Host CPU on which VM-entry was most recently attempted */ 813 unsigned int last_vmentry_cpu; 814 815 /* AMD MSRC001_0015 Hardware Configuration */ 816 u64 msr_hwcr; 817 818 /* pv related cpuid info */ 819 struct { 820 /* 821 * value of the eax register in the KVM_CPUID_FEATURES CPUID 822 * leaf. 823 */ 824 u32 features; 825 826 /* 827 * indicates whether pv emulation should be disabled if features 828 * are not present in the guest's cpuid 829 */ 830 bool enforce; 831 } pv_cpuid; 832 833 /* Protected Guests */ 834 bool guest_state_protected; 835 }; 836 837 struct kvm_lpage_info { 838 int disallow_lpage; 839 }; 840 841 struct kvm_arch_memory_slot { 842 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 843 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 844 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 845 }; 846 847 /* 848 * We use as the mode the number of bits allocated in the LDR for the 849 * logical processor ID. It happens that these are all powers of two. 850 * This makes it is very easy to detect cases where the APICs are 851 * configured for multiple modes; in that case, we cannot use the map and 852 * hence cannot use kvm_irq_delivery_to_apic_fast either. 853 */ 854 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 855 #define KVM_APIC_MODE_XAPIC_FLAT 8 856 #define KVM_APIC_MODE_X2APIC 16 857 858 struct kvm_apic_map { 859 struct rcu_head rcu; 860 u8 mode; 861 u32 max_apic_id; 862 union { 863 struct kvm_lapic *xapic_flat_map[8]; 864 struct kvm_lapic *xapic_cluster_map[16][4]; 865 }; 866 struct kvm_lapic *phys_map[]; 867 }; 868 869 /* Hyper-V synthetic debugger (SynDbg)*/ 870 struct kvm_hv_syndbg { 871 struct { 872 u64 control; 873 u64 status; 874 u64 send_page; 875 u64 recv_page; 876 u64 pending_page; 877 } control; 878 u64 options; 879 }; 880 881 /* Hyper-V emulation context */ 882 struct kvm_hv { 883 struct mutex hv_lock; 884 u64 hv_guest_os_id; 885 u64 hv_hypercall; 886 u64 hv_tsc_page; 887 888 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 889 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 890 u64 hv_crash_ctl; 891 892 struct ms_hyperv_tsc_page tsc_ref; 893 894 struct idr conn_to_evt; 895 896 u64 hv_reenlightenment_control; 897 u64 hv_tsc_emulation_control; 898 u64 hv_tsc_emulation_status; 899 900 /* How many vCPUs have VP index != vCPU index */ 901 atomic_t num_mismatched_vp_indexes; 902 903 struct hv_partition_assist_pg *hv_pa_pg; 904 struct kvm_hv_syndbg hv_syndbg; 905 }; 906 907 struct msr_bitmap_range { 908 u32 flags; 909 u32 nmsrs; 910 u32 base; 911 unsigned long *bitmap; 912 }; 913 914 /* Xen emulation context */ 915 struct kvm_xen { 916 bool long_mode; 917 bool shinfo_set; 918 u8 upcall_vector; 919 struct gfn_to_hva_cache shinfo_cache; 920 }; 921 922 enum kvm_irqchip_mode { 923 KVM_IRQCHIP_NONE, 924 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 925 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 926 }; 927 928 #define APICV_INHIBIT_REASON_DISABLE 0 929 #define APICV_INHIBIT_REASON_HYPERV 1 930 #define APICV_INHIBIT_REASON_NESTED 2 931 #define APICV_INHIBIT_REASON_IRQWIN 3 932 #define APICV_INHIBIT_REASON_PIT_REINJ 4 933 #define APICV_INHIBIT_REASON_X2APIC 5 934 935 struct kvm_arch { 936 unsigned long n_used_mmu_pages; 937 unsigned long n_requested_mmu_pages; 938 unsigned long n_max_mmu_pages; 939 unsigned int indirect_shadow_pages; 940 u8 mmu_valid_gen; 941 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 942 /* 943 * Hash table of struct kvm_mmu_page. 944 */ 945 struct list_head active_mmu_pages; 946 struct list_head zapped_obsolete_pages; 947 struct list_head lpage_disallowed_mmu_pages; 948 struct kvm_page_track_notifier_node mmu_sp_tracker; 949 struct kvm_page_track_notifier_head track_notifier_head; 950 951 struct list_head assigned_dev_head; 952 struct iommu_domain *iommu_domain; 953 bool iommu_noncoherent; 954 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 955 atomic_t noncoherent_dma_count; 956 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 957 atomic_t assigned_device_count; 958 struct kvm_pic *vpic; 959 struct kvm_ioapic *vioapic; 960 struct kvm_pit *vpit; 961 atomic_t vapics_in_nmi_mode; 962 struct mutex apic_map_lock; 963 struct kvm_apic_map *apic_map; 964 atomic_t apic_map_dirty; 965 966 bool apic_access_page_done; 967 unsigned long apicv_inhibit_reasons; 968 969 gpa_t wall_clock; 970 971 bool mwait_in_guest; 972 bool hlt_in_guest; 973 bool pause_in_guest; 974 bool cstate_in_guest; 975 976 unsigned long irq_sources_bitmap; 977 s64 kvmclock_offset; 978 raw_spinlock_t tsc_write_lock; 979 u64 last_tsc_nsec; 980 u64 last_tsc_write; 981 u32 last_tsc_khz; 982 u64 cur_tsc_nsec; 983 u64 cur_tsc_write; 984 u64 cur_tsc_offset; 985 u64 cur_tsc_generation; 986 int nr_vcpus_matched_tsc; 987 988 spinlock_t pvclock_gtod_sync_lock; 989 bool use_master_clock; 990 u64 master_kernel_ns; 991 u64 master_cycle_now; 992 struct delayed_work kvmclock_update_work; 993 struct delayed_work kvmclock_sync_work; 994 995 struct kvm_xen_hvm_config xen_hvm_config; 996 997 /* reads protected by irq_srcu, writes by irq_lock */ 998 struct hlist_head mask_notifier_list; 999 1000 struct kvm_hv hyperv; 1001 struct kvm_xen xen; 1002 1003 #ifdef CONFIG_KVM_MMU_AUDIT 1004 int audit_point; 1005 #endif 1006 1007 bool backwards_tsc_observed; 1008 bool boot_vcpu_runs_old_kvmclock; 1009 u32 bsp_vcpu_id; 1010 1011 u64 disabled_quirks; 1012 int cpu_dirty_logging_count; 1013 1014 enum kvm_irqchip_mode irqchip_mode; 1015 u8 nr_reserved_ioapic_pins; 1016 1017 bool disabled_lapic_found; 1018 1019 bool x2apic_format; 1020 bool x2apic_broadcast_quirk_disabled; 1021 1022 bool guest_can_read_msr_platform_info; 1023 bool exception_payload_enabled; 1024 1025 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 1026 u32 user_space_msr_mask; 1027 1028 struct { 1029 u8 count; 1030 bool default_allow:1; 1031 struct msr_bitmap_range ranges[16]; 1032 } msr_filter; 1033 1034 bool bus_lock_detection_enabled; 1035 1036 struct kvm_pmu_event_filter *pmu_event_filter; 1037 struct task_struct *nx_lpage_recovery_thread; 1038 1039 #ifdef CONFIG_X86_64 1040 /* 1041 * Whether the TDP MMU is enabled for this VM. This contains a 1042 * snapshot of the TDP MMU module parameter from when the VM was 1043 * created and remains unchanged for the life of the VM. If this is 1044 * true, TDP MMU handler functions will run for various MMU 1045 * operations. 1046 */ 1047 bool tdp_mmu_enabled; 1048 1049 /* 1050 * List of struct kvmp_mmu_pages being used as roots. 1051 * All struct kvm_mmu_pages in the list should have 1052 * tdp_mmu_page set. 1053 * All struct kvm_mmu_pages in the list should have a positive 1054 * root_count except when a thread holds the MMU lock and is removing 1055 * an entry from the list. 1056 */ 1057 struct list_head tdp_mmu_roots; 1058 1059 /* 1060 * List of struct kvmp_mmu_pages not being used as roots. 1061 * All struct kvm_mmu_pages in the list should have 1062 * tdp_mmu_page set and a root_count of 0. 1063 */ 1064 struct list_head tdp_mmu_pages; 1065 1066 /* 1067 * Protects accesses to the following fields when the MMU lock 1068 * is held in read mode: 1069 * - tdp_mmu_pages (above) 1070 * - the link field of struct kvm_mmu_pages used by the TDP MMU 1071 * - lpage_disallowed_mmu_pages 1072 * - the lpage_disallowed_link field of struct kvm_mmu_pages used 1073 * by the TDP MMU 1074 * It is acceptable, but not necessary, to acquire this lock when 1075 * the thread holds the MMU lock in write mode. 1076 */ 1077 spinlock_t tdp_mmu_pages_lock; 1078 #endif /* CONFIG_X86_64 */ 1079 }; 1080 1081 struct kvm_vm_stat { 1082 ulong mmu_shadow_zapped; 1083 ulong mmu_pte_write; 1084 ulong mmu_pde_zapped; 1085 ulong mmu_flooded; 1086 ulong mmu_recycled; 1087 ulong mmu_cache_miss; 1088 ulong mmu_unsync; 1089 ulong remote_tlb_flush; 1090 ulong lpages; 1091 ulong nx_lpage_splits; 1092 ulong max_mmu_page_hash_collisions; 1093 }; 1094 1095 struct kvm_vcpu_stat { 1096 u64 pf_fixed; 1097 u64 pf_guest; 1098 u64 tlb_flush; 1099 u64 invlpg; 1100 1101 u64 exits; 1102 u64 io_exits; 1103 u64 mmio_exits; 1104 u64 signal_exits; 1105 u64 irq_window_exits; 1106 u64 nmi_window_exits; 1107 u64 l1d_flush; 1108 u64 halt_exits; 1109 u64 halt_successful_poll; 1110 u64 halt_attempted_poll; 1111 u64 halt_poll_invalid; 1112 u64 halt_wakeup; 1113 u64 request_irq_exits; 1114 u64 irq_exits; 1115 u64 host_state_reload; 1116 u64 fpu_reload; 1117 u64 insn_emulation; 1118 u64 insn_emulation_fail; 1119 u64 hypercalls; 1120 u64 irq_injections; 1121 u64 nmi_injections; 1122 u64 req_event; 1123 u64 halt_poll_success_ns; 1124 u64 halt_poll_fail_ns; 1125 }; 1126 1127 struct x86_instruction_info; 1128 1129 struct msr_data { 1130 bool host_initiated; 1131 u32 index; 1132 u64 data; 1133 }; 1134 1135 struct kvm_lapic_irq { 1136 u32 vector; 1137 u16 delivery_mode; 1138 u16 dest_mode; 1139 bool level; 1140 u16 trig_mode; 1141 u32 shorthand; 1142 u32 dest_id; 1143 bool msi_redir_hint; 1144 }; 1145 1146 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1147 { 1148 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1149 } 1150 1151 struct kvm_x86_ops { 1152 int (*hardware_enable)(void); 1153 void (*hardware_disable)(void); 1154 void (*hardware_unsetup)(void); 1155 bool (*cpu_has_accelerated_tpr)(void); 1156 bool (*has_emulated_msr)(struct kvm *kvm, u32 index); 1157 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1158 1159 unsigned int vm_size; 1160 int (*vm_init)(struct kvm *kvm); 1161 void (*vm_destroy)(struct kvm *kvm); 1162 1163 /* Create, but do not attach this VCPU */ 1164 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1165 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1166 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1167 1168 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1169 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1170 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1171 1172 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1173 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1174 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1175 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1176 void (*get_segment)(struct kvm_vcpu *vcpu, 1177 struct kvm_segment *var, int seg); 1178 int (*get_cpl)(struct kvm_vcpu *vcpu); 1179 void (*set_segment)(struct kvm_vcpu *vcpu, 1180 struct kvm_segment *var, int seg); 1181 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1182 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1183 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1184 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1185 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1186 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1187 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1188 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1189 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1190 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1191 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1192 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1193 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1194 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1195 1196 void (*tlb_flush_all)(struct kvm_vcpu *vcpu); 1197 void (*tlb_flush_current)(struct kvm_vcpu *vcpu); 1198 int (*tlb_remote_flush)(struct kvm *kvm); 1199 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1200 struct kvm_tlb_range *range); 1201 1202 /* 1203 * Flush any TLB entries associated with the given GVA. 1204 * Does not need to flush GPA->HPA mappings. 1205 * Can potentially get non-canonical addresses through INVLPGs, which 1206 * the implementation may choose to ignore if appropriate. 1207 */ 1208 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1209 1210 /* 1211 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1212 * does not need to flush GPA->HPA mappings. 1213 */ 1214 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu); 1215 1216 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu); 1217 int (*handle_exit)(struct kvm_vcpu *vcpu, 1218 enum exit_fastpath_completion exit_fastpath); 1219 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1220 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1221 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1222 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1223 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1224 unsigned char *hypercall_addr); 1225 void (*set_irq)(struct kvm_vcpu *vcpu); 1226 void (*set_nmi)(struct kvm_vcpu *vcpu); 1227 void (*queue_exception)(struct kvm_vcpu *vcpu); 1228 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1229 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1230 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1231 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1232 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1233 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1234 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1235 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1236 bool (*check_apicv_inhibit_reasons)(ulong bit); 1237 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate); 1238 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1239 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1240 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1241 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1242 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1243 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1244 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1245 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1246 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1247 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1248 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1249 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1250 1251 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, unsigned long pgd, 1252 int pgd_level); 1253 1254 bool (*has_wbinvd_exit)(void); 1255 1256 /* Returns actual tsc_offset set in active VMCS */ 1257 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1258 1259 /* 1260 * Retrieve somewhat arbitrary exit information. Intended to be used 1261 * only from within tracepoints to avoid VMREADs when tracing is off. 1262 */ 1263 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2, 1264 u32 *exit_int_info, u32 *exit_int_info_err_code); 1265 1266 int (*check_intercept)(struct kvm_vcpu *vcpu, 1267 struct x86_instruction_info *info, 1268 enum x86_intercept_stage stage, 1269 struct x86_exception *exception); 1270 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1271 1272 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1273 1274 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1275 1276 /* 1277 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero 1278 * value indicates CPU dirty logging is unsupported or disabled. 1279 */ 1280 int cpu_dirty_log_size; 1281 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu); 1282 1283 /* pmu operations of sub-arch */ 1284 const struct kvm_pmu_ops *pmu_ops; 1285 const struct kvm_x86_nested_ops *nested_ops; 1286 1287 /* 1288 * Architecture specific hooks for vCPU blocking due to 1289 * HLT instruction. 1290 * Returns for .pre_block(): 1291 * - 0 means continue to block the vCPU. 1292 * - 1 means we cannot block the vCPU since some event 1293 * happens during this period, such as, 'ON' bit in 1294 * posted-interrupts descriptor is set. 1295 */ 1296 int (*pre_block)(struct kvm_vcpu *vcpu); 1297 void (*post_block)(struct kvm_vcpu *vcpu); 1298 1299 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1300 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1301 1302 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1303 uint32_t guest_irq, bool set); 1304 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1305 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1306 1307 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1308 bool *expired); 1309 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1310 1311 void (*setup_mce)(struct kvm_vcpu *vcpu); 1312 1313 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1314 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1315 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1316 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1317 1318 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1319 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1320 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1321 1322 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1323 1324 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len); 1325 1326 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1327 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1328 1329 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1330 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1331 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); 1332 1333 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); 1334 }; 1335 1336 struct kvm_x86_nested_ops { 1337 int (*check_events)(struct kvm_vcpu *vcpu); 1338 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1339 int (*get_state)(struct kvm_vcpu *vcpu, 1340 struct kvm_nested_state __user *user_kvm_nested_state, 1341 unsigned user_data_size); 1342 int (*set_state)(struct kvm_vcpu *vcpu, 1343 struct kvm_nested_state __user *user_kvm_nested_state, 1344 struct kvm_nested_state *kvm_state); 1345 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1346 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1347 1348 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1349 uint16_t *vmcs_version); 1350 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1351 }; 1352 1353 struct kvm_x86_init_ops { 1354 int (*cpu_has_kvm_support)(void); 1355 int (*disabled_by_bios)(void); 1356 int (*check_processor_compatibility)(void); 1357 int (*hardware_setup)(void); 1358 1359 struct kvm_x86_ops *runtime_ops; 1360 }; 1361 1362 struct kvm_arch_async_pf { 1363 u32 token; 1364 gfn_t gfn; 1365 unsigned long cr3; 1366 bool direct_map; 1367 }; 1368 1369 extern u64 __read_mostly host_efer; 1370 extern bool __read_mostly allow_smaller_maxphyaddr; 1371 extern struct kvm_x86_ops kvm_x86_ops; 1372 1373 #define KVM_X86_OP(func) \ 1374 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func)); 1375 #define KVM_X86_OP_NULL KVM_X86_OP 1376 #include <asm/kvm-x86-ops.h> 1377 1378 static inline void kvm_ops_static_call_update(void) 1379 { 1380 #define KVM_X86_OP(func) \ 1381 static_call_update(kvm_x86_##func, kvm_x86_ops.func); 1382 #define KVM_X86_OP_NULL KVM_X86_OP 1383 #include <asm/kvm-x86-ops.h> 1384 } 1385 1386 #define __KVM_HAVE_ARCH_VM_ALLOC 1387 static inline struct kvm *kvm_arch_alloc_vm(void) 1388 { 1389 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1390 } 1391 void kvm_arch_free_vm(struct kvm *kvm); 1392 1393 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1394 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1395 { 1396 if (kvm_x86_ops.tlb_remote_flush && 1397 !static_call(kvm_x86_tlb_remote_flush)(kvm)) 1398 return 0; 1399 else 1400 return -ENOTSUPP; 1401 } 1402 1403 int kvm_mmu_module_init(void); 1404 void kvm_mmu_module_exit(void); 1405 1406 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1407 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1408 void kvm_mmu_init_vm(struct kvm *kvm); 1409 void kvm_mmu_uninit_vm(struct kvm *kvm); 1410 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1411 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1412 u64 acc_track_mask, u64 me_mask); 1413 1414 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1415 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1416 struct kvm_memory_slot *memslot, 1417 int start_level); 1418 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1419 const struct kvm_memory_slot *memslot); 1420 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1421 struct kvm_memory_slot *memslot); 1422 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1423 struct kvm_memory_slot *memslot); 1424 void kvm_mmu_zap_all(struct kvm *kvm); 1425 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1426 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1427 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1428 1429 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1430 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1431 1432 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1433 const void *val, int bytes); 1434 1435 struct kvm_irq_mask_notifier { 1436 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1437 int irq; 1438 struct hlist_node link; 1439 }; 1440 1441 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1442 struct kvm_irq_mask_notifier *kimn); 1443 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1444 struct kvm_irq_mask_notifier *kimn); 1445 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1446 bool mask); 1447 1448 extern bool tdp_enabled; 1449 1450 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1451 1452 /* control of guest tsc rate supported? */ 1453 extern bool kvm_has_tsc_control; 1454 /* maximum supported tsc_khz for guests */ 1455 extern u32 kvm_max_guest_tsc_khz; 1456 /* number of bits of the fractional part of the TSC scaling ratio */ 1457 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1458 /* maximum allowed value of TSC scaling ratio */ 1459 extern u64 kvm_max_tsc_scaling_ratio; 1460 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1461 extern u64 kvm_default_tsc_scaling_ratio; 1462 /* bus lock detection supported? */ 1463 extern bool kvm_has_bus_lock_exit; 1464 1465 extern u64 kvm_mce_cap_supported; 1466 1467 /* 1468 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1469 * userspace I/O) to indicate that the emulation context 1470 * should be resued as is, i.e. skip initialization of 1471 * emulation context, instruction fetch and decode. 1472 * 1473 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1474 * Indicates that only select instructions (tagged with 1475 * EmulateOnUD) should be emulated (to minimize the emulator 1476 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1477 * 1478 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1479 * decode the instruction length. For use *only* by 1480 * kvm_x86_ops.skip_emulated_instruction() implementations. 1481 * 1482 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1483 * retry native execution under certain conditions, 1484 * Can only be set in conjunction with EMULTYPE_PF. 1485 * 1486 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1487 * triggered by KVM's magic "force emulation" prefix, 1488 * which is opt in via module param (off by default). 1489 * Bypasses EmulateOnUD restriction despite emulating 1490 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1491 * Used to test the full emulator from userspace. 1492 * 1493 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1494 * backdoor emulation, which is opt in via module param. 1495 * VMware backoor emulation handles select instructions 1496 * and reinjects the #GP for all other cases. 1497 * 1498 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1499 * case the CR2/GPA value pass on the stack is valid. 1500 */ 1501 #define EMULTYPE_NO_DECODE (1 << 0) 1502 #define EMULTYPE_TRAP_UD (1 << 1) 1503 #define EMULTYPE_SKIP (1 << 2) 1504 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1505 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1506 #define EMULTYPE_VMWARE_GP (1 << 5) 1507 #define EMULTYPE_PF (1 << 6) 1508 1509 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1510 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1511 void *insn, int insn_len); 1512 1513 void kvm_enable_efer_bits(u64); 1514 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1515 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1516 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1517 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1518 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1519 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1520 1521 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1522 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1523 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1524 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1525 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu); 1526 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1527 1528 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1529 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1530 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1531 1532 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1533 int reason, bool has_error_code, u32 error_code); 1534 1535 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu); 1536 1537 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0); 1538 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4); 1539 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1540 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1541 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1542 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1543 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1544 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1545 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1546 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1547 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1548 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1549 1550 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1551 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1552 1553 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1554 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1555 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1556 1557 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1558 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1559 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1560 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1561 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1562 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1563 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1564 struct x86_exception *fault); 1565 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1566 gfn_t gfn, void *data, int offset, int len, 1567 u32 access); 1568 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1569 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1570 1571 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1572 int irq_source_id, int level) 1573 { 1574 /* Logical OR for level trig interrupt */ 1575 if (level) 1576 __set_bit(irq_source_id, irq_state); 1577 else 1578 __clear_bit(irq_source_id, irq_state); 1579 1580 return !!(*irq_state); 1581 } 1582 1583 #define KVM_MMU_ROOT_CURRENT BIT(0) 1584 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1585 #define KVM_MMU_ROOTS_ALL (~0UL) 1586 1587 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1588 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1589 1590 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1591 1592 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1593 1594 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1595 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1596 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1597 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1598 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1599 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1600 ulong roots_to_free); 1601 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1602 struct x86_exception *exception); 1603 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1604 struct x86_exception *exception); 1605 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1606 struct x86_exception *exception); 1607 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1608 struct x86_exception *exception); 1609 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1610 struct x86_exception *exception); 1611 1612 bool kvm_apicv_activated(struct kvm *kvm); 1613 void kvm_apicv_init(struct kvm *kvm, bool enable); 1614 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1615 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1616 unsigned long bit); 1617 1618 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1619 1620 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1621 void *insn, int insn_len); 1622 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1623 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1624 gva_t gva, hpa_t root_hpa); 1625 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1626 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 1627 bool skip_mmu_sync); 1628 1629 void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 1630 int tdp_huge_page_level); 1631 1632 static inline u16 kvm_read_ldt(void) 1633 { 1634 u16 ldt; 1635 asm("sldt %0" : "=g"(ldt)); 1636 return ldt; 1637 } 1638 1639 static inline void kvm_load_ldt(u16 sel) 1640 { 1641 asm("lldt %0" : : "rm"(sel)); 1642 } 1643 1644 #ifdef CONFIG_X86_64 1645 static inline unsigned long read_msr(unsigned long msr) 1646 { 1647 u64 value; 1648 1649 rdmsrl(msr, value); 1650 return value; 1651 } 1652 #endif 1653 1654 static inline u32 get_rdx_init_val(void) 1655 { 1656 return 0x600; /* P6 family */ 1657 } 1658 1659 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1660 { 1661 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1662 } 1663 1664 #define TSS_IOPB_BASE_OFFSET 0x66 1665 #define TSS_BASE_SIZE 0x68 1666 #define TSS_IOPB_SIZE (65536 / 8) 1667 #define TSS_REDIRECTION_SIZE (256 / 8) 1668 #define RMODE_TSS_SIZE \ 1669 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1670 1671 enum { 1672 TASK_SWITCH_CALL = 0, 1673 TASK_SWITCH_IRET = 1, 1674 TASK_SWITCH_JMP = 2, 1675 TASK_SWITCH_GATE = 3, 1676 }; 1677 1678 #define HF_GIF_MASK (1 << 0) 1679 #define HF_NMI_MASK (1 << 3) 1680 #define HF_IRET_MASK (1 << 4) 1681 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1682 #define HF_SMM_MASK (1 << 6) 1683 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1684 1685 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1686 #define KVM_ADDRESS_SPACE_NUM 2 1687 1688 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1689 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1690 1691 asmlinkage void kvm_spurious_fault(void); 1692 1693 /* 1694 * Hardware virtualization extension instructions may fault if a 1695 * reboot turns off virtualization while processes are running. 1696 * Usually after catching the fault we just panic; during reboot 1697 * instead the instruction is ignored. 1698 */ 1699 #define __kvm_handle_fault_on_reboot(insn) \ 1700 "666: \n\t" \ 1701 insn "\n\t" \ 1702 "jmp 668f \n\t" \ 1703 "667: \n\t" \ 1704 "1: \n\t" \ 1705 ".pushsection .discard.instr_begin \n\t" \ 1706 ".long 1b - . \n\t" \ 1707 ".popsection \n\t" \ 1708 "call kvm_spurious_fault \n\t" \ 1709 "1: \n\t" \ 1710 ".pushsection .discard.instr_end \n\t" \ 1711 ".long 1b - . \n\t" \ 1712 ".popsection \n\t" \ 1713 "668: \n\t" \ 1714 _ASM_EXTABLE(666b, 667b) 1715 1716 #define KVM_ARCH_WANT_MMU_NOTIFIER 1717 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, 1718 unsigned flags); 1719 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1720 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1721 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1722 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1723 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1724 int kvm_cpu_has_extint(struct kvm_vcpu *v); 1725 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1726 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1727 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1728 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1729 1730 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1731 unsigned long ipi_bitmap_high, u32 min, 1732 unsigned long icr, int op_64_bit); 1733 1734 void kvm_define_user_return_msr(unsigned index, u32 msr); 1735 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1736 1737 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1738 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1739 1740 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1741 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1742 1743 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1744 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1745 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1746 unsigned long *vcpu_bitmap); 1747 1748 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1749 struct kvm_async_pf *work); 1750 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1751 struct kvm_async_pf *work); 1752 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1753 struct kvm_async_pf *work); 1754 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1755 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1756 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1757 1758 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1759 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1760 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1761 1762 int kvm_is_in_guest(void); 1763 1764 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, 1765 u32 size); 1766 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1767 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1768 1769 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1770 struct kvm_vcpu **dest_vcpu); 1771 1772 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1773 struct kvm_lapic_irq *irq); 1774 1775 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1776 { 1777 /* We can only post Fixed and LowPrio IRQs */ 1778 return (irq->delivery_mode == APIC_DM_FIXED || 1779 irq->delivery_mode == APIC_DM_LOWEST); 1780 } 1781 1782 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1783 { 1784 static_call_cond(kvm_x86_vcpu_blocking)(vcpu); 1785 } 1786 1787 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1788 { 1789 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu); 1790 } 1791 1792 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1793 1794 static inline int kvm_cpu_get_apicid(int mps_cpu) 1795 { 1796 #ifdef CONFIG_X86_LOCAL_APIC 1797 return default_cpu_present_to_apicid(mps_cpu); 1798 #else 1799 WARN_ON_ONCE(1); 1800 return BAD_APICID; 1801 #endif 1802 } 1803 1804 #define put_smstate(type, buf, offset, val) \ 1805 *(type *)((buf) + (offset) - 0x7e00) = val 1806 1807 #define GET_SMSTATE(type, buf, offset) \ 1808 (*(type *)((buf) + (offset) - 0x7e00)) 1809 1810 int kvm_cpu_dirty_log_size(void); 1811 1812 #endif /* _ASM_X86_KVM_HOST_H */ 1813