1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 1024 41 42 /* 43 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs 44 * might be larger than the actual number of VCPUs because the 45 * APIC ID encodes CPU topology information. 46 * 47 * In the worst case, we'll need less than one extra bit for the 48 * Core ID, and less than one extra bit for the Package (Die) ID, 49 * so ratio of 4 should be enough. 50 */ 51 #define KVM_VCPU_ID_RATIO 4 52 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO) 53 54 /* memory slots that are not exposed to userspace */ 55 #define KVM_PRIVATE_MEM_SLOTS 3 56 57 #define KVM_HALT_POLL_NS_DEFAULT 200000 58 59 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 60 61 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 62 KVM_DIRTY_LOG_INITIALLY_SET) 63 64 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \ 65 KVM_BUS_LOCK_DETECTION_EXIT) 66 67 /* x86-specific vcpu->requests bit members */ 68 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 69 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 70 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 71 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 72 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 73 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 74 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 75 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 76 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 77 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 78 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 79 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 80 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 81 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 82 #define KVM_REQ_MCLOCK_INPROGRESS \ 83 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 84 #define KVM_REQ_SCAN_IOAPIC \ 85 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 86 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 87 #define KVM_REQ_APIC_PAGE_RELOAD \ 88 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 89 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 90 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 91 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 92 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 93 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 94 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 95 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 96 #define KVM_REQ_APICV_UPDATE \ 97 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 98 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 99 #define KVM_REQ_TLB_FLUSH_GUEST \ 100 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 101 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 102 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 103 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \ 104 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 105 106 #define CR0_RESERVED_BITS \ 107 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 108 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 109 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 110 111 #define CR4_RESERVED_BITS \ 112 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 113 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 114 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 115 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 116 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 117 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 118 119 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 120 121 122 123 #define INVALID_PAGE (~(hpa_t)0) 124 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 125 126 #define UNMAPPED_GVA (~(gpa_t)0) 127 #define INVALID_GPA (~(gpa_t)0) 128 129 /* KVM Hugepage definitions for x86 */ 130 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 131 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 132 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 133 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 134 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 135 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 136 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 137 138 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50 139 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 140 #define KVM_MMU_HASH_SHIFT 12 141 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 142 #define KVM_MIN_FREE_MMU_PAGES 5 143 #define KVM_REFILL_PAGES 25 144 #define KVM_MAX_CPUID_ENTRIES 256 145 #define KVM_NR_FIXED_MTRR_REGION 88 146 #define KVM_NR_VAR_MTRR 8 147 148 #define ASYNC_PF_PER_VCPU 64 149 150 enum kvm_reg { 151 VCPU_REGS_RAX = __VCPU_REGS_RAX, 152 VCPU_REGS_RCX = __VCPU_REGS_RCX, 153 VCPU_REGS_RDX = __VCPU_REGS_RDX, 154 VCPU_REGS_RBX = __VCPU_REGS_RBX, 155 VCPU_REGS_RSP = __VCPU_REGS_RSP, 156 VCPU_REGS_RBP = __VCPU_REGS_RBP, 157 VCPU_REGS_RSI = __VCPU_REGS_RSI, 158 VCPU_REGS_RDI = __VCPU_REGS_RDI, 159 #ifdef CONFIG_X86_64 160 VCPU_REGS_R8 = __VCPU_REGS_R8, 161 VCPU_REGS_R9 = __VCPU_REGS_R9, 162 VCPU_REGS_R10 = __VCPU_REGS_R10, 163 VCPU_REGS_R11 = __VCPU_REGS_R11, 164 VCPU_REGS_R12 = __VCPU_REGS_R12, 165 VCPU_REGS_R13 = __VCPU_REGS_R13, 166 VCPU_REGS_R14 = __VCPU_REGS_R14, 167 VCPU_REGS_R15 = __VCPU_REGS_R15, 168 #endif 169 VCPU_REGS_RIP, 170 NR_VCPU_REGS, 171 172 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 173 VCPU_EXREG_CR0, 174 VCPU_EXREG_CR3, 175 VCPU_EXREG_CR4, 176 VCPU_EXREG_RFLAGS, 177 VCPU_EXREG_SEGMENTS, 178 VCPU_EXREG_EXIT_INFO_1, 179 VCPU_EXREG_EXIT_INFO_2, 180 }; 181 182 enum { 183 VCPU_SREG_ES, 184 VCPU_SREG_CS, 185 VCPU_SREG_SS, 186 VCPU_SREG_DS, 187 VCPU_SREG_FS, 188 VCPU_SREG_GS, 189 VCPU_SREG_TR, 190 VCPU_SREG_LDTR, 191 }; 192 193 enum exit_fastpath_completion { 194 EXIT_FASTPATH_NONE, 195 EXIT_FASTPATH_REENTER_GUEST, 196 EXIT_FASTPATH_EXIT_HANDLED, 197 }; 198 typedef enum exit_fastpath_completion fastpath_t; 199 200 struct x86_emulate_ctxt; 201 struct x86_exception; 202 enum x86_intercept; 203 enum x86_intercept_stage; 204 205 #define KVM_NR_DB_REGS 4 206 207 #define DR6_BUS_LOCK (1 << 11) 208 #define DR6_BD (1 << 13) 209 #define DR6_BS (1 << 14) 210 #define DR6_BT (1 << 15) 211 #define DR6_RTM (1 << 16) 212 /* 213 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits. 214 * We can regard all the bits in DR6_FIXED_1 as active_low bits; 215 * they will never be 0 for now, but when they are defined 216 * in the future it will require no code change. 217 * 218 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6. 219 */ 220 #define DR6_ACTIVE_LOW 0xffff0ff0 221 #define DR6_VOLATILE 0x0001e80f 222 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE) 223 224 #define DR7_BP_EN_MASK 0x000000ff 225 #define DR7_GE (1 << 9) 226 #define DR7_GD (1 << 13) 227 #define DR7_FIXED_1 0x00000400 228 #define DR7_VOLATILE 0xffff2bff 229 230 #define KVM_GUESTDBG_VALID_MASK \ 231 (KVM_GUESTDBG_ENABLE | \ 232 KVM_GUESTDBG_SINGLESTEP | \ 233 KVM_GUESTDBG_USE_HW_BP | \ 234 KVM_GUESTDBG_USE_SW_BP | \ 235 KVM_GUESTDBG_INJECT_BP | \ 236 KVM_GUESTDBG_INJECT_DB | \ 237 KVM_GUESTDBG_BLOCKIRQ) 238 239 240 #define PFERR_PRESENT_BIT 0 241 #define PFERR_WRITE_BIT 1 242 #define PFERR_USER_BIT 2 243 #define PFERR_RSVD_BIT 3 244 #define PFERR_FETCH_BIT 4 245 #define PFERR_PK_BIT 5 246 #define PFERR_SGX_BIT 15 247 #define PFERR_GUEST_FINAL_BIT 32 248 #define PFERR_GUEST_PAGE_BIT 33 249 250 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 251 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 252 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 253 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 254 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 255 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 256 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT) 257 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 258 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 259 260 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 261 PFERR_WRITE_MASK | \ 262 PFERR_PRESENT_MASK) 263 264 /* apic attention bits */ 265 #define KVM_APIC_CHECK_VAPIC 0 266 /* 267 * The following bit is set with PV-EOI, unset on EOI. 268 * We detect PV-EOI changes by guest by comparing 269 * this bit with PV-EOI in guest memory. 270 * See the implementation in apic_update_pv_eoi. 271 */ 272 #define KVM_APIC_PV_EOI_PENDING 1 273 274 struct kvm_kernel_irq_routing_entry; 275 276 /* 277 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page 278 * also includes TDP pages) to determine whether or not a page can be used in 279 * the given MMU context. This is a subset of the overall kvm_mmu_role to 280 * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating 281 * 2 bytes per gfn instead of 4 bytes per gfn. 282 * 283 * Indirect upper-level shadow pages are tracked for write-protection via 284 * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create 285 * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise 286 * gfn_track will overflow and explosions will ensure. 287 * 288 * A unique shadow page (SP) for a gfn is created if and only if an existing SP 289 * cannot be reused. The ability to reuse a SP is tracked by its role, which 290 * incorporates various mode bits and properties of the SP. Roughly speaking, 291 * the number of unique SPs that can theoretically be created is 2^n, where n 292 * is the number of bits that are used to compute the role. 293 * 294 * But, even though there are 19 bits in the mask below, not all combinations 295 * of modes and flags are possible: 296 * 297 * - invalid shadow pages are not accounted, so the bits are effectively 18 298 * 299 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging); 300 * execonly and ad_disabled are only used for nested EPT which has 301 * has_4_byte_gpte=0. Therefore, 2 bits are always unused. 302 * 303 * - the 4 bits of level are effectively limited to the values 2/3/4/5, 304 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE 305 * paging has exactly one upper level, making level completely redundant 306 * when has_4_byte_gpte=1. 307 * 308 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if 309 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities. 310 * 311 * Therefore, the maximum number of possible upper-level shadow pages for a 312 * single gfn is a bit less than 2^13. 313 */ 314 union kvm_mmu_page_role { 315 u32 word; 316 struct { 317 unsigned level:4; 318 unsigned has_4_byte_gpte:1; 319 unsigned quadrant:2; 320 unsigned direct:1; 321 unsigned access:3; 322 unsigned invalid:1; 323 unsigned efer_nx:1; 324 unsigned cr0_wp:1; 325 unsigned smep_andnot_wp:1; 326 unsigned smap_andnot_wp:1; 327 unsigned ad_disabled:1; 328 unsigned guest_mode:1; 329 unsigned :6; 330 331 /* 332 * This is left at the top of the word so that 333 * kvm_memslots_for_spte_role can extract it with a 334 * simple shift. While there is room, give it a whole 335 * byte so it is also faster to load it from memory. 336 */ 337 unsigned smm:8; 338 }; 339 }; 340 341 /* 342 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties 343 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER, 344 * including on nested transitions, if nothing in the full role changes then 345 * MMU re-configuration can be skipped. @valid bit is set on first usage so we 346 * don't treat all-zero structure as valid data. 347 * 348 * The properties that are tracked in the extended role but not the page role 349 * are for things that either (a) do not affect the validity of the shadow page 350 * or (b) are indirectly reflected in the shadow page's role. For example, 351 * CR4.PKE only affects permission checks for software walks of the guest page 352 * tables (because KVM doesn't support Protection Keys with shadow paging), and 353 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level. 354 * 355 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role. 356 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and 357 * SMAP, but the MMU's permission checks for software walks need to be SMEP and 358 * SMAP aware regardless of CR0.WP. 359 */ 360 union kvm_mmu_extended_role { 361 u32 word; 362 struct { 363 unsigned int valid:1; 364 unsigned int execonly:1; 365 unsigned int cr0_pg:1; 366 unsigned int cr4_pae:1; 367 unsigned int cr4_pse:1; 368 unsigned int cr4_pke:1; 369 unsigned int cr4_smap:1; 370 unsigned int cr4_smep:1; 371 unsigned int cr4_la57:1; 372 unsigned int efer_lma:1; 373 }; 374 }; 375 376 union kvm_mmu_role { 377 u64 as_u64; 378 struct { 379 union kvm_mmu_page_role base; 380 union kvm_mmu_extended_role ext; 381 }; 382 }; 383 384 struct kvm_rmap_head { 385 unsigned long val; 386 }; 387 388 struct kvm_pio_request { 389 unsigned long linear_rip; 390 unsigned long count; 391 int in; 392 int port; 393 int size; 394 }; 395 396 #define PT64_ROOT_MAX_LEVEL 5 397 398 struct rsvd_bits_validate { 399 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 400 u64 bad_mt_xwr; 401 }; 402 403 struct kvm_mmu_root_info { 404 gpa_t pgd; 405 hpa_t hpa; 406 }; 407 408 #define KVM_MMU_ROOT_INFO_INVALID \ 409 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 410 411 #define KVM_MMU_NUM_PREV_ROOTS 3 412 413 #define KVM_HAVE_MMU_RWLOCK 414 415 struct kvm_mmu_page; 416 struct kvm_page_fault; 417 418 /* 419 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 420 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 421 * current mmu mode. 422 */ 423 struct kvm_mmu { 424 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 425 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 426 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault); 427 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 428 struct x86_exception *fault); 429 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 430 gpa_t gva_or_gpa, u32 access, 431 struct x86_exception *exception); 432 int (*sync_page)(struct kvm_vcpu *vcpu, 433 struct kvm_mmu_page *sp); 434 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 435 hpa_t root_hpa; 436 gpa_t root_pgd; 437 union kvm_mmu_role mmu_role; 438 u8 root_level; 439 u8 shadow_root_level; 440 u8 ept_ad; 441 bool direct_map; 442 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 443 444 /* 445 * Bitmap; bit set = permission fault 446 * Byte index: page fault error code [4:1] 447 * Bit index: pte permissions in ACC_* format 448 */ 449 u8 permissions[16]; 450 451 /* 452 * The pkru_mask indicates if protection key checks are needed. It 453 * consists of 16 domains indexed by page fault error code bits [4:1], 454 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 455 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 456 */ 457 u32 pkru_mask; 458 459 u64 *pae_root; 460 u64 *pml4_root; 461 u64 *pml5_root; 462 463 /* 464 * check zero bits on shadow page table entries, these 465 * bits include not only hardware reserved bits but also 466 * the bits spte never used. 467 */ 468 struct rsvd_bits_validate shadow_zero_check; 469 470 struct rsvd_bits_validate guest_rsvd_check; 471 472 u64 pdptrs[4]; /* pae */ 473 }; 474 475 struct kvm_tlb_range { 476 u64 start_gfn; 477 u64 pages; 478 }; 479 480 enum pmc_type { 481 KVM_PMC_GP = 0, 482 KVM_PMC_FIXED, 483 }; 484 485 struct kvm_pmc { 486 enum pmc_type type; 487 u8 idx; 488 u64 counter; 489 u64 eventsel; 490 struct perf_event *perf_event; 491 struct kvm_vcpu *vcpu; 492 /* 493 * eventsel value for general purpose counters, 494 * ctrl value for fixed counters. 495 */ 496 u64 current_config; 497 bool is_paused; 498 bool intr; 499 }; 500 501 struct kvm_pmu { 502 unsigned nr_arch_gp_counters; 503 unsigned nr_arch_fixed_counters; 504 unsigned available_event_types; 505 u64 fixed_ctr_ctrl; 506 u64 global_ctrl; 507 u64 global_status; 508 u64 counter_bitmask[2]; 509 u64 global_ctrl_mask; 510 u64 global_ovf_ctrl_mask; 511 u64 reserved_bits; 512 u8 version; 513 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 514 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 515 struct irq_work irq_work; 516 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 517 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 518 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 519 520 /* 521 * The gate to release perf_events not marked in 522 * pmc_in_use only once in a vcpu time slice. 523 */ 524 bool need_cleanup; 525 526 /* 527 * The total number of programmed perf_events and it helps to avoid 528 * redundant check before cleanup if guest don't use vPMU at all. 529 */ 530 u8 event_count; 531 }; 532 533 struct kvm_pmu_ops; 534 535 enum { 536 KVM_DEBUGREG_BP_ENABLED = 1, 537 KVM_DEBUGREG_WONT_EXIT = 2, 538 }; 539 540 struct kvm_mtrr_range { 541 u64 base; 542 u64 mask; 543 struct list_head node; 544 }; 545 546 struct kvm_mtrr { 547 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 548 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 549 u64 deftype; 550 551 struct list_head head; 552 }; 553 554 /* Hyper-V SynIC timer */ 555 struct kvm_vcpu_hv_stimer { 556 struct hrtimer timer; 557 int index; 558 union hv_stimer_config config; 559 u64 count; 560 u64 exp_time; 561 struct hv_message msg; 562 bool msg_pending; 563 }; 564 565 /* Hyper-V synthetic interrupt controller (SynIC)*/ 566 struct kvm_vcpu_hv_synic { 567 u64 version; 568 u64 control; 569 u64 msg_page; 570 u64 evt_page; 571 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 572 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 573 DECLARE_BITMAP(auto_eoi_bitmap, 256); 574 DECLARE_BITMAP(vec_bitmap, 256); 575 bool active; 576 bool dont_zero_synic_pages; 577 }; 578 579 /* Hyper-V per vcpu emulation context */ 580 struct kvm_vcpu_hv { 581 struct kvm_vcpu *vcpu; 582 u32 vp_index; 583 u64 hv_vapic; 584 s64 runtime_offset; 585 struct kvm_vcpu_hv_synic synic; 586 struct kvm_hyperv_exit exit; 587 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 588 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 589 bool enforce_cpuid; 590 struct { 591 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */ 592 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */ 593 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */ 594 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */ 595 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */ 596 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */ 597 } cpuid_cache; 598 }; 599 600 /* Xen HVM per vcpu emulation context */ 601 struct kvm_vcpu_xen { 602 u64 hypercall_rip; 603 u32 current_runstate; 604 bool vcpu_info_set; 605 bool vcpu_time_info_set; 606 bool runstate_set; 607 struct gfn_to_hva_cache vcpu_info_cache; 608 struct gfn_to_hva_cache vcpu_time_info_cache; 609 struct gfn_to_hva_cache runstate_cache; 610 u64 last_steal; 611 u64 runstate_entry_time; 612 u64 runstate_times[4]; 613 unsigned long evtchn_pending_sel; 614 }; 615 616 struct kvm_vcpu_arch { 617 /* 618 * rip and regs accesses must go through 619 * kvm_{register,rip}_{read,write} functions. 620 */ 621 unsigned long regs[NR_VCPU_REGS]; 622 u32 regs_avail; 623 u32 regs_dirty; 624 625 unsigned long cr0; 626 unsigned long cr0_guest_owned_bits; 627 unsigned long cr2; 628 unsigned long cr3; 629 unsigned long cr4; 630 unsigned long cr4_guest_owned_bits; 631 unsigned long cr4_guest_rsvd_bits; 632 unsigned long cr8; 633 u32 host_pkru; 634 u32 pkru; 635 u32 hflags; 636 u64 efer; 637 u64 apic_base; 638 struct kvm_lapic *apic; /* kernel irqchip context */ 639 bool apicv_active; 640 bool load_eoi_exitmap_pending; 641 DECLARE_BITMAP(ioapic_handled_vectors, 256); 642 unsigned long apic_attention; 643 int32_t apic_arb_prio; 644 int mp_state; 645 u64 ia32_misc_enable_msr; 646 u64 smbase; 647 u64 smi_count; 648 bool tpr_access_reporting; 649 bool xsaves_enabled; 650 bool xfd_no_write_intercept; 651 u64 ia32_xss; 652 u64 microcode_version; 653 u64 arch_capabilities; 654 u64 perf_capabilities; 655 656 /* 657 * Paging state of the vcpu 658 * 659 * If the vcpu runs in guest mode with two level paging this still saves 660 * the paging mode of the l1 guest. This context is always used to 661 * handle faults. 662 */ 663 struct kvm_mmu *mmu; 664 665 /* Non-nested MMU for L1 */ 666 struct kvm_mmu root_mmu; 667 668 /* L1 MMU when running nested */ 669 struct kvm_mmu guest_mmu; 670 671 /* 672 * Paging state of an L2 guest (used for nested npt) 673 * 674 * This context will save all necessary information to walk page tables 675 * of an L2 guest. This context is only initialized for page table 676 * walking and not for faulting since we never handle l2 page faults on 677 * the host. 678 */ 679 struct kvm_mmu nested_mmu; 680 681 /* 682 * Pointer to the mmu context currently used for 683 * gva_to_gpa translations. 684 */ 685 struct kvm_mmu *walk_mmu; 686 687 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 688 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 689 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 690 struct kvm_mmu_memory_cache mmu_page_header_cache; 691 692 /* 693 * QEMU userspace and the guest each have their own FPU state. 694 * In vcpu_run, we switch between the user and guest FPU contexts. 695 * While running a VCPU, the VCPU thread will have the guest FPU 696 * context. 697 * 698 * Note that while the PKRU state lives inside the fpu registers, 699 * it is switched out separately at VMENTER and VMEXIT time. The 700 * "guest_fpstate" state here contains the guest FPU context, with the 701 * host PRKU bits. 702 */ 703 struct fpu_guest guest_fpu; 704 705 u64 xcr0; 706 u64 guest_supported_xcr0; 707 708 struct kvm_pio_request pio; 709 void *pio_data; 710 void *sev_pio_data; 711 unsigned sev_pio_count; 712 713 u8 event_exit_inst_len; 714 715 struct kvm_queued_exception { 716 bool pending; 717 bool injected; 718 bool has_error_code; 719 u8 nr; 720 u32 error_code; 721 unsigned long payload; 722 bool has_payload; 723 u8 nested_apf; 724 } exception; 725 726 struct kvm_queued_interrupt { 727 bool injected; 728 bool soft; 729 u8 nr; 730 } interrupt; 731 732 int halt_request; /* real mode on Intel only */ 733 734 int cpuid_nent; 735 struct kvm_cpuid_entry2 *cpuid_entries; 736 u32 kvm_cpuid_base; 737 738 u64 reserved_gpa_bits; 739 int maxphyaddr; 740 741 /* emulate context */ 742 743 struct x86_emulate_ctxt *emulate_ctxt; 744 bool emulate_regs_need_sync_to_vcpu; 745 bool emulate_regs_need_sync_from_vcpu; 746 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 747 748 gpa_t time; 749 struct pvclock_vcpu_time_info hv_clock; 750 unsigned int hw_tsc_khz; 751 struct gfn_to_hva_cache pv_time; 752 bool pv_time_enabled; 753 /* set guest stopped flag in pvclock flags field */ 754 bool pvclock_set_guest_stopped_request; 755 756 struct { 757 u8 preempted; 758 u64 msr_val; 759 u64 last_steal; 760 struct gfn_to_hva_cache cache; 761 } st; 762 763 u64 l1_tsc_offset; 764 u64 tsc_offset; /* current tsc offset */ 765 u64 last_guest_tsc; 766 u64 last_host_tsc; 767 u64 tsc_offset_adjustment; 768 u64 this_tsc_nsec; 769 u64 this_tsc_write; 770 u64 this_tsc_generation; 771 bool tsc_catchup; 772 bool tsc_always_catchup; 773 s8 virtual_tsc_shift; 774 u32 virtual_tsc_mult; 775 u32 virtual_tsc_khz; 776 s64 ia32_tsc_adjust_msr; 777 u64 msr_ia32_power_ctl; 778 u64 l1_tsc_scaling_ratio; 779 u64 tsc_scaling_ratio; /* current scaling ratio */ 780 781 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 782 unsigned nmi_pending; /* NMI queued after currently running handler */ 783 bool nmi_injected; /* Trying to inject an NMI this entry */ 784 bool smi_pending; /* SMI queued after currently running handler */ 785 u8 handling_intr_from_guest; 786 787 struct kvm_mtrr mtrr_state; 788 u64 pat; 789 790 unsigned switch_db_regs; 791 unsigned long db[KVM_NR_DB_REGS]; 792 unsigned long dr6; 793 unsigned long dr7; 794 unsigned long eff_db[KVM_NR_DB_REGS]; 795 unsigned long guest_debug_dr7; 796 u64 msr_platform_info; 797 u64 msr_misc_features_enables; 798 799 u64 mcg_cap; 800 u64 mcg_status; 801 u64 mcg_ctl; 802 u64 mcg_ext_ctl; 803 u64 *mce_banks; 804 805 /* Cache MMIO info */ 806 u64 mmio_gva; 807 unsigned mmio_access; 808 gfn_t mmio_gfn; 809 u64 mmio_gen; 810 811 struct kvm_pmu pmu; 812 813 /* used for guest single stepping over the given code position */ 814 unsigned long singlestep_rip; 815 816 bool hyperv_enabled; 817 struct kvm_vcpu_hv *hyperv; 818 struct kvm_vcpu_xen xen; 819 820 cpumask_var_t wbinvd_dirty_mask; 821 822 unsigned long last_retry_eip; 823 unsigned long last_retry_addr; 824 825 struct { 826 bool halted; 827 gfn_t gfns[ASYNC_PF_PER_VCPU]; 828 struct gfn_to_hva_cache data; 829 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 830 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 831 u16 vec; 832 u32 id; 833 bool send_user_only; 834 u32 host_apf_flags; 835 unsigned long nested_apf_token; 836 bool delivery_as_pf_vmexit; 837 bool pageready_pending; 838 } apf; 839 840 /* OSVW MSRs (AMD only) */ 841 struct { 842 u64 length; 843 u64 status; 844 } osvw; 845 846 struct { 847 u64 msr_val; 848 struct gfn_to_hva_cache data; 849 } pv_eoi; 850 851 u64 msr_kvm_poll_control; 852 853 /* 854 * Indicates the guest is trying to write a gfn that contains one or 855 * more of the PTEs used to translate the write itself, i.e. the access 856 * is changing its own translation in the guest page tables. KVM exits 857 * to userspace if emulation of the faulting instruction fails and this 858 * flag is set, as KVM cannot make forward progress. 859 * 860 * If emulation fails for a write to guest page tables, KVM unprotects 861 * (zaps) the shadow page for the target gfn and resumes the guest to 862 * retry the non-emulatable instruction (on hardware). Unprotecting the 863 * gfn doesn't allow forward progress for a self-changing access because 864 * doing so also zaps the translation for the gfn, i.e. retrying the 865 * instruction will hit a !PRESENT fault, which results in a new shadow 866 * page and sends KVM back to square one. 867 */ 868 bool write_fault_to_shadow_pgtable; 869 870 /* set at EPT violation at this point */ 871 unsigned long exit_qualification; 872 873 /* pv related host specific info */ 874 struct { 875 bool pv_unhalted; 876 } pv; 877 878 int pending_ioapic_eoi; 879 int pending_external_vector; 880 881 /* be preempted when it's in kernel-mode(cpl=0) */ 882 bool preempted_in_kernel; 883 884 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 885 bool l1tf_flush_l1d; 886 887 /* Host CPU on which VM-entry was most recently attempted */ 888 int last_vmentry_cpu; 889 890 /* AMD MSRC001_0015 Hardware Configuration */ 891 u64 msr_hwcr; 892 893 /* pv related cpuid info */ 894 struct { 895 /* 896 * value of the eax register in the KVM_CPUID_FEATURES CPUID 897 * leaf. 898 */ 899 u32 features; 900 901 /* 902 * indicates whether pv emulation should be disabled if features 903 * are not present in the guest's cpuid 904 */ 905 bool enforce; 906 } pv_cpuid; 907 908 /* Protected Guests */ 909 bool guest_state_protected; 910 911 /* 912 * Set when PDPTS were loaded directly by the userspace without 913 * reading the guest memory 914 */ 915 bool pdptrs_from_userspace; 916 917 #if IS_ENABLED(CONFIG_HYPERV) 918 hpa_t hv_root_tdp; 919 #endif 920 }; 921 922 struct kvm_lpage_info { 923 int disallow_lpage; 924 }; 925 926 struct kvm_arch_memory_slot { 927 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 928 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 929 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 930 }; 931 932 /* 933 * We use as the mode the number of bits allocated in the LDR for the 934 * logical processor ID. It happens that these are all powers of two. 935 * This makes it is very easy to detect cases where the APICs are 936 * configured for multiple modes; in that case, we cannot use the map and 937 * hence cannot use kvm_irq_delivery_to_apic_fast either. 938 */ 939 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 940 #define KVM_APIC_MODE_XAPIC_FLAT 8 941 #define KVM_APIC_MODE_X2APIC 16 942 943 struct kvm_apic_map { 944 struct rcu_head rcu; 945 u8 mode; 946 u32 max_apic_id; 947 union { 948 struct kvm_lapic *xapic_flat_map[8]; 949 struct kvm_lapic *xapic_cluster_map[16][4]; 950 }; 951 struct kvm_lapic *phys_map[]; 952 }; 953 954 /* Hyper-V synthetic debugger (SynDbg)*/ 955 struct kvm_hv_syndbg { 956 struct { 957 u64 control; 958 u64 status; 959 u64 send_page; 960 u64 recv_page; 961 u64 pending_page; 962 } control; 963 u64 options; 964 }; 965 966 /* Current state of Hyper-V TSC page clocksource */ 967 enum hv_tsc_page_status { 968 /* TSC page was not set up or disabled */ 969 HV_TSC_PAGE_UNSET = 0, 970 /* TSC page MSR was written by the guest, update pending */ 971 HV_TSC_PAGE_GUEST_CHANGED, 972 /* TSC page MSR was written by KVM userspace, update pending */ 973 HV_TSC_PAGE_HOST_CHANGED, 974 /* TSC page was properly set up and is currently active */ 975 HV_TSC_PAGE_SET, 976 /* TSC page is currently being updated and therefore is inactive */ 977 HV_TSC_PAGE_UPDATING, 978 /* TSC page was set up with an inaccessible GPA */ 979 HV_TSC_PAGE_BROKEN, 980 }; 981 982 /* Hyper-V emulation context */ 983 struct kvm_hv { 984 struct mutex hv_lock; 985 u64 hv_guest_os_id; 986 u64 hv_hypercall; 987 u64 hv_tsc_page; 988 enum hv_tsc_page_status hv_tsc_page_status; 989 990 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 991 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 992 u64 hv_crash_ctl; 993 994 struct ms_hyperv_tsc_page tsc_ref; 995 996 struct idr conn_to_evt; 997 998 u64 hv_reenlightenment_control; 999 u64 hv_tsc_emulation_control; 1000 u64 hv_tsc_emulation_status; 1001 1002 /* How many vCPUs have VP index != vCPU index */ 1003 atomic_t num_mismatched_vp_indexes; 1004 1005 /* 1006 * How many SynICs use 'AutoEOI' feature 1007 * (protected by arch.apicv_update_lock) 1008 */ 1009 unsigned int synic_auto_eoi_used; 1010 1011 struct hv_partition_assist_pg *hv_pa_pg; 1012 struct kvm_hv_syndbg hv_syndbg; 1013 }; 1014 1015 struct msr_bitmap_range { 1016 u32 flags; 1017 u32 nmsrs; 1018 u32 base; 1019 unsigned long *bitmap; 1020 }; 1021 1022 /* Xen emulation context */ 1023 struct kvm_xen { 1024 bool long_mode; 1025 u8 upcall_vector; 1026 struct gfn_to_pfn_cache shinfo_cache; 1027 }; 1028 1029 enum kvm_irqchip_mode { 1030 KVM_IRQCHIP_NONE, 1031 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 1032 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 1033 }; 1034 1035 struct kvm_x86_msr_filter { 1036 u8 count; 1037 bool default_allow:1; 1038 struct msr_bitmap_range ranges[16]; 1039 }; 1040 1041 #define APICV_INHIBIT_REASON_DISABLE 0 1042 #define APICV_INHIBIT_REASON_HYPERV 1 1043 #define APICV_INHIBIT_REASON_NESTED 2 1044 #define APICV_INHIBIT_REASON_IRQWIN 3 1045 #define APICV_INHIBIT_REASON_PIT_REINJ 4 1046 #define APICV_INHIBIT_REASON_X2APIC 5 1047 #define APICV_INHIBIT_REASON_BLOCKIRQ 6 1048 #define APICV_INHIBIT_REASON_ABSENT 7 1049 1050 struct kvm_arch { 1051 unsigned long n_used_mmu_pages; 1052 unsigned long n_requested_mmu_pages; 1053 unsigned long n_max_mmu_pages; 1054 unsigned int indirect_shadow_pages; 1055 u8 mmu_valid_gen; 1056 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 1057 struct list_head active_mmu_pages; 1058 struct list_head zapped_obsolete_pages; 1059 struct list_head lpage_disallowed_mmu_pages; 1060 struct kvm_page_track_notifier_node mmu_sp_tracker; 1061 struct kvm_page_track_notifier_head track_notifier_head; 1062 /* 1063 * Protects marking pages unsync during page faults, as TDP MMU page 1064 * faults only take mmu_lock for read. For simplicity, the unsync 1065 * pages lock is always taken when marking pages unsync regardless of 1066 * whether mmu_lock is held for read or write. 1067 */ 1068 spinlock_t mmu_unsync_pages_lock; 1069 1070 struct list_head assigned_dev_head; 1071 struct iommu_domain *iommu_domain; 1072 bool iommu_noncoherent; 1073 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 1074 atomic_t noncoherent_dma_count; 1075 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 1076 atomic_t assigned_device_count; 1077 struct kvm_pic *vpic; 1078 struct kvm_ioapic *vioapic; 1079 struct kvm_pit *vpit; 1080 atomic_t vapics_in_nmi_mode; 1081 struct mutex apic_map_lock; 1082 struct kvm_apic_map __rcu *apic_map; 1083 atomic_t apic_map_dirty; 1084 1085 /* Protects apic_access_memslot_enabled and apicv_inhibit_reasons */ 1086 struct rw_semaphore apicv_update_lock; 1087 1088 bool apic_access_memslot_enabled; 1089 unsigned long apicv_inhibit_reasons; 1090 1091 gpa_t wall_clock; 1092 1093 bool mwait_in_guest; 1094 bool hlt_in_guest; 1095 bool pause_in_guest; 1096 bool cstate_in_guest; 1097 1098 unsigned long irq_sources_bitmap; 1099 s64 kvmclock_offset; 1100 1101 /* 1102 * This also protects nr_vcpus_matched_tsc which is read from a 1103 * preemption-disabled region, so it must be a raw spinlock. 1104 */ 1105 raw_spinlock_t tsc_write_lock; 1106 u64 last_tsc_nsec; 1107 u64 last_tsc_write; 1108 u32 last_tsc_khz; 1109 u64 last_tsc_offset; 1110 u64 cur_tsc_nsec; 1111 u64 cur_tsc_write; 1112 u64 cur_tsc_offset; 1113 u64 cur_tsc_generation; 1114 int nr_vcpus_matched_tsc; 1115 1116 seqcount_raw_spinlock_t pvclock_sc; 1117 bool use_master_clock; 1118 u64 master_kernel_ns; 1119 u64 master_cycle_now; 1120 struct delayed_work kvmclock_update_work; 1121 struct delayed_work kvmclock_sync_work; 1122 1123 struct kvm_xen_hvm_config xen_hvm_config; 1124 1125 /* reads protected by irq_srcu, writes by irq_lock */ 1126 struct hlist_head mask_notifier_list; 1127 1128 struct kvm_hv hyperv; 1129 struct kvm_xen xen; 1130 1131 #ifdef CONFIG_KVM_MMU_AUDIT 1132 int audit_point; 1133 #endif 1134 1135 bool backwards_tsc_observed; 1136 bool boot_vcpu_runs_old_kvmclock; 1137 u32 bsp_vcpu_id; 1138 1139 u64 disabled_quirks; 1140 int cpu_dirty_logging_count; 1141 1142 enum kvm_irqchip_mode irqchip_mode; 1143 u8 nr_reserved_ioapic_pins; 1144 1145 bool disabled_lapic_found; 1146 1147 bool x2apic_format; 1148 bool x2apic_broadcast_quirk_disabled; 1149 1150 bool guest_can_read_msr_platform_info; 1151 bool exception_payload_enabled; 1152 1153 bool bus_lock_detection_enabled; 1154 /* 1155 * If exit_on_emulation_error is set, and the in-kernel instruction 1156 * emulator fails to emulate an instruction, allow userspace 1157 * the opportunity to look at it. 1158 */ 1159 bool exit_on_emulation_error; 1160 1161 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 1162 u32 user_space_msr_mask; 1163 struct kvm_x86_msr_filter __rcu *msr_filter; 1164 1165 u32 hypercall_exit_enabled; 1166 1167 /* Guest can access the SGX PROVISIONKEY. */ 1168 bool sgx_provisioning_allowed; 1169 1170 struct kvm_pmu_event_filter __rcu *pmu_event_filter; 1171 struct task_struct *nx_lpage_recovery_thread; 1172 1173 #ifdef CONFIG_X86_64 1174 /* 1175 * Whether the TDP MMU is enabled for this VM. This contains a 1176 * snapshot of the TDP MMU module parameter from when the VM was 1177 * created and remains unchanged for the life of the VM. If this is 1178 * true, TDP MMU handler functions will run for various MMU 1179 * operations. 1180 */ 1181 bool tdp_mmu_enabled; 1182 1183 /* 1184 * List of struct kvm_mmu_pages being used as roots. 1185 * All struct kvm_mmu_pages in the list should have 1186 * tdp_mmu_page set. 1187 * 1188 * For reads, this list is protected by: 1189 * the MMU lock in read mode + RCU or 1190 * the MMU lock in write mode 1191 * 1192 * For writes, this list is protected by: 1193 * the MMU lock in read mode + the tdp_mmu_pages_lock or 1194 * the MMU lock in write mode 1195 * 1196 * Roots will remain in the list until their tdp_mmu_root_count 1197 * drops to zero, at which point the thread that decremented the 1198 * count to zero should removed the root from the list and clean 1199 * it up, freeing the root after an RCU grace period. 1200 */ 1201 struct list_head tdp_mmu_roots; 1202 1203 /* 1204 * List of struct kvmp_mmu_pages not being used as roots. 1205 * All struct kvm_mmu_pages in the list should have 1206 * tdp_mmu_page set and a tdp_mmu_root_count of 0. 1207 */ 1208 struct list_head tdp_mmu_pages; 1209 1210 /* 1211 * Protects accesses to the following fields when the MMU lock 1212 * is held in read mode: 1213 * - tdp_mmu_roots (above) 1214 * - tdp_mmu_pages (above) 1215 * - the link field of struct kvm_mmu_pages used by the TDP MMU 1216 * - lpage_disallowed_mmu_pages 1217 * - the lpage_disallowed_link field of struct kvm_mmu_pages used 1218 * by the TDP MMU 1219 * It is acceptable, but not necessary, to acquire this lock when 1220 * the thread holds the MMU lock in write mode. 1221 */ 1222 spinlock_t tdp_mmu_pages_lock; 1223 #endif /* CONFIG_X86_64 */ 1224 1225 /* 1226 * If set, at least one shadow root has been allocated. This flag 1227 * is used as one input when determining whether certain memslot 1228 * related allocations are necessary. 1229 */ 1230 bool shadow_root_allocated; 1231 1232 #if IS_ENABLED(CONFIG_HYPERV) 1233 hpa_t hv_root_tdp; 1234 spinlock_t hv_root_tdp_lock; 1235 #endif 1236 }; 1237 1238 struct kvm_vm_stat { 1239 struct kvm_vm_stat_generic generic; 1240 u64 mmu_shadow_zapped; 1241 u64 mmu_pte_write; 1242 u64 mmu_pde_zapped; 1243 u64 mmu_flooded; 1244 u64 mmu_recycled; 1245 u64 mmu_cache_miss; 1246 u64 mmu_unsync; 1247 union { 1248 struct { 1249 atomic64_t pages_4k; 1250 atomic64_t pages_2m; 1251 atomic64_t pages_1g; 1252 }; 1253 atomic64_t pages[KVM_NR_PAGE_SIZES]; 1254 }; 1255 u64 nx_lpage_splits; 1256 u64 max_mmu_page_hash_collisions; 1257 u64 max_mmu_rmap_size; 1258 }; 1259 1260 struct kvm_vcpu_stat { 1261 struct kvm_vcpu_stat_generic generic; 1262 u64 pf_fixed; 1263 u64 pf_guest; 1264 u64 tlb_flush; 1265 u64 invlpg; 1266 1267 u64 exits; 1268 u64 io_exits; 1269 u64 mmio_exits; 1270 u64 signal_exits; 1271 u64 irq_window_exits; 1272 u64 nmi_window_exits; 1273 u64 l1d_flush; 1274 u64 halt_exits; 1275 u64 request_irq_exits; 1276 u64 irq_exits; 1277 u64 host_state_reload; 1278 u64 fpu_reload; 1279 u64 insn_emulation; 1280 u64 insn_emulation_fail; 1281 u64 hypercalls; 1282 u64 irq_injections; 1283 u64 nmi_injections; 1284 u64 req_event; 1285 u64 nested_run; 1286 u64 directed_yield_attempted; 1287 u64 directed_yield_successful; 1288 u64 guest_mode; 1289 }; 1290 1291 struct x86_instruction_info; 1292 1293 struct msr_data { 1294 bool host_initiated; 1295 u32 index; 1296 u64 data; 1297 }; 1298 1299 struct kvm_lapic_irq { 1300 u32 vector; 1301 u16 delivery_mode; 1302 u16 dest_mode; 1303 bool level; 1304 u16 trig_mode; 1305 u32 shorthand; 1306 u32 dest_id; 1307 bool msi_redir_hint; 1308 }; 1309 1310 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1311 { 1312 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1313 } 1314 1315 struct kvm_x86_ops { 1316 const char *name; 1317 1318 int (*hardware_enable)(void); 1319 void (*hardware_disable)(void); 1320 void (*hardware_unsetup)(void); 1321 bool (*cpu_has_accelerated_tpr)(void); 1322 bool (*has_emulated_msr)(struct kvm *kvm, u32 index); 1323 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1324 1325 unsigned int vm_size; 1326 int (*vm_init)(struct kvm *kvm); 1327 void (*vm_destroy)(struct kvm *kvm); 1328 1329 /* Create, but do not attach this VCPU */ 1330 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1331 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1332 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1333 1334 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1335 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1336 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1337 1338 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1339 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1340 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1341 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1342 void (*get_segment)(struct kvm_vcpu *vcpu, 1343 struct kvm_segment *var, int seg); 1344 int (*get_cpl)(struct kvm_vcpu *vcpu); 1345 void (*set_segment)(struct kvm_vcpu *vcpu, 1346 struct kvm_segment *var, int seg); 1347 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1348 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1349 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1350 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1351 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1352 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1353 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1354 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1355 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1356 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1357 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1358 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1359 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1360 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1361 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1362 bool (*get_if_flag)(struct kvm_vcpu *vcpu); 1363 1364 void (*tlb_flush_all)(struct kvm_vcpu *vcpu); 1365 void (*tlb_flush_current)(struct kvm_vcpu *vcpu); 1366 int (*tlb_remote_flush)(struct kvm *kvm); 1367 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1368 struct kvm_tlb_range *range); 1369 1370 /* 1371 * Flush any TLB entries associated with the given GVA. 1372 * Does not need to flush GPA->HPA mappings. 1373 * Can potentially get non-canonical addresses through INVLPGs, which 1374 * the implementation may choose to ignore if appropriate. 1375 */ 1376 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1377 1378 /* 1379 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1380 * does not need to flush GPA->HPA mappings. 1381 */ 1382 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu); 1383 1384 int (*vcpu_pre_run)(struct kvm_vcpu *vcpu); 1385 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu); 1386 int (*handle_exit)(struct kvm_vcpu *vcpu, 1387 enum exit_fastpath_completion exit_fastpath); 1388 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1389 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1390 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1391 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1392 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1393 unsigned char *hypercall_addr); 1394 void (*set_irq)(struct kvm_vcpu *vcpu); 1395 void (*set_nmi)(struct kvm_vcpu *vcpu); 1396 void (*queue_exception)(struct kvm_vcpu *vcpu); 1397 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1398 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1399 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1400 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1401 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1402 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1403 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1404 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1405 bool (*check_apicv_inhibit_reasons)(ulong bit); 1406 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1407 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1408 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1409 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1410 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1411 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1412 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1413 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1414 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1415 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1416 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1417 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1418 1419 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa, 1420 int root_level); 1421 1422 bool (*has_wbinvd_exit)(void); 1423 1424 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu); 1425 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu); 1426 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1427 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier); 1428 1429 /* 1430 * Retrieve somewhat arbitrary exit information. Intended to 1431 * be used only from within tracepoints or error paths. 1432 */ 1433 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason, 1434 u64 *info1, u64 *info2, 1435 u32 *exit_int_info, u32 *exit_int_info_err_code); 1436 1437 int (*check_intercept)(struct kvm_vcpu *vcpu, 1438 struct x86_instruction_info *info, 1439 enum x86_intercept_stage stage, 1440 struct x86_exception *exception); 1441 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1442 1443 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1444 1445 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1446 1447 /* 1448 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero 1449 * value indicates CPU dirty logging is unsupported or disabled. 1450 */ 1451 int cpu_dirty_log_size; 1452 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu); 1453 1454 /* pmu operations of sub-arch */ 1455 const struct kvm_pmu_ops *pmu_ops; 1456 const struct kvm_x86_nested_ops *nested_ops; 1457 1458 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1459 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1460 1461 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1462 uint32_t guest_irq, bool set); 1463 void (*start_assignment)(struct kvm *kvm); 1464 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1465 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1466 1467 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1468 bool *expired); 1469 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1470 1471 void (*setup_mce)(struct kvm_vcpu *vcpu); 1472 1473 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1474 int (*enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1475 int (*leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1476 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1477 1478 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1479 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1480 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1481 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1482 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1483 1484 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1485 1486 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len); 1487 1488 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1489 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1490 1491 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1492 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1493 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); 1494 1495 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); 1496 }; 1497 1498 struct kvm_x86_nested_ops { 1499 int (*check_events)(struct kvm_vcpu *vcpu); 1500 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1501 void (*triple_fault)(struct kvm_vcpu *vcpu); 1502 int (*get_state)(struct kvm_vcpu *vcpu, 1503 struct kvm_nested_state __user *user_kvm_nested_state, 1504 unsigned user_data_size); 1505 int (*set_state)(struct kvm_vcpu *vcpu, 1506 struct kvm_nested_state __user *user_kvm_nested_state, 1507 struct kvm_nested_state *kvm_state); 1508 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1509 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1510 1511 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1512 uint16_t *vmcs_version); 1513 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1514 }; 1515 1516 struct kvm_x86_init_ops { 1517 int (*cpu_has_kvm_support)(void); 1518 int (*disabled_by_bios)(void); 1519 int (*check_processor_compatibility)(void); 1520 int (*hardware_setup)(void); 1521 unsigned int (*handle_intel_pt_intr)(void); 1522 1523 struct kvm_x86_ops *runtime_ops; 1524 }; 1525 1526 struct kvm_arch_async_pf { 1527 u32 token; 1528 gfn_t gfn; 1529 unsigned long cr3; 1530 bool direct_map; 1531 }; 1532 1533 extern u32 __read_mostly kvm_nr_uret_msrs; 1534 extern u64 __read_mostly host_efer; 1535 extern bool __read_mostly allow_smaller_maxphyaddr; 1536 extern bool __read_mostly enable_apicv; 1537 extern struct kvm_x86_ops kvm_x86_ops; 1538 1539 #define KVM_X86_OP(func) \ 1540 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func)); 1541 #define KVM_X86_OP_NULL KVM_X86_OP 1542 #include <asm/kvm-x86-ops.h> 1543 1544 static inline void kvm_ops_static_call_update(void) 1545 { 1546 #define KVM_X86_OP(func) \ 1547 static_call_update(kvm_x86_##func, kvm_x86_ops.func); 1548 #define KVM_X86_OP_NULL KVM_X86_OP 1549 #include <asm/kvm-x86-ops.h> 1550 } 1551 1552 #define __KVM_HAVE_ARCH_VM_ALLOC 1553 static inline struct kvm *kvm_arch_alloc_vm(void) 1554 { 1555 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1556 } 1557 1558 #define __KVM_HAVE_ARCH_VM_FREE 1559 void kvm_arch_free_vm(struct kvm *kvm); 1560 1561 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1562 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1563 { 1564 if (kvm_x86_ops.tlb_remote_flush && 1565 !static_call(kvm_x86_tlb_remote_flush)(kvm)) 1566 return 0; 1567 else 1568 return -ENOTSUPP; 1569 } 1570 1571 #define kvm_arch_pmi_in_guest(vcpu) \ 1572 ((vcpu) && (vcpu)->arch.handling_intr_from_guest) 1573 1574 int kvm_mmu_module_init(void); 1575 void kvm_mmu_module_exit(void); 1576 1577 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1578 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1579 void kvm_mmu_init_vm(struct kvm *kvm); 1580 void kvm_mmu_uninit_vm(struct kvm *kvm); 1581 1582 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu); 1583 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1584 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1585 const struct kvm_memory_slot *memslot, 1586 int start_level); 1587 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1588 const struct kvm_memory_slot *memslot); 1589 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1590 const struct kvm_memory_slot *memslot); 1591 void kvm_mmu_zap_all(struct kvm *kvm); 1592 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1593 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1594 1595 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); 1596 1597 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1598 const void *val, int bytes); 1599 1600 struct kvm_irq_mask_notifier { 1601 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1602 int irq; 1603 struct hlist_node link; 1604 }; 1605 1606 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1607 struct kvm_irq_mask_notifier *kimn); 1608 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1609 struct kvm_irq_mask_notifier *kimn); 1610 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1611 bool mask); 1612 1613 extern bool tdp_enabled; 1614 1615 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1616 1617 /* control of guest tsc rate supported? */ 1618 extern bool kvm_has_tsc_control; 1619 /* maximum supported tsc_khz for guests */ 1620 extern u32 kvm_max_guest_tsc_khz; 1621 /* number of bits of the fractional part of the TSC scaling ratio */ 1622 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1623 /* maximum allowed value of TSC scaling ratio */ 1624 extern u64 kvm_max_tsc_scaling_ratio; 1625 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1626 extern u64 kvm_default_tsc_scaling_ratio; 1627 /* bus lock detection supported? */ 1628 extern bool kvm_has_bus_lock_exit; 1629 1630 extern u64 kvm_mce_cap_supported; 1631 1632 /* 1633 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1634 * userspace I/O) to indicate that the emulation context 1635 * should be reused as is, i.e. skip initialization of 1636 * emulation context, instruction fetch and decode. 1637 * 1638 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1639 * Indicates that only select instructions (tagged with 1640 * EmulateOnUD) should be emulated (to minimize the emulator 1641 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1642 * 1643 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1644 * decode the instruction length. For use *only* by 1645 * kvm_x86_ops.skip_emulated_instruction() implementations if 1646 * EMULTYPE_COMPLETE_USER_EXIT is not set. 1647 * 1648 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1649 * retry native execution under certain conditions, 1650 * Can only be set in conjunction with EMULTYPE_PF. 1651 * 1652 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1653 * triggered by KVM's magic "force emulation" prefix, 1654 * which is opt in via module param (off by default). 1655 * Bypasses EmulateOnUD restriction despite emulating 1656 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1657 * Used to test the full emulator from userspace. 1658 * 1659 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1660 * backdoor emulation, which is opt in via module param. 1661 * VMware backdoor emulation handles select instructions 1662 * and reinjects the #GP for all other cases. 1663 * 1664 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1665 * case the CR2/GPA value pass on the stack is valid. 1666 * 1667 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility 1668 * state and inject single-step #DBs after skipping 1669 * an instruction (after completing userspace I/O). 1670 */ 1671 #define EMULTYPE_NO_DECODE (1 << 0) 1672 #define EMULTYPE_TRAP_UD (1 << 1) 1673 #define EMULTYPE_SKIP (1 << 2) 1674 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1675 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1676 #define EMULTYPE_VMWARE_GP (1 << 5) 1677 #define EMULTYPE_PF (1 << 6) 1678 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7) 1679 1680 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1681 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1682 void *insn, int insn_len); 1683 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, 1684 u64 *data, u8 ndata); 1685 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu); 1686 1687 void kvm_enable_efer_bits(u64); 1688 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1689 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1690 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1691 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1692 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1693 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1694 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu); 1695 int kvm_emulate_invd(struct kvm_vcpu *vcpu); 1696 int kvm_emulate_mwait(struct kvm_vcpu *vcpu); 1697 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu); 1698 int kvm_emulate_monitor(struct kvm_vcpu *vcpu); 1699 1700 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1701 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1702 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1703 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu); 1704 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu); 1705 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1706 1707 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1708 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1709 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1710 1711 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1712 int reason, bool has_error_code, u32 error_code); 1713 1714 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0); 1715 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4); 1716 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1717 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1718 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1719 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1720 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1721 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1722 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1723 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1724 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1725 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu); 1726 1727 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1728 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1729 1730 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1731 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1732 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu); 1733 1734 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1735 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1736 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1737 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1738 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1739 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1740 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1741 struct x86_exception *fault); 1742 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1743 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1744 1745 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1746 int irq_source_id, int level) 1747 { 1748 /* Logical OR for level trig interrupt */ 1749 if (level) 1750 __set_bit(irq_source_id, irq_state); 1751 else 1752 __clear_bit(irq_source_id, irq_state); 1753 1754 return !!(*irq_state); 1755 } 1756 1757 #define KVM_MMU_ROOT_CURRENT BIT(0) 1758 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1759 #define KVM_MMU_ROOTS_ALL (~0UL) 1760 1761 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1762 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1763 1764 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1765 1766 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1767 1768 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1769 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1770 ulong roots_to_free); 1771 void kvm_mmu_free_guest_mode_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu); 1772 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1773 struct x86_exception *exception); 1774 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1775 struct x86_exception *exception); 1776 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1777 struct x86_exception *exception); 1778 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1779 struct x86_exception *exception); 1780 1781 bool kvm_apicv_activated(struct kvm *kvm); 1782 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1783 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1784 unsigned long bit); 1785 1786 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, 1787 unsigned long bit); 1788 1789 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1790 1791 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1792 void *insn, int insn_len); 1793 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1794 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1795 gva_t gva, hpa_t root_hpa); 1796 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1797 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd); 1798 1799 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level, 1800 int tdp_max_root_level, int tdp_huge_page_level); 1801 1802 static inline u16 kvm_read_ldt(void) 1803 { 1804 u16 ldt; 1805 asm("sldt %0" : "=g"(ldt)); 1806 return ldt; 1807 } 1808 1809 static inline void kvm_load_ldt(u16 sel) 1810 { 1811 asm("lldt %0" : : "rm"(sel)); 1812 } 1813 1814 #ifdef CONFIG_X86_64 1815 static inline unsigned long read_msr(unsigned long msr) 1816 { 1817 u64 value; 1818 1819 rdmsrl(msr, value); 1820 return value; 1821 } 1822 #endif 1823 1824 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1825 { 1826 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1827 } 1828 1829 #define TSS_IOPB_BASE_OFFSET 0x66 1830 #define TSS_BASE_SIZE 0x68 1831 #define TSS_IOPB_SIZE (65536 / 8) 1832 #define TSS_REDIRECTION_SIZE (256 / 8) 1833 #define RMODE_TSS_SIZE \ 1834 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1835 1836 enum { 1837 TASK_SWITCH_CALL = 0, 1838 TASK_SWITCH_IRET = 1, 1839 TASK_SWITCH_JMP = 2, 1840 TASK_SWITCH_GATE = 3, 1841 }; 1842 1843 #define HF_GIF_MASK (1 << 0) 1844 #define HF_NMI_MASK (1 << 3) 1845 #define HF_IRET_MASK (1 << 4) 1846 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1847 #define HF_SMM_MASK (1 << 6) 1848 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1849 1850 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1851 #define KVM_ADDRESS_SPACE_NUM 2 1852 1853 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1854 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1855 1856 #define KVM_ARCH_WANT_MMU_NOTIFIER 1857 1858 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1859 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1860 int kvm_cpu_has_extint(struct kvm_vcpu *v); 1861 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1862 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1863 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1864 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1865 1866 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1867 unsigned long ipi_bitmap_high, u32 min, 1868 unsigned long icr, int op_64_bit); 1869 1870 int kvm_add_user_return_msr(u32 msr); 1871 int kvm_find_user_return_msr(u32 msr); 1872 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1873 1874 static inline bool kvm_is_supported_user_return_msr(u32 msr) 1875 { 1876 return kvm_find_user_return_msr(msr) >= 0; 1877 } 1878 1879 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio); 1880 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1881 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier); 1882 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier); 1883 1884 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1885 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1886 1887 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1888 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1889 unsigned long *vcpu_bitmap); 1890 1891 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1892 struct kvm_async_pf *work); 1893 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1894 struct kvm_async_pf *work); 1895 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1896 struct kvm_async_pf *work); 1897 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1898 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1899 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1900 1901 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1902 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1903 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1904 1905 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, 1906 u32 size); 1907 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1908 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1909 1910 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1911 struct kvm_vcpu **dest_vcpu); 1912 1913 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1914 struct kvm_lapic_irq *irq); 1915 1916 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1917 { 1918 /* We can only post Fixed and LowPrio IRQs */ 1919 return (irq->delivery_mode == APIC_DM_FIXED || 1920 irq->delivery_mode == APIC_DM_LOWEST); 1921 } 1922 1923 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1924 { 1925 static_call_cond(kvm_x86_vcpu_blocking)(vcpu); 1926 } 1927 1928 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1929 { 1930 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu); 1931 } 1932 1933 static inline int kvm_cpu_get_apicid(int mps_cpu) 1934 { 1935 #ifdef CONFIG_X86_LOCAL_APIC 1936 return default_cpu_present_to_apicid(mps_cpu); 1937 #else 1938 WARN_ON_ONCE(1); 1939 return BAD_APICID; 1940 #endif 1941 } 1942 1943 #define put_smstate(type, buf, offset, val) \ 1944 *(type *)((buf) + (offset) - 0x7e00) = val 1945 1946 #define GET_SMSTATE(type, buf, offset) \ 1947 (*(type *)((buf) + (offset) - 0x7e00)) 1948 1949 int kvm_cpu_dirty_log_size(void); 1950 1951 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages); 1952 1953 #define KVM_CLOCK_VALID_FLAGS \ 1954 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC) 1955 1956 #endif /* _ASM_X86_KVM_HOST_H */ 1957