1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 #include <linux/irq.h> 21 22 #include <linux/kvm.h> 23 #include <linux/kvm_para.h> 24 #include <linux/kvm_types.h> 25 #include <linux/perf_event.h> 26 #include <linux/pvclock_gtod.h> 27 #include <linux/clocksource.h> 28 #include <linux/irqbypass.h> 29 #include <linux/hyperv.h> 30 31 #include <asm/apic.h> 32 #include <asm/pvclock-abi.h> 33 #include <asm/desc.h> 34 #include <asm/mtrr.h> 35 #include <asm/msr-index.h> 36 #include <asm/asm.h> 37 #include <asm/kvm_page_track.h> 38 #include <asm/hyperv-tlfs.h> 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 #define KVM_USER_MEM_SLOTS 509 44 /* memory slots that are not exposed to userspace */ 45 #define KVM_PRIVATE_MEM_SLOTS 3 46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 47 48 #define KVM_HALT_POLL_NS_DEFAULT 200000 49 50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 51 52 /* x86-specific vcpu->requests bit members */ 53 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 54 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 55 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 56 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 57 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 58 #define KVM_REQ_LOAD_CR3 KVM_ARCH_REQ(5) 59 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 60 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 61 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 62 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 63 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 64 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 65 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 66 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 67 #define KVM_REQ_MCLOCK_INPROGRESS \ 68 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 69 #define KVM_REQ_SCAN_IOAPIC \ 70 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 71 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 72 #define KVM_REQ_APIC_PAGE_RELOAD \ 73 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 74 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 75 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 76 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 77 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 78 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 79 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 80 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24) 81 82 #define CR0_RESERVED_BITS \ 83 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 84 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 85 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 86 87 #define CR4_RESERVED_BITS \ 88 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 89 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 90 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 91 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 92 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 93 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 94 95 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 96 97 98 99 #define INVALID_PAGE (~(hpa_t)0) 100 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 101 102 #define UNMAPPED_GVA (~(gpa_t)0) 103 104 /* KVM Hugepage definitions for x86 */ 105 #define KVM_NR_PAGE_SIZES 3 106 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 107 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 108 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 109 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 110 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 111 112 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 113 { 114 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 115 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 116 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 117 } 118 119 #define KVM_PERMILLE_MMU_PAGES 20 120 #define KVM_MIN_ALLOC_MMU_PAGES 64 121 #define KVM_MMU_HASH_SHIFT 12 122 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 123 #define KVM_MIN_FREE_MMU_PAGES 5 124 #define KVM_REFILL_PAGES 25 125 #define KVM_MAX_CPUID_ENTRIES 80 126 #define KVM_NR_FIXED_MTRR_REGION 88 127 #define KVM_NR_VAR_MTRR 8 128 129 #define ASYNC_PF_PER_VCPU 64 130 131 enum kvm_reg { 132 VCPU_REGS_RAX = 0, 133 VCPU_REGS_RCX = 1, 134 VCPU_REGS_RDX = 2, 135 VCPU_REGS_RBX = 3, 136 VCPU_REGS_RSP = 4, 137 VCPU_REGS_RBP = 5, 138 VCPU_REGS_RSI = 6, 139 VCPU_REGS_RDI = 7, 140 #ifdef CONFIG_X86_64 141 VCPU_REGS_R8 = 8, 142 VCPU_REGS_R9 = 9, 143 VCPU_REGS_R10 = 10, 144 VCPU_REGS_R11 = 11, 145 VCPU_REGS_R12 = 12, 146 VCPU_REGS_R13 = 13, 147 VCPU_REGS_R14 = 14, 148 VCPU_REGS_R15 = 15, 149 #endif 150 VCPU_REGS_RIP, 151 NR_VCPU_REGS 152 }; 153 154 enum kvm_reg_ex { 155 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 156 VCPU_EXREG_CR3, 157 VCPU_EXREG_RFLAGS, 158 VCPU_EXREG_SEGMENTS, 159 }; 160 161 enum { 162 VCPU_SREG_ES, 163 VCPU_SREG_CS, 164 VCPU_SREG_SS, 165 VCPU_SREG_DS, 166 VCPU_SREG_FS, 167 VCPU_SREG_GS, 168 VCPU_SREG_TR, 169 VCPU_SREG_LDTR, 170 }; 171 172 #include <asm/kvm_emulate.h> 173 174 #define KVM_NR_MEM_OBJS 40 175 176 #define KVM_NR_DB_REGS 4 177 178 #define DR6_BD (1 << 13) 179 #define DR6_BS (1 << 14) 180 #define DR6_RTM (1 << 16) 181 #define DR6_FIXED_1 0xfffe0ff0 182 #define DR6_INIT 0xffff0ff0 183 #define DR6_VOLATILE 0x0001e00f 184 185 #define DR7_BP_EN_MASK 0x000000ff 186 #define DR7_GE (1 << 9) 187 #define DR7_GD (1 << 13) 188 #define DR7_FIXED_1 0x00000400 189 #define DR7_VOLATILE 0xffff2bff 190 191 #define PFERR_PRESENT_BIT 0 192 #define PFERR_WRITE_BIT 1 193 #define PFERR_USER_BIT 2 194 #define PFERR_RSVD_BIT 3 195 #define PFERR_FETCH_BIT 4 196 #define PFERR_PK_BIT 5 197 #define PFERR_GUEST_FINAL_BIT 32 198 #define PFERR_GUEST_PAGE_BIT 33 199 200 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 201 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 202 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 203 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 204 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 205 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 206 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 207 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 208 209 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 210 PFERR_WRITE_MASK | \ 211 PFERR_PRESENT_MASK) 212 213 /* 214 * The mask used to denote special SPTEs, which can be either MMIO SPTEs or 215 * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting 216 * with the SVE bit in EPT PTEs. 217 */ 218 #define SPTE_SPECIAL_MASK (1ULL << 62) 219 220 /* apic attention bits */ 221 #define KVM_APIC_CHECK_VAPIC 0 222 /* 223 * The following bit is set with PV-EOI, unset on EOI. 224 * We detect PV-EOI changes by guest by comparing 225 * this bit with PV-EOI in guest memory. 226 * See the implementation in apic_update_pv_eoi. 227 */ 228 #define KVM_APIC_PV_EOI_PENDING 1 229 230 struct kvm_kernel_irq_routing_entry; 231 232 /* 233 * We don't want allocation failures within the mmu code, so we preallocate 234 * enough memory for a single page fault in a cache. 235 */ 236 struct kvm_mmu_memory_cache { 237 int nobjs; 238 void *objects[KVM_NR_MEM_OBJS]; 239 }; 240 241 /* 242 * the pages used as guest page table on soft mmu are tracked by 243 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 244 * by indirect shadow page can not be more than 15 bits. 245 * 246 * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access, 247 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 248 */ 249 union kvm_mmu_page_role { 250 unsigned word; 251 struct { 252 unsigned level:4; 253 unsigned cr4_pae:1; 254 unsigned quadrant:2; 255 unsigned direct:1; 256 unsigned access:3; 257 unsigned invalid:1; 258 unsigned nxe:1; 259 unsigned cr0_wp:1; 260 unsigned smep_andnot_wp:1; 261 unsigned smap_andnot_wp:1; 262 unsigned ad_disabled:1; 263 unsigned guest_mode:1; 264 unsigned :6; 265 266 /* 267 * This is left at the top of the word so that 268 * kvm_memslots_for_spte_role can extract it with a 269 * simple shift. While there is room, give it a whole 270 * byte so it is also faster to load it from memory. 271 */ 272 unsigned smm:8; 273 }; 274 }; 275 276 struct kvm_rmap_head { 277 unsigned long val; 278 }; 279 280 struct kvm_mmu_page { 281 struct list_head link; 282 struct hlist_node hash_link; 283 284 /* 285 * The following two entries are used to key the shadow page in the 286 * hash table. 287 */ 288 gfn_t gfn; 289 union kvm_mmu_page_role role; 290 291 u64 *spt; 292 /* hold the gfn of each spte inside spt */ 293 gfn_t *gfns; 294 bool unsync; 295 int root_count; /* Currently serving as active root */ 296 unsigned int unsync_children; 297 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 298 299 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 300 unsigned long mmu_valid_gen; 301 302 DECLARE_BITMAP(unsync_child_bitmap, 512); 303 304 #ifdef CONFIG_X86_32 305 /* 306 * Used out of the mmu-lock to avoid reading spte values while an 307 * update is in progress; see the comments in __get_spte_lockless(). 308 */ 309 int clear_spte_count; 310 #endif 311 312 /* Number of writes since the last time traversal visited this page. */ 313 atomic_t write_flooding_count; 314 }; 315 316 struct kvm_pio_request { 317 unsigned long count; 318 int in; 319 int port; 320 int size; 321 }; 322 323 #define PT64_ROOT_MAX_LEVEL 5 324 325 struct rsvd_bits_validate { 326 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 327 u64 bad_mt_xwr; 328 }; 329 330 struct kvm_mmu_root_info { 331 gpa_t cr3; 332 hpa_t hpa; 333 }; 334 335 #define KVM_MMU_ROOT_INFO_INVALID \ 336 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE }) 337 338 #define KVM_MMU_NUM_PREV_ROOTS 3 339 340 /* 341 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 342 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 343 * current mmu mode. 344 */ 345 struct kvm_mmu { 346 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 347 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 348 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 349 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 350 bool prefault); 351 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 352 struct x86_exception *fault); 353 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 354 struct x86_exception *exception); 355 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 356 struct x86_exception *exception); 357 int (*sync_page)(struct kvm_vcpu *vcpu, 358 struct kvm_mmu_page *sp); 359 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 360 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 361 u64 *spte, const void *pte); 362 hpa_t root_hpa; 363 union kvm_mmu_page_role base_role; 364 u8 root_level; 365 u8 shadow_root_level; 366 u8 ept_ad; 367 bool direct_map; 368 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 369 370 /* 371 * Bitmap; bit set = permission fault 372 * Byte index: page fault error code [4:1] 373 * Bit index: pte permissions in ACC_* format 374 */ 375 u8 permissions[16]; 376 377 /* 378 * The pkru_mask indicates if protection key checks are needed. It 379 * consists of 16 domains indexed by page fault error code bits [4:1], 380 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 381 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 382 */ 383 u32 pkru_mask; 384 385 u64 *pae_root; 386 u64 *lm_root; 387 388 /* 389 * check zero bits on shadow page table entries, these 390 * bits include not only hardware reserved bits but also 391 * the bits spte never used. 392 */ 393 struct rsvd_bits_validate shadow_zero_check; 394 395 struct rsvd_bits_validate guest_rsvd_check; 396 397 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 398 u8 last_nonleaf_level; 399 400 bool nx; 401 402 u64 pdptrs[4]; /* pae */ 403 }; 404 405 enum pmc_type { 406 KVM_PMC_GP = 0, 407 KVM_PMC_FIXED, 408 }; 409 410 struct kvm_pmc { 411 enum pmc_type type; 412 u8 idx; 413 u64 counter; 414 u64 eventsel; 415 struct perf_event *perf_event; 416 struct kvm_vcpu *vcpu; 417 }; 418 419 struct kvm_pmu { 420 unsigned nr_arch_gp_counters; 421 unsigned nr_arch_fixed_counters; 422 unsigned available_event_types; 423 u64 fixed_ctr_ctrl; 424 u64 global_ctrl; 425 u64 global_status; 426 u64 global_ovf_ctrl; 427 u64 counter_bitmask[2]; 428 u64 global_ctrl_mask; 429 u64 reserved_bits; 430 u8 version; 431 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 432 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 433 struct irq_work irq_work; 434 u64 reprogram_pmi; 435 }; 436 437 struct kvm_pmu_ops; 438 439 enum { 440 KVM_DEBUGREG_BP_ENABLED = 1, 441 KVM_DEBUGREG_WONT_EXIT = 2, 442 KVM_DEBUGREG_RELOAD = 4, 443 }; 444 445 struct kvm_mtrr_range { 446 u64 base; 447 u64 mask; 448 struct list_head node; 449 }; 450 451 struct kvm_mtrr { 452 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 453 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 454 u64 deftype; 455 456 struct list_head head; 457 }; 458 459 /* Hyper-V SynIC timer */ 460 struct kvm_vcpu_hv_stimer { 461 struct hrtimer timer; 462 int index; 463 u64 config; 464 u64 count; 465 u64 exp_time; 466 struct hv_message msg; 467 bool msg_pending; 468 }; 469 470 /* Hyper-V synthetic interrupt controller (SynIC)*/ 471 struct kvm_vcpu_hv_synic { 472 u64 version; 473 u64 control; 474 u64 msg_page; 475 u64 evt_page; 476 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 477 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 478 DECLARE_BITMAP(auto_eoi_bitmap, 256); 479 DECLARE_BITMAP(vec_bitmap, 256); 480 bool active; 481 bool dont_zero_synic_pages; 482 }; 483 484 /* Hyper-V per vcpu emulation context */ 485 struct kvm_vcpu_hv { 486 u32 vp_index; 487 u64 hv_vapic; 488 s64 runtime_offset; 489 struct kvm_vcpu_hv_synic synic; 490 struct kvm_hyperv_exit exit; 491 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 492 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 493 cpumask_t tlb_lush; 494 }; 495 496 struct kvm_vcpu_arch { 497 /* 498 * rip and regs accesses must go through 499 * kvm_{register,rip}_{read,write} functions. 500 */ 501 unsigned long regs[NR_VCPU_REGS]; 502 u32 regs_avail; 503 u32 regs_dirty; 504 505 unsigned long cr0; 506 unsigned long cr0_guest_owned_bits; 507 unsigned long cr2; 508 unsigned long cr3; 509 unsigned long cr4; 510 unsigned long cr4_guest_owned_bits; 511 unsigned long cr8; 512 u32 pkru; 513 u32 hflags; 514 u64 efer; 515 u64 apic_base; 516 struct kvm_lapic *apic; /* kernel irqchip context */ 517 bool apicv_active; 518 bool load_eoi_exitmap_pending; 519 DECLARE_BITMAP(ioapic_handled_vectors, 256); 520 unsigned long apic_attention; 521 int32_t apic_arb_prio; 522 int mp_state; 523 u64 ia32_misc_enable_msr; 524 u64 smbase; 525 u64 smi_count; 526 bool tpr_access_reporting; 527 u64 ia32_xss; 528 u64 microcode_version; 529 530 /* 531 * Paging state of the vcpu 532 * 533 * If the vcpu runs in guest mode with two level paging this still saves 534 * the paging mode of the l1 guest. This context is always used to 535 * handle faults. 536 */ 537 struct kvm_mmu mmu; 538 539 /* 540 * Paging state of an L2 guest (used for nested npt) 541 * 542 * This context will save all necessary information to walk page tables 543 * of the an L2 guest. This context is only initialized for page table 544 * walking and not for faulting since we never handle l2 page faults on 545 * the host. 546 */ 547 struct kvm_mmu nested_mmu; 548 549 /* 550 * Pointer to the mmu context currently used for 551 * gva_to_gpa translations. 552 */ 553 struct kvm_mmu *walk_mmu; 554 555 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 556 struct kvm_mmu_memory_cache mmu_page_cache; 557 struct kvm_mmu_memory_cache mmu_page_header_cache; 558 559 /* 560 * QEMU userspace and the guest each have their own FPU state. 561 * In vcpu_run, we switch between the user and guest FPU contexts. 562 * While running a VCPU, the VCPU thread will have the guest FPU 563 * context. 564 * 565 * Note that while the PKRU state lives inside the fpu registers, 566 * it is switched out separately at VMENTER and VMEXIT time. The 567 * "guest_fpu" state here contains the guest FPU context, with the 568 * host PRKU bits. 569 */ 570 struct fpu user_fpu; 571 struct fpu guest_fpu; 572 573 u64 xcr0; 574 u64 guest_supported_xcr0; 575 u32 guest_xstate_size; 576 577 struct kvm_pio_request pio; 578 void *pio_data; 579 580 u8 event_exit_inst_len; 581 582 struct kvm_queued_exception { 583 bool pending; 584 bool injected; 585 bool has_error_code; 586 u8 nr; 587 u32 error_code; 588 u8 nested_apf; 589 } exception; 590 591 struct kvm_queued_interrupt { 592 bool injected; 593 bool soft; 594 u8 nr; 595 } interrupt; 596 597 int halt_request; /* real mode on Intel only */ 598 599 int cpuid_nent; 600 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 601 602 int maxphyaddr; 603 604 /* emulate context */ 605 606 struct x86_emulate_ctxt emulate_ctxt; 607 bool emulate_regs_need_sync_to_vcpu; 608 bool emulate_regs_need_sync_from_vcpu; 609 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 610 611 gpa_t time; 612 struct pvclock_vcpu_time_info hv_clock; 613 unsigned int hw_tsc_khz; 614 struct gfn_to_hva_cache pv_time; 615 bool pv_time_enabled; 616 /* set guest stopped flag in pvclock flags field */ 617 bool pvclock_set_guest_stopped_request; 618 619 struct { 620 u64 msr_val; 621 u64 last_steal; 622 struct gfn_to_hva_cache stime; 623 struct kvm_steal_time steal; 624 } st; 625 626 u64 tsc_offset; 627 u64 last_guest_tsc; 628 u64 last_host_tsc; 629 u64 tsc_offset_adjustment; 630 u64 this_tsc_nsec; 631 u64 this_tsc_write; 632 u64 this_tsc_generation; 633 bool tsc_catchup; 634 bool tsc_always_catchup; 635 s8 virtual_tsc_shift; 636 u32 virtual_tsc_mult; 637 u32 virtual_tsc_khz; 638 s64 ia32_tsc_adjust_msr; 639 u64 tsc_scaling_ratio; 640 641 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 642 unsigned nmi_pending; /* NMI queued after currently running handler */ 643 bool nmi_injected; /* Trying to inject an NMI this entry */ 644 bool smi_pending; /* SMI queued after currently running handler */ 645 646 struct kvm_mtrr mtrr_state; 647 u64 pat; 648 649 unsigned switch_db_regs; 650 unsigned long db[KVM_NR_DB_REGS]; 651 unsigned long dr6; 652 unsigned long dr7; 653 unsigned long eff_db[KVM_NR_DB_REGS]; 654 unsigned long guest_debug_dr7; 655 u64 msr_platform_info; 656 u64 msr_misc_features_enables; 657 658 u64 mcg_cap; 659 u64 mcg_status; 660 u64 mcg_ctl; 661 u64 mcg_ext_ctl; 662 u64 *mce_banks; 663 664 /* Cache MMIO info */ 665 u64 mmio_gva; 666 unsigned access; 667 gfn_t mmio_gfn; 668 u64 mmio_gen; 669 670 struct kvm_pmu pmu; 671 672 /* used for guest single stepping over the given code position */ 673 unsigned long singlestep_rip; 674 675 struct kvm_vcpu_hv hyperv; 676 677 cpumask_var_t wbinvd_dirty_mask; 678 679 unsigned long last_retry_eip; 680 unsigned long last_retry_addr; 681 682 struct { 683 bool halted; 684 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 685 struct gfn_to_hva_cache data; 686 u64 msr_val; 687 u32 id; 688 bool send_user_only; 689 u32 host_apf_reason; 690 unsigned long nested_apf_token; 691 bool delivery_as_pf_vmexit; 692 } apf; 693 694 /* OSVW MSRs (AMD only) */ 695 struct { 696 u64 length; 697 u64 status; 698 } osvw; 699 700 struct { 701 u64 msr_val; 702 struct gfn_to_hva_cache data; 703 } pv_eoi; 704 705 /* 706 * Indicate whether the access faults on its page table in guest 707 * which is set when fix page fault and used to detect unhandeable 708 * instruction. 709 */ 710 bool write_fault_to_shadow_pgtable; 711 712 /* set at EPT violation at this point */ 713 unsigned long exit_qualification; 714 715 /* pv related host specific info */ 716 struct { 717 bool pv_unhalted; 718 } pv; 719 720 int pending_ioapic_eoi; 721 int pending_external_vector; 722 723 /* GPA available */ 724 bool gpa_available; 725 gpa_t gpa_val; 726 727 /* be preempted when it's in kernel-mode(cpl=0) */ 728 bool preempted_in_kernel; 729 730 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 731 bool l1tf_flush_l1d; 732 }; 733 734 struct kvm_lpage_info { 735 int disallow_lpage; 736 }; 737 738 struct kvm_arch_memory_slot { 739 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 740 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 741 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 742 }; 743 744 /* 745 * We use as the mode the number of bits allocated in the LDR for the 746 * logical processor ID. It happens that these are all powers of two. 747 * This makes it is very easy to detect cases where the APICs are 748 * configured for multiple modes; in that case, we cannot use the map and 749 * hence cannot use kvm_irq_delivery_to_apic_fast either. 750 */ 751 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 752 #define KVM_APIC_MODE_XAPIC_FLAT 8 753 #define KVM_APIC_MODE_X2APIC 16 754 755 struct kvm_apic_map { 756 struct rcu_head rcu; 757 u8 mode; 758 u32 max_apic_id; 759 union { 760 struct kvm_lapic *xapic_flat_map[8]; 761 struct kvm_lapic *xapic_cluster_map[16][4]; 762 }; 763 struct kvm_lapic *phys_map[]; 764 }; 765 766 /* Hyper-V emulation context */ 767 struct kvm_hv { 768 struct mutex hv_lock; 769 u64 hv_guest_os_id; 770 u64 hv_hypercall; 771 u64 hv_tsc_page; 772 773 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 774 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 775 u64 hv_crash_ctl; 776 777 HV_REFERENCE_TSC_PAGE tsc_ref; 778 779 struct idr conn_to_evt; 780 781 u64 hv_reenlightenment_control; 782 u64 hv_tsc_emulation_control; 783 u64 hv_tsc_emulation_status; 784 }; 785 786 enum kvm_irqchip_mode { 787 KVM_IRQCHIP_NONE, 788 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 789 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 790 }; 791 792 struct kvm_arch { 793 unsigned int n_used_mmu_pages; 794 unsigned int n_requested_mmu_pages; 795 unsigned int n_max_mmu_pages; 796 unsigned int indirect_shadow_pages; 797 unsigned long mmu_valid_gen; 798 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 799 /* 800 * Hash table of struct kvm_mmu_page. 801 */ 802 struct list_head active_mmu_pages; 803 struct list_head zapped_obsolete_pages; 804 struct kvm_page_track_notifier_node mmu_sp_tracker; 805 struct kvm_page_track_notifier_head track_notifier_head; 806 807 struct list_head assigned_dev_head; 808 struct iommu_domain *iommu_domain; 809 bool iommu_noncoherent; 810 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 811 atomic_t noncoherent_dma_count; 812 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 813 atomic_t assigned_device_count; 814 struct kvm_pic *vpic; 815 struct kvm_ioapic *vioapic; 816 struct kvm_pit *vpit; 817 atomic_t vapics_in_nmi_mode; 818 struct mutex apic_map_lock; 819 struct kvm_apic_map *apic_map; 820 821 bool apic_access_page_done; 822 823 gpa_t wall_clock; 824 825 bool mwait_in_guest; 826 bool hlt_in_guest; 827 bool pause_in_guest; 828 829 unsigned long irq_sources_bitmap; 830 s64 kvmclock_offset; 831 raw_spinlock_t tsc_write_lock; 832 u64 last_tsc_nsec; 833 u64 last_tsc_write; 834 u32 last_tsc_khz; 835 u64 cur_tsc_nsec; 836 u64 cur_tsc_write; 837 u64 cur_tsc_offset; 838 u64 cur_tsc_generation; 839 int nr_vcpus_matched_tsc; 840 841 spinlock_t pvclock_gtod_sync_lock; 842 bool use_master_clock; 843 u64 master_kernel_ns; 844 u64 master_cycle_now; 845 struct delayed_work kvmclock_update_work; 846 struct delayed_work kvmclock_sync_work; 847 848 struct kvm_xen_hvm_config xen_hvm_config; 849 850 /* reads protected by irq_srcu, writes by irq_lock */ 851 struct hlist_head mask_notifier_list; 852 853 struct kvm_hv hyperv; 854 855 #ifdef CONFIG_KVM_MMU_AUDIT 856 int audit_point; 857 #endif 858 859 bool backwards_tsc_observed; 860 bool boot_vcpu_runs_old_kvmclock; 861 u32 bsp_vcpu_id; 862 863 u64 disabled_quirks; 864 865 enum kvm_irqchip_mode irqchip_mode; 866 u8 nr_reserved_ioapic_pins; 867 868 bool disabled_lapic_found; 869 870 bool x2apic_format; 871 bool x2apic_broadcast_quirk_disabled; 872 873 bool guest_can_read_msr_platform_info; 874 }; 875 876 struct kvm_vm_stat { 877 ulong mmu_shadow_zapped; 878 ulong mmu_pte_write; 879 ulong mmu_pte_updated; 880 ulong mmu_pde_zapped; 881 ulong mmu_flooded; 882 ulong mmu_recycled; 883 ulong mmu_cache_miss; 884 ulong mmu_unsync; 885 ulong remote_tlb_flush; 886 ulong lpages; 887 ulong max_mmu_page_hash_collisions; 888 }; 889 890 struct kvm_vcpu_stat { 891 u64 pf_fixed; 892 u64 pf_guest; 893 u64 tlb_flush; 894 u64 invlpg; 895 896 u64 exits; 897 u64 io_exits; 898 u64 mmio_exits; 899 u64 signal_exits; 900 u64 irq_window_exits; 901 u64 nmi_window_exits; 902 u64 l1d_flush; 903 u64 halt_exits; 904 u64 halt_successful_poll; 905 u64 halt_attempted_poll; 906 u64 halt_poll_invalid; 907 u64 halt_wakeup; 908 u64 request_irq_exits; 909 u64 irq_exits; 910 u64 host_state_reload; 911 u64 fpu_reload; 912 u64 insn_emulation; 913 u64 insn_emulation_fail; 914 u64 hypercalls; 915 u64 irq_injections; 916 u64 nmi_injections; 917 u64 req_event; 918 }; 919 920 struct x86_instruction_info; 921 922 struct msr_data { 923 bool host_initiated; 924 u32 index; 925 u64 data; 926 }; 927 928 struct kvm_lapic_irq { 929 u32 vector; 930 u16 delivery_mode; 931 u16 dest_mode; 932 bool level; 933 u16 trig_mode; 934 u32 shorthand; 935 u32 dest_id; 936 bool msi_redir_hint; 937 }; 938 939 struct kvm_x86_ops { 940 int (*cpu_has_kvm_support)(void); /* __init */ 941 int (*disabled_by_bios)(void); /* __init */ 942 int (*hardware_enable)(void); 943 void (*hardware_disable)(void); 944 void (*check_processor_compatibility)(void *rtn); 945 int (*hardware_setup)(void); /* __init */ 946 void (*hardware_unsetup)(void); /* __exit */ 947 bool (*cpu_has_accelerated_tpr)(void); 948 bool (*has_emulated_msr)(int index); 949 void (*cpuid_update)(struct kvm_vcpu *vcpu); 950 951 struct kvm *(*vm_alloc)(void); 952 void (*vm_free)(struct kvm *); 953 int (*vm_init)(struct kvm *kvm); 954 void (*vm_destroy)(struct kvm *kvm); 955 956 /* Create, but do not attach this VCPU */ 957 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 958 void (*vcpu_free)(struct kvm_vcpu *vcpu); 959 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 960 961 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 962 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 963 void (*vcpu_put)(struct kvm_vcpu *vcpu); 964 965 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 966 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 967 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 968 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 969 void (*get_segment)(struct kvm_vcpu *vcpu, 970 struct kvm_segment *var, int seg); 971 int (*get_cpl)(struct kvm_vcpu *vcpu); 972 void (*set_segment)(struct kvm_vcpu *vcpu, 973 struct kvm_segment *var, int seg); 974 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 975 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 976 void (*decache_cr3)(struct kvm_vcpu *vcpu); 977 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 978 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 979 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 980 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 981 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 982 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 983 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 984 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 985 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 986 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 987 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 988 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 989 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 990 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 991 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 992 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 993 994 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa); 995 int (*tlb_remote_flush)(struct kvm *kvm); 996 997 /* 998 * Flush any TLB entries associated with the given GVA. 999 * Does not need to flush GPA->HPA mappings. 1000 * Can potentially get non-canonical addresses through INVLPGs, which 1001 * the implementation may choose to ignore if appropriate. 1002 */ 1003 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1004 1005 void (*run)(struct kvm_vcpu *vcpu); 1006 int (*handle_exit)(struct kvm_vcpu *vcpu); 1007 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1008 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1009 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1010 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1011 unsigned char *hypercall_addr); 1012 void (*set_irq)(struct kvm_vcpu *vcpu); 1013 void (*set_nmi)(struct kvm_vcpu *vcpu); 1014 void (*queue_exception)(struct kvm_vcpu *vcpu); 1015 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1016 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 1017 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 1018 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1019 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1020 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1021 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1022 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1023 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu); 1024 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1025 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1026 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1027 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1028 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1029 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1030 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 1031 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1032 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1033 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1034 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1035 int (*get_tdp_level)(struct kvm_vcpu *vcpu); 1036 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1037 int (*get_lpage_level)(void); 1038 bool (*rdtscp_supported)(void); 1039 bool (*invpcid_supported)(void); 1040 1041 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1042 1043 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 1044 1045 bool (*has_wbinvd_exit)(void); 1046 1047 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu); 1048 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1049 1050 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 1051 1052 int (*check_intercept)(struct kvm_vcpu *vcpu, 1053 struct x86_instruction_info *info, 1054 enum x86_intercept_stage stage); 1055 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 1056 bool (*mpx_supported)(void); 1057 bool (*xsaves_supported)(void); 1058 bool (*umip_emulated)(void); 1059 1060 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 1061 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1062 1063 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1064 1065 /* 1066 * Arch-specific dirty logging hooks. These hooks are only supposed to 1067 * be valid if the specific arch has hardware-accelerated dirty logging 1068 * mechanism. Currently only for PML on VMX. 1069 * 1070 * - slot_enable_log_dirty: 1071 * called when enabling log dirty mode for the slot. 1072 * - slot_disable_log_dirty: 1073 * called when disabling log dirty mode for the slot. 1074 * also called when slot is created with log dirty disabled. 1075 * - flush_log_dirty: 1076 * called before reporting dirty_bitmap to userspace. 1077 * - enable_log_dirty_pt_masked: 1078 * called when reenabling log dirty for the GFNs in the mask after 1079 * corresponding bits are cleared in slot->dirty_bitmap. 1080 */ 1081 void (*slot_enable_log_dirty)(struct kvm *kvm, 1082 struct kvm_memory_slot *slot); 1083 void (*slot_disable_log_dirty)(struct kvm *kvm, 1084 struct kvm_memory_slot *slot); 1085 void (*flush_log_dirty)(struct kvm *kvm); 1086 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1087 struct kvm_memory_slot *slot, 1088 gfn_t offset, unsigned long mask); 1089 int (*write_log_dirty)(struct kvm_vcpu *vcpu); 1090 1091 /* pmu operations of sub-arch */ 1092 const struct kvm_pmu_ops *pmu_ops; 1093 1094 /* 1095 * Architecture specific hooks for vCPU blocking due to 1096 * HLT instruction. 1097 * Returns for .pre_block(): 1098 * - 0 means continue to block the vCPU. 1099 * - 1 means we cannot block the vCPU since some event 1100 * happens during this period, such as, 'ON' bit in 1101 * posted-interrupts descriptor is set. 1102 */ 1103 int (*pre_block)(struct kvm_vcpu *vcpu); 1104 void (*post_block)(struct kvm_vcpu *vcpu); 1105 1106 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1107 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1108 1109 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1110 uint32_t guest_irq, bool set); 1111 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1112 1113 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc); 1114 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1115 1116 void (*setup_mce)(struct kvm_vcpu *vcpu); 1117 1118 int (*get_nested_state)(struct kvm_vcpu *vcpu, 1119 struct kvm_nested_state __user *user_kvm_nested_state, 1120 unsigned user_data_size); 1121 int (*set_nested_state)(struct kvm_vcpu *vcpu, 1122 struct kvm_nested_state __user *user_kvm_nested_state, 1123 struct kvm_nested_state *kvm_state); 1124 void (*get_vmcs12_pages)(struct kvm_vcpu *vcpu); 1125 1126 int (*smi_allowed)(struct kvm_vcpu *vcpu); 1127 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1128 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, u64 smbase); 1129 int (*enable_smi_window)(struct kvm_vcpu *vcpu); 1130 1131 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1132 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1133 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1134 1135 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1136 }; 1137 1138 struct kvm_arch_async_pf { 1139 u32 token; 1140 gfn_t gfn; 1141 unsigned long cr3; 1142 bool direct_map; 1143 }; 1144 1145 extern struct kvm_x86_ops *kvm_x86_ops; 1146 1147 #define __KVM_HAVE_ARCH_VM_ALLOC 1148 static inline struct kvm *kvm_arch_alloc_vm(void) 1149 { 1150 return kvm_x86_ops->vm_alloc(); 1151 } 1152 1153 static inline void kvm_arch_free_vm(struct kvm *kvm) 1154 { 1155 return kvm_x86_ops->vm_free(kvm); 1156 } 1157 1158 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1159 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1160 { 1161 if (kvm_x86_ops->tlb_remote_flush && 1162 !kvm_x86_ops->tlb_remote_flush(kvm)) 1163 return 0; 1164 else 1165 return -ENOTSUPP; 1166 } 1167 1168 int kvm_mmu_module_init(void); 1169 void kvm_mmu_module_exit(void); 1170 1171 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1172 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1173 void kvm_mmu_setup(struct kvm_vcpu *vcpu); 1174 void kvm_mmu_init_vm(struct kvm *kvm); 1175 void kvm_mmu_uninit_vm(struct kvm *kvm); 1176 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1177 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1178 u64 acc_track_mask, u64 me_mask); 1179 1180 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1181 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1182 struct kvm_memory_slot *memslot); 1183 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1184 const struct kvm_memory_slot *memslot); 1185 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1186 struct kvm_memory_slot *memslot); 1187 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1188 struct kvm_memory_slot *memslot); 1189 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1190 struct kvm_memory_slot *memslot); 1191 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1192 struct kvm_memory_slot *slot, 1193 gfn_t gfn_offset, unsigned long mask); 1194 void kvm_mmu_zap_all(struct kvm *kvm); 1195 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots); 1196 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 1197 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 1198 1199 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1200 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1201 1202 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1203 const void *val, int bytes); 1204 1205 struct kvm_irq_mask_notifier { 1206 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1207 int irq; 1208 struct hlist_node link; 1209 }; 1210 1211 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1212 struct kvm_irq_mask_notifier *kimn); 1213 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1214 struct kvm_irq_mask_notifier *kimn); 1215 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1216 bool mask); 1217 1218 extern bool tdp_enabled; 1219 1220 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1221 1222 /* control of guest tsc rate supported? */ 1223 extern bool kvm_has_tsc_control; 1224 /* maximum supported tsc_khz for guests */ 1225 extern u32 kvm_max_guest_tsc_khz; 1226 /* number of bits of the fractional part of the TSC scaling ratio */ 1227 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1228 /* maximum allowed value of TSC scaling ratio */ 1229 extern u64 kvm_max_tsc_scaling_ratio; 1230 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1231 extern u64 kvm_default_tsc_scaling_ratio; 1232 1233 extern u64 kvm_mce_cap_supported; 1234 1235 enum emulation_result { 1236 EMULATE_DONE, /* no further processing */ 1237 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 1238 EMULATE_FAIL, /* can't emulate this instruction */ 1239 }; 1240 1241 #define EMULTYPE_NO_DECODE (1 << 0) 1242 #define EMULTYPE_TRAP_UD (1 << 1) 1243 #define EMULTYPE_SKIP (1 << 2) 1244 #define EMULTYPE_ALLOW_RETRY (1 << 3) 1245 #define EMULTYPE_NO_UD_ON_FAIL (1 << 4) 1246 #define EMULTYPE_VMWARE (1 << 5) 1247 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1248 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1249 void *insn, int insn_len); 1250 1251 void kvm_enable_efer_bits(u64); 1252 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1253 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1254 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1255 1256 struct x86_emulate_ctxt; 1257 1258 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1259 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1260 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1261 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1262 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1263 1264 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1265 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1266 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1267 1268 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1269 int reason, bool has_error_code, u32 error_code); 1270 1271 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1272 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1273 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1274 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1275 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1276 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1277 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1278 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1279 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1280 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1281 1282 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1283 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1284 1285 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1286 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1287 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1288 1289 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1290 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1291 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1292 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1293 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1294 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1295 gfn_t gfn, void *data, int offset, int len, 1296 u32 access); 1297 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1298 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1299 1300 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1301 int irq_source_id, int level) 1302 { 1303 /* Logical OR for level trig interrupt */ 1304 if (level) 1305 __set_bit(irq_source_id, irq_state); 1306 else 1307 __clear_bit(irq_source_id, irq_state); 1308 1309 return !!(*irq_state); 1310 } 1311 1312 #define KVM_MMU_ROOT_CURRENT BIT(0) 1313 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1314 #define KVM_MMU_ROOTS_ALL (~0UL) 1315 1316 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1317 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1318 1319 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1320 1321 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1322 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1323 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1324 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1325 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1326 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1327 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, ulong roots_to_free); 1328 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1329 struct x86_exception *exception); 1330 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1331 struct x86_exception *exception); 1332 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1333 struct x86_exception *exception); 1334 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1335 struct x86_exception *exception); 1336 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1337 struct x86_exception *exception); 1338 1339 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu); 1340 1341 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1342 1343 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code, 1344 void *insn, int insn_len); 1345 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1346 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1347 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush); 1348 1349 void kvm_enable_tdp(void); 1350 void kvm_disable_tdp(void); 1351 1352 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1353 struct x86_exception *exception) 1354 { 1355 return gpa; 1356 } 1357 1358 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1359 { 1360 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1361 1362 return (struct kvm_mmu_page *)page_private(page); 1363 } 1364 1365 static inline u16 kvm_read_ldt(void) 1366 { 1367 u16 ldt; 1368 asm("sldt %0" : "=g"(ldt)); 1369 return ldt; 1370 } 1371 1372 static inline void kvm_load_ldt(u16 sel) 1373 { 1374 asm("lldt %0" : : "rm"(sel)); 1375 } 1376 1377 #ifdef CONFIG_X86_64 1378 static inline unsigned long read_msr(unsigned long msr) 1379 { 1380 u64 value; 1381 1382 rdmsrl(msr, value); 1383 return value; 1384 } 1385 #endif 1386 1387 static inline u32 get_rdx_init_val(void) 1388 { 1389 return 0x600; /* P6 family */ 1390 } 1391 1392 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1393 { 1394 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1395 } 1396 1397 #define TSS_IOPB_BASE_OFFSET 0x66 1398 #define TSS_BASE_SIZE 0x68 1399 #define TSS_IOPB_SIZE (65536 / 8) 1400 #define TSS_REDIRECTION_SIZE (256 / 8) 1401 #define RMODE_TSS_SIZE \ 1402 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1403 1404 enum { 1405 TASK_SWITCH_CALL = 0, 1406 TASK_SWITCH_IRET = 1, 1407 TASK_SWITCH_JMP = 2, 1408 TASK_SWITCH_GATE = 3, 1409 }; 1410 1411 #define HF_GIF_MASK (1 << 0) 1412 #define HF_HIF_MASK (1 << 1) 1413 #define HF_VINTR_MASK (1 << 2) 1414 #define HF_NMI_MASK (1 << 3) 1415 #define HF_IRET_MASK (1 << 4) 1416 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1417 #define HF_SMM_MASK (1 << 6) 1418 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1419 1420 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1421 #define KVM_ADDRESS_SPACE_NUM 2 1422 1423 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1424 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1425 1426 /* 1427 * Hardware virtualization extension instructions may fault if a 1428 * reboot turns off virtualization while processes are running. 1429 * Trap the fault and ignore the instruction if that happens. 1430 */ 1431 asmlinkage void kvm_spurious_fault(void); 1432 1433 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1434 "666: " insn "\n\t" \ 1435 "668: \n\t" \ 1436 ".pushsection .fixup, \"ax\" \n" \ 1437 "667: \n\t" \ 1438 cleanup_insn "\n\t" \ 1439 "cmpb $0, kvm_rebooting \n\t" \ 1440 "jne 668b \n\t" \ 1441 __ASM_SIZE(push) " $666b \n\t" \ 1442 "call kvm_spurious_fault \n\t" \ 1443 ".popsection \n\t" \ 1444 _ASM_EXTABLE(666b, 667b) 1445 1446 #define __kvm_handle_fault_on_reboot(insn) \ 1447 ____kvm_handle_fault_on_reboot(insn, "") 1448 1449 #define KVM_ARCH_WANT_MMU_NOTIFIER 1450 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1451 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1452 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1453 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1454 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1455 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1456 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1457 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1458 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1459 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1460 1461 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1462 unsigned long ipi_bitmap_high, u32 min, 1463 unsigned long icr, int op_64_bit); 1464 1465 u64 kvm_get_arch_capabilities(void); 1466 void kvm_define_shared_msr(unsigned index, u32 msr); 1467 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1468 1469 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1470 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1471 1472 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1473 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1474 1475 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1476 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1477 1478 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1479 struct kvm_async_pf *work); 1480 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1481 struct kvm_async_pf *work); 1482 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1483 struct kvm_async_pf *work); 1484 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1485 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1486 1487 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1488 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1489 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1490 1491 int kvm_is_in_guest(void); 1492 1493 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1494 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1495 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1496 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1497 1498 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1499 struct kvm_vcpu **dest_vcpu); 1500 1501 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1502 struct kvm_lapic_irq *irq); 1503 1504 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1505 { 1506 if (kvm_x86_ops->vcpu_blocking) 1507 kvm_x86_ops->vcpu_blocking(vcpu); 1508 } 1509 1510 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1511 { 1512 if (kvm_x86_ops->vcpu_unblocking) 1513 kvm_x86_ops->vcpu_unblocking(vcpu); 1514 } 1515 1516 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1517 1518 static inline int kvm_cpu_get_apicid(int mps_cpu) 1519 { 1520 #ifdef CONFIG_X86_LOCAL_APIC 1521 return default_cpu_present_to_apicid(mps_cpu); 1522 #else 1523 WARN_ON_ONCE(1); 1524 return BAD_APICID; 1525 #endif 1526 } 1527 1528 #define put_smstate(type, buf, offset, val) \ 1529 *(type *)((buf) + (offset) - 0x7e00) = val 1530 1531 #endif /* _ASM_X86_KVM_HOST_H */ 1532