1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 #define KVM_USER_MEM_SLOTS 509 44 /* memory slots that are not exposed to userspace */ 45 #define KVM_PRIVATE_MEM_SLOTS 3 46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 47 48 #define KVM_HALT_POLL_NS_DEFAULT 200000 49 50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 51 52 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 53 KVM_DIRTY_LOG_INITIALLY_SET) 54 55 /* x86-specific vcpu->requests bit members */ 56 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 57 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 58 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 59 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 60 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 61 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 62 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 63 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 64 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 65 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 66 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 67 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 68 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 69 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 70 #define KVM_REQ_MCLOCK_INPROGRESS \ 71 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 72 #define KVM_REQ_SCAN_IOAPIC \ 73 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 74 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 75 #define KVM_REQ_APIC_PAGE_RELOAD \ 76 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 77 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 78 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 79 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 80 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 81 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 82 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 83 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24) 84 #define KVM_REQ_APICV_UPDATE \ 85 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 86 87 #define CR0_RESERVED_BITS \ 88 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 89 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 90 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 91 92 #define CR4_RESERVED_BITS \ 93 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 94 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 95 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 96 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 97 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 98 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 99 100 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 101 102 103 104 #define INVALID_PAGE (~(hpa_t)0) 105 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 106 107 #define UNMAPPED_GVA (~(gpa_t)0) 108 109 /* KVM Hugepage definitions for x86 */ 110 enum { 111 PT_PAGE_TABLE_LEVEL = 1, 112 PT_DIRECTORY_LEVEL = 2, 113 PT_PDPE_LEVEL = 3, 114 /* set max level to the biggest one */ 115 PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL, 116 }; 117 #define KVM_NR_PAGE_SIZES (PT_MAX_HUGEPAGE_LEVEL - \ 118 PT_PAGE_TABLE_LEVEL + 1) 119 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 120 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 121 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 122 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 123 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 124 125 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 126 { 127 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 128 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 129 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 130 } 131 132 #define KVM_PERMILLE_MMU_PAGES 20 133 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 134 #define KVM_MMU_HASH_SHIFT 12 135 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 136 #define KVM_MIN_FREE_MMU_PAGES 5 137 #define KVM_REFILL_PAGES 25 138 #define KVM_MAX_CPUID_ENTRIES 80 139 #define KVM_NR_FIXED_MTRR_REGION 88 140 #define KVM_NR_VAR_MTRR 8 141 142 #define ASYNC_PF_PER_VCPU 64 143 144 enum kvm_reg { 145 VCPU_REGS_RAX = __VCPU_REGS_RAX, 146 VCPU_REGS_RCX = __VCPU_REGS_RCX, 147 VCPU_REGS_RDX = __VCPU_REGS_RDX, 148 VCPU_REGS_RBX = __VCPU_REGS_RBX, 149 VCPU_REGS_RSP = __VCPU_REGS_RSP, 150 VCPU_REGS_RBP = __VCPU_REGS_RBP, 151 VCPU_REGS_RSI = __VCPU_REGS_RSI, 152 VCPU_REGS_RDI = __VCPU_REGS_RDI, 153 #ifdef CONFIG_X86_64 154 VCPU_REGS_R8 = __VCPU_REGS_R8, 155 VCPU_REGS_R9 = __VCPU_REGS_R9, 156 VCPU_REGS_R10 = __VCPU_REGS_R10, 157 VCPU_REGS_R11 = __VCPU_REGS_R11, 158 VCPU_REGS_R12 = __VCPU_REGS_R12, 159 VCPU_REGS_R13 = __VCPU_REGS_R13, 160 VCPU_REGS_R14 = __VCPU_REGS_R14, 161 VCPU_REGS_R15 = __VCPU_REGS_R15, 162 #endif 163 VCPU_REGS_RIP, 164 NR_VCPU_REGS, 165 166 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 167 VCPU_EXREG_CR3, 168 VCPU_EXREG_RFLAGS, 169 VCPU_EXREG_SEGMENTS, 170 }; 171 172 enum { 173 VCPU_SREG_ES, 174 VCPU_SREG_CS, 175 VCPU_SREG_SS, 176 VCPU_SREG_DS, 177 VCPU_SREG_FS, 178 VCPU_SREG_GS, 179 VCPU_SREG_TR, 180 VCPU_SREG_LDTR, 181 }; 182 183 enum exit_fastpath_completion { 184 EXIT_FASTPATH_NONE, 185 EXIT_FASTPATH_SKIP_EMUL_INS, 186 }; 187 188 struct x86_emulate_ctxt; 189 struct x86_exception; 190 enum x86_intercept; 191 enum x86_intercept_stage; 192 193 #define KVM_NR_MEM_OBJS 40 194 195 #define KVM_NR_DB_REGS 4 196 197 #define DR6_BD (1 << 13) 198 #define DR6_BS (1 << 14) 199 #define DR6_BT (1 << 15) 200 #define DR6_RTM (1 << 16) 201 #define DR6_FIXED_1 0xfffe0ff0 202 #define DR6_INIT 0xffff0ff0 203 #define DR6_VOLATILE 0x0001e00f 204 205 #define DR7_BP_EN_MASK 0x000000ff 206 #define DR7_GE (1 << 9) 207 #define DR7_GD (1 << 13) 208 #define DR7_FIXED_1 0x00000400 209 #define DR7_VOLATILE 0xffff2bff 210 211 #define PFERR_PRESENT_BIT 0 212 #define PFERR_WRITE_BIT 1 213 #define PFERR_USER_BIT 2 214 #define PFERR_RSVD_BIT 3 215 #define PFERR_FETCH_BIT 4 216 #define PFERR_PK_BIT 5 217 #define PFERR_GUEST_FINAL_BIT 32 218 #define PFERR_GUEST_PAGE_BIT 33 219 220 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 221 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 222 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 223 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 224 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 225 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 226 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 227 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 228 229 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 230 PFERR_WRITE_MASK | \ 231 PFERR_PRESENT_MASK) 232 233 /* apic attention bits */ 234 #define KVM_APIC_CHECK_VAPIC 0 235 /* 236 * The following bit is set with PV-EOI, unset on EOI. 237 * We detect PV-EOI changes by guest by comparing 238 * this bit with PV-EOI in guest memory. 239 * See the implementation in apic_update_pv_eoi. 240 */ 241 #define KVM_APIC_PV_EOI_PENDING 1 242 243 struct kvm_kernel_irq_routing_entry; 244 245 /* 246 * We don't want allocation failures within the mmu code, so we preallocate 247 * enough memory for a single page fault in a cache. 248 */ 249 struct kvm_mmu_memory_cache { 250 int nobjs; 251 void *objects[KVM_NR_MEM_OBJS]; 252 }; 253 254 /* 255 * the pages used as guest page table on soft mmu are tracked by 256 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 257 * by indirect shadow page can not be more than 15 bits. 258 * 259 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 260 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 261 */ 262 union kvm_mmu_page_role { 263 u32 word; 264 struct { 265 unsigned level:4; 266 unsigned gpte_is_8_bytes:1; 267 unsigned quadrant:2; 268 unsigned direct:1; 269 unsigned access:3; 270 unsigned invalid:1; 271 unsigned nxe:1; 272 unsigned cr0_wp:1; 273 unsigned smep_andnot_wp:1; 274 unsigned smap_andnot_wp:1; 275 unsigned ad_disabled:1; 276 unsigned guest_mode:1; 277 unsigned :6; 278 279 /* 280 * This is left at the top of the word so that 281 * kvm_memslots_for_spte_role can extract it with a 282 * simple shift. While there is room, give it a whole 283 * byte so it is also faster to load it from memory. 284 */ 285 unsigned smm:8; 286 }; 287 }; 288 289 union kvm_mmu_extended_role { 290 /* 291 * This structure complements kvm_mmu_page_role caching everything needed for 292 * MMU configuration. If nothing in both these structures changed, MMU 293 * re-configuration can be skipped. @valid bit is set on first usage so we don't 294 * treat all-zero structure as valid data. 295 */ 296 u32 word; 297 struct { 298 unsigned int valid:1; 299 unsigned int execonly:1; 300 unsigned int cr0_pg:1; 301 unsigned int cr4_pae:1; 302 unsigned int cr4_pse:1; 303 unsigned int cr4_pke:1; 304 unsigned int cr4_smap:1; 305 unsigned int cr4_smep:1; 306 unsigned int maxphyaddr:6; 307 }; 308 }; 309 310 union kvm_mmu_role { 311 u64 as_u64; 312 struct { 313 union kvm_mmu_page_role base; 314 union kvm_mmu_extended_role ext; 315 }; 316 }; 317 318 struct kvm_rmap_head { 319 unsigned long val; 320 }; 321 322 struct kvm_mmu_page { 323 struct list_head link; 324 struct hlist_node hash_link; 325 struct list_head lpage_disallowed_link; 326 327 bool unsync; 328 u8 mmu_valid_gen; 329 bool mmio_cached; 330 bool lpage_disallowed; /* Can't be replaced by an equiv large page */ 331 332 /* 333 * The following two entries are used to key the shadow page in the 334 * hash table. 335 */ 336 union kvm_mmu_page_role role; 337 gfn_t gfn; 338 339 u64 *spt; 340 /* hold the gfn of each spte inside spt */ 341 gfn_t *gfns; 342 int root_count; /* Currently serving as active root */ 343 unsigned int unsync_children; 344 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 345 DECLARE_BITMAP(unsync_child_bitmap, 512); 346 347 #ifdef CONFIG_X86_32 348 /* 349 * Used out of the mmu-lock to avoid reading spte values while an 350 * update is in progress; see the comments in __get_spte_lockless(). 351 */ 352 int clear_spte_count; 353 #endif 354 355 /* Number of writes since the last time traversal visited this page. */ 356 atomic_t write_flooding_count; 357 }; 358 359 struct kvm_pio_request { 360 unsigned long linear_rip; 361 unsigned long count; 362 int in; 363 int port; 364 int size; 365 }; 366 367 #define PT64_ROOT_MAX_LEVEL 5 368 369 struct rsvd_bits_validate { 370 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 371 u64 bad_mt_xwr; 372 }; 373 374 struct kvm_mmu_root_info { 375 gpa_t cr3; 376 hpa_t hpa; 377 }; 378 379 #define KVM_MMU_ROOT_INFO_INVALID \ 380 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE }) 381 382 #define KVM_MMU_NUM_PREV_ROOTS 3 383 384 /* 385 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 386 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 387 * current mmu mode. 388 */ 389 struct kvm_mmu { 390 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 391 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 392 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err, 393 bool prefault); 394 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 395 struct x86_exception *fault); 396 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 397 u32 access, struct x86_exception *exception); 398 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 399 struct x86_exception *exception); 400 int (*sync_page)(struct kvm_vcpu *vcpu, 401 struct kvm_mmu_page *sp); 402 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 403 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 404 u64 *spte, const void *pte); 405 hpa_t root_hpa; 406 gpa_t root_cr3; 407 union kvm_mmu_role mmu_role; 408 u8 root_level; 409 u8 shadow_root_level; 410 u8 ept_ad; 411 bool direct_map; 412 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 413 414 /* 415 * Bitmap; bit set = permission fault 416 * Byte index: page fault error code [4:1] 417 * Bit index: pte permissions in ACC_* format 418 */ 419 u8 permissions[16]; 420 421 /* 422 * The pkru_mask indicates if protection key checks are needed. It 423 * consists of 16 domains indexed by page fault error code bits [4:1], 424 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 425 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 426 */ 427 u32 pkru_mask; 428 429 u64 *pae_root; 430 u64 *lm_root; 431 432 /* 433 * check zero bits on shadow page table entries, these 434 * bits include not only hardware reserved bits but also 435 * the bits spte never used. 436 */ 437 struct rsvd_bits_validate shadow_zero_check; 438 439 struct rsvd_bits_validate guest_rsvd_check; 440 441 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 442 u8 last_nonleaf_level; 443 444 bool nx; 445 446 u64 pdptrs[4]; /* pae */ 447 }; 448 449 struct kvm_tlb_range { 450 u64 start_gfn; 451 u64 pages; 452 }; 453 454 enum pmc_type { 455 KVM_PMC_GP = 0, 456 KVM_PMC_FIXED, 457 }; 458 459 struct kvm_pmc { 460 enum pmc_type type; 461 u8 idx; 462 u64 counter; 463 u64 eventsel; 464 struct perf_event *perf_event; 465 struct kvm_vcpu *vcpu; 466 /* 467 * eventsel value for general purpose counters, 468 * ctrl value for fixed counters. 469 */ 470 u64 current_config; 471 }; 472 473 struct kvm_pmu { 474 unsigned nr_arch_gp_counters; 475 unsigned nr_arch_fixed_counters; 476 unsigned available_event_types; 477 u64 fixed_ctr_ctrl; 478 u64 global_ctrl; 479 u64 global_status; 480 u64 global_ovf_ctrl; 481 u64 counter_bitmask[2]; 482 u64 global_ctrl_mask; 483 u64 global_ovf_ctrl_mask; 484 u64 reserved_bits; 485 u8 version; 486 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 487 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 488 struct irq_work irq_work; 489 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 490 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 491 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 492 493 /* 494 * The gate to release perf_events not marked in 495 * pmc_in_use only once in a vcpu time slice. 496 */ 497 bool need_cleanup; 498 499 /* 500 * The total number of programmed perf_events and it helps to avoid 501 * redundant check before cleanup if guest don't use vPMU at all. 502 */ 503 u8 event_count; 504 }; 505 506 struct kvm_pmu_ops; 507 508 enum { 509 KVM_DEBUGREG_BP_ENABLED = 1, 510 KVM_DEBUGREG_WONT_EXIT = 2, 511 KVM_DEBUGREG_RELOAD = 4, 512 }; 513 514 struct kvm_mtrr_range { 515 u64 base; 516 u64 mask; 517 struct list_head node; 518 }; 519 520 struct kvm_mtrr { 521 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 522 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 523 u64 deftype; 524 525 struct list_head head; 526 }; 527 528 /* Hyper-V SynIC timer */ 529 struct kvm_vcpu_hv_stimer { 530 struct hrtimer timer; 531 int index; 532 union hv_stimer_config config; 533 u64 count; 534 u64 exp_time; 535 struct hv_message msg; 536 bool msg_pending; 537 }; 538 539 /* Hyper-V synthetic interrupt controller (SynIC)*/ 540 struct kvm_vcpu_hv_synic { 541 u64 version; 542 u64 control; 543 u64 msg_page; 544 u64 evt_page; 545 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 546 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 547 DECLARE_BITMAP(auto_eoi_bitmap, 256); 548 DECLARE_BITMAP(vec_bitmap, 256); 549 bool active; 550 bool dont_zero_synic_pages; 551 }; 552 553 /* Hyper-V per vcpu emulation context */ 554 struct kvm_vcpu_hv { 555 u32 vp_index; 556 u64 hv_vapic; 557 s64 runtime_offset; 558 struct kvm_vcpu_hv_synic synic; 559 struct kvm_hyperv_exit exit; 560 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 561 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 562 cpumask_t tlb_flush; 563 }; 564 565 struct kvm_vcpu_arch { 566 /* 567 * rip and regs accesses must go through 568 * kvm_{register,rip}_{read,write} functions. 569 */ 570 unsigned long regs[NR_VCPU_REGS]; 571 u32 regs_avail; 572 u32 regs_dirty; 573 574 unsigned long cr0; 575 unsigned long cr0_guest_owned_bits; 576 unsigned long cr2; 577 unsigned long cr3; 578 unsigned long cr4; 579 unsigned long cr4_guest_owned_bits; 580 unsigned long cr8; 581 u32 host_pkru; 582 u32 pkru; 583 u32 hflags; 584 u64 efer; 585 u64 apic_base; 586 struct kvm_lapic *apic; /* kernel irqchip context */ 587 bool apicv_active; 588 bool load_eoi_exitmap_pending; 589 DECLARE_BITMAP(ioapic_handled_vectors, 256); 590 unsigned long apic_attention; 591 int32_t apic_arb_prio; 592 int mp_state; 593 u64 ia32_misc_enable_msr; 594 u64 smbase; 595 u64 smi_count; 596 bool tpr_access_reporting; 597 bool xsaves_enabled; 598 u64 ia32_xss; 599 u64 microcode_version; 600 u64 arch_capabilities; 601 602 /* 603 * Paging state of the vcpu 604 * 605 * If the vcpu runs in guest mode with two level paging this still saves 606 * the paging mode of the l1 guest. This context is always used to 607 * handle faults. 608 */ 609 struct kvm_mmu *mmu; 610 611 /* Non-nested MMU for L1 */ 612 struct kvm_mmu root_mmu; 613 614 /* L1 MMU when running nested */ 615 struct kvm_mmu guest_mmu; 616 617 /* 618 * Paging state of an L2 guest (used for nested npt) 619 * 620 * This context will save all necessary information to walk page tables 621 * of an L2 guest. This context is only initialized for page table 622 * walking and not for faulting since we never handle l2 page faults on 623 * the host. 624 */ 625 struct kvm_mmu nested_mmu; 626 627 /* 628 * Pointer to the mmu context currently used for 629 * gva_to_gpa translations. 630 */ 631 struct kvm_mmu *walk_mmu; 632 633 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 634 struct kvm_mmu_memory_cache mmu_page_cache; 635 struct kvm_mmu_memory_cache mmu_page_header_cache; 636 637 /* 638 * QEMU userspace and the guest each have their own FPU state. 639 * In vcpu_run, we switch between the user and guest FPU contexts. 640 * While running a VCPU, the VCPU thread will have the guest FPU 641 * context. 642 * 643 * Note that while the PKRU state lives inside the fpu registers, 644 * it is switched out separately at VMENTER and VMEXIT time. The 645 * "guest_fpu" state here contains the guest FPU context, with the 646 * host PRKU bits. 647 */ 648 struct fpu *user_fpu; 649 struct fpu *guest_fpu; 650 651 u64 xcr0; 652 u64 guest_supported_xcr0; 653 u32 guest_xstate_size; 654 655 struct kvm_pio_request pio; 656 void *pio_data; 657 658 u8 event_exit_inst_len; 659 660 struct kvm_queued_exception { 661 bool pending; 662 bool injected; 663 bool has_error_code; 664 u8 nr; 665 u32 error_code; 666 unsigned long payload; 667 bool has_payload; 668 u8 nested_apf; 669 } exception; 670 671 struct kvm_queued_interrupt { 672 bool injected; 673 bool soft; 674 u8 nr; 675 } interrupt; 676 677 int halt_request; /* real mode on Intel only */ 678 679 int cpuid_nent; 680 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 681 682 int maxphyaddr; 683 684 /* emulate context */ 685 686 struct x86_emulate_ctxt *emulate_ctxt; 687 bool emulate_regs_need_sync_to_vcpu; 688 bool emulate_regs_need_sync_from_vcpu; 689 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 690 691 gpa_t time; 692 struct pvclock_vcpu_time_info hv_clock; 693 unsigned int hw_tsc_khz; 694 struct gfn_to_hva_cache pv_time; 695 bool pv_time_enabled; 696 /* set guest stopped flag in pvclock flags field */ 697 bool pvclock_set_guest_stopped_request; 698 699 struct { 700 u8 preempted; 701 u64 msr_val; 702 u64 last_steal; 703 struct gfn_to_pfn_cache cache; 704 } st; 705 706 u64 tsc_offset; 707 u64 last_guest_tsc; 708 u64 last_host_tsc; 709 u64 tsc_offset_adjustment; 710 u64 this_tsc_nsec; 711 u64 this_tsc_write; 712 u64 this_tsc_generation; 713 bool tsc_catchup; 714 bool tsc_always_catchup; 715 s8 virtual_tsc_shift; 716 u32 virtual_tsc_mult; 717 u32 virtual_tsc_khz; 718 s64 ia32_tsc_adjust_msr; 719 u64 msr_ia32_power_ctl; 720 u64 tsc_scaling_ratio; 721 722 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 723 unsigned nmi_pending; /* NMI queued after currently running handler */ 724 bool nmi_injected; /* Trying to inject an NMI this entry */ 725 bool smi_pending; /* SMI queued after currently running handler */ 726 727 struct kvm_mtrr mtrr_state; 728 u64 pat; 729 730 unsigned switch_db_regs; 731 unsigned long db[KVM_NR_DB_REGS]; 732 unsigned long dr6; 733 unsigned long dr7; 734 unsigned long eff_db[KVM_NR_DB_REGS]; 735 unsigned long guest_debug_dr7; 736 u64 msr_platform_info; 737 u64 msr_misc_features_enables; 738 739 u64 mcg_cap; 740 u64 mcg_status; 741 u64 mcg_ctl; 742 u64 mcg_ext_ctl; 743 u64 *mce_banks; 744 745 /* Cache MMIO info */ 746 u64 mmio_gva; 747 unsigned mmio_access; 748 gfn_t mmio_gfn; 749 u64 mmio_gen; 750 751 struct kvm_pmu pmu; 752 753 /* used for guest single stepping over the given code position */ 754 unsigned long singlestep_rip; 755 756 struct kvm_vcpu_hv hyperv; 757 758 cpumask_var_t wbinvd_dirty_mask; 759 760 unsigned long last_retry_eip; 761 unsigned long last_retry_addr; 762 763 struct { 764 bool halted; 765 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 766 struct gfn_to_hva_cache data; 767 u64 msr_val; 768 u32 id; 769 bool send_user_only; 770 u32 host_apf_reason; 771 unsigned long nested_apf_token; 772 bool delivery_as_pf_vmexit; 773 } apf; 774 775 /* OSVW MSRs (AMD only) */ 776 struct { 777 u64 length; 778 u64 status; 779 } osvw; 780 781 struct { 782 u64 msr_val; 783 struct gfn_to_hva_cache data; 784 } pv_eoi; 785 786 u64 msr_kvm_poll_control; 787 788 /* 789 * Indicates the guest is trying to write a gfn that contains one or 790 * more of the PTEs used to translate the write itself, i.e. the access 791 * is changing its own translation in the guest page tables. KVM exits 792 * to userspace if emulation of the faulting instruction fails and this 793 * flag is set, as KVM cannot make forward progress. 794 * 795 * If emulation fails for a write to guest page tables, KVM unprotects 796 * (zaps) the shadow page for the target gfn and resumes the guest to 797 * retry the non-emulatable instruction (on hardware). Unprotecting the 798 * gfn doesn't allow forward progress for a self-changing access because 799 * doing so also zaps the translation for the gfn, i.e. retrying the 800 * instruction will hit a !PRESENT fault, which results in a new shadow 801 * page and sends KVM back to square one. 802 */ 803 bool write_fault_to_shadow_pgtable; 804 805 /* set at EPT violation at this point */ 806 unsigned long exit_qualification; 807 808 /* pv related host specific info */ 809 struct { 810 bool pv_unhalted; 811 } pv; 812 813 int pending_ioapic_eoi; 814 int pending_external_vector; 815 816 /* be preempted when it's in kernel-mode(cpl=0) */ 817 bool preempted_in_kernel; 818 819 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 820 bool l1tf_flush_l1d; 821 822 /* AMD MSRC001_0015 Hardware Configuration */ 823 u64 msr_hwcr; 824 }; 825 826 struct kvm_lpage_info { 827 int disallow_lpage; 828 }; 829 830 struct kvm_arch_memory_slot { 831 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 832 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 833 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 834 }; 835 836 /* 837 * We use as the mode the number of bits allocated in the LDR for the 838 * logical processor ID. It happens that these are all powers of two. 839 * This makes it is very easy to detect cases where the APICs are 840 * configured for multiple modes; in that case, we cannot use the map and 841 * hence cannot use kvm_irq_delivery_to_apic_fast either. 842 */ 843 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 844 #define KVM_APIC_MODE_XAPIC_FLAT 8 845 #define KVM_APIC_MODE_X2APIC 16 846 847 struct kvm_apic_map { 848 struct rcu_head rcu; 849 u8 mode; 850 u32 max_apic_id; 851 union { 852 struct kvm_lapic *xapic_flat_map[8]; 853 struct kvm_lapic *xapic_cluster_map[16][4]; 854 }; 855 struct kvm_lapic *phys_map[]; 856 }; 857 858 /* Hyper-V emulation context */ 859 struct kvm_hv { 860 struct mutex hv_lock; 861 u64 hv_guest_os_id; 862 u64 hv_hypercall; 863 u64 hv_tsc_page; 864 865 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 866 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 867 u64 hv_crash_ctl; 868 869 HV_REFERENCE_TSC_PAGE tsc_ref; 870 871 struct idr conn_to_evt; 872 873 u64 hv_reenlightenment_control; 874 u64 hv_tsc_emulation_control; 875 u64 hv_tsc_emulation_status; 876 877 /* How many vCPUs have VP index != vCPU index */ 878 atomic_t num_mismatched_vp_indexes; 879 880 struct hv_partition_assist_pg *hv_pa_pg; 881 }; 882 883 enum kvm_irqchip_mode { 884 KVM_IRQCHIP_NONE, 885 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 886 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 887 }; 888 889 #define APICV_INHIBIT_REASON_DISABLE 0 890 #define APICV_INHIBIT_REASON_HYPERV 1 891 #define APICV_INHIBIT_REASON_NESTED 2 892 #define APICV_INHIBIT_REASON_IRQWIN 3 893 #define APICV_INHIBIT_REASON_PIT_REINJ 4 894 #define APICV_INHIBIT_REASON_X2APIC 5 895 896 struct kvm_arch { 897 unsigned long n_used_mmu_pages; 898 unsigned long n_requested_mmu_pages; 899 unsigned long n_max_mmu_pages; 900 unsigned int indirect_shadow_pages; 901 u8 mmu_valid_gen; 902 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 903 /* 904 * Hash table of struct kvm_mmu_page. 905 */ 906 struct list_head active_mmu_pages; 907 struct list_head zapped_obsolete_pages; 908 struct list_head lpage_disallowed_mmu_pages; 909 struct kvm_page_track_notifier_node mmu_sp_tracker; 910 struct kvm_page_track_notifier_head track_notifier_head; 911 912 struct list_head assigned_dev_head; 913 struct iommu_domain *iommu_domain; 914 bool iommu_noncoherent; 915 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 916 atomic_t noncoherent_dma_count; 917 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 918 atomic_t assigned_device_count; 919 struct kvm_pic *vpic; 920 struct kvm_ioapic *vioapic; 921 struct kvm_pit *vpit; 922 atomic_t vapics_in_nmi_mode; 923 struct mutex apic_map_lock; 924 struct kvm_apic_map *apic_map; 925 bool apic_map_dirty; 926 927 bool apic_access_page_done; 928 unsigned long apicv_inhibit_reasons; 929 930 gpa_t wall_clock; 931 932 bool mwait_in_guest; 933 bool hlt_in_guest; 934 bool pause_in_guest; 935 bool cstate_in_guest; 936 937 unsigned long irq_sources_bitmap; 938 s64 kvmclock_offset; 939 raw_spinlock_t tsc_write_lock; 940 u64 last_tsc_nsec; 941 u64 last_tsc_write; 942 u32 last_tsc_khz; 943 u64 cur_tsc_nsec; 944 u64 cur_tsc_write; 945 u64 cur_tsc_offset; 946 u64 cur_tsc_generation; 947 int nr_vcpus_matched_tsc; 948 949 spinlock_t pvclock_gtod_sync_lock; 950 bool use_master_clock; 951 u64 master_kernel_ns; 952 u64 master_cycle_now; 953 struct delayed_work kvmclock_update_work; 954 struct delayed_work kvmclock_sync_work; 955 956 struct kvm_xen_hvm_config xen_hvm_config; 957 958 /* reads protected by irq_srcu, writes by irq_lock */ 959 struct hlist_head mask_notifier_list; 960 961 struct kvm_hv hyperv; 962 963 #ifdef CONFIG_KVM_MMU_AUDIT 964 int audit_point; 965 #endif 966 967 bool backwards_tsc_observed; 968 bool boot_vcpu_runs_old_kvmclock; 969 u32 bsp_vcpu_id; 970 971 u64 disabled_quirks; 972 973 enum kvm_irqchip_mode irqchip_mode; 974 u8 nr_reserved_ioapic_pins; 975 976 bool disabled_lapic_found; 977 978 bool x2apic_format; 979 bool x2apic_broadcast_quirk_disabled; 980 981 bool guest_can_read_msr_platform_info; 982 bool exception_payload_enabled; 983 984 struct kvm_pmu_event_filter *pmu_event_filter; 985 struct task_struct *nx_lpage_recovery_thread; 986 }; 987 988 struct kvm_vm_stat { 989 ulong mmu_shadow_zapped; 990 ulong mmu_pte_write; 991 ulong mmu_pte_updated; 992 ulong mmu_pde_zapped; 993 ulong mmu_flooded; 994 ulong mmu_recycled; 995 ulong mmu_cache_miss; 996 ulong mmu_unsync; 997 ulong remote_tlb_flush; 998 ulong lpages; 999 ulong nx_lpage_splits; 1000 ulong max_mmu_page_hash_collisions; 1001 }; 1002 1003 struct kvm_vcpu_stat { 1004 u64 pf_fixed; 1005 u64 pf_guest; 1006 u64 tlb_flush; 1007 u64 invlpg; 1008 1009 u64 exits; 1010 u64 io_exits; 1011 u64 mmio_exits; 1012 u64 signal_exits; 1013 u64 irq_window_exits; 1014 u64 nmi_window_exits; 1015 u64 l1d_flush; 1016 u64 halt_exits; 1017 u64 halt_successful_poll; 1018 u64 halt_attempted_poll; 1019 u64 halt_poll_invalid; 1020 u64 halt_wakeup; 1021 u64 request_irq_exits; 1022 u64 irq_exits; 1023 u64 host_state_reload; 1024 u64 fpu_reload; 1025 u64 insn_emulation; 1026 u64 insn_emulation_fail; 1027 u64 hypercalls; 1028 u64 irq_injections; 1029 u64 nmi_injections; 1030 u64 req_event; 1031 }; 1032 1033 struct x86_instruction_info; 1034 1035 struct msr_data { 1036 bool host_initiated; 1037 u32 index; 1038 u64 data; 1039 }; 1040 1041 struct kvm_lapic_irq { 1042 u32 vector; 1043 u16 delivery_mode; 1044 u16 dest_mode; 1045 bool level; 1046 u16 trig_mode; 1047 u32 shorthand; 1048 u32 dest_id; 1049 bool msi_redir_hint; 1050 }; 1051 1052 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1053 { 1054 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1055 } 1056 1057 struct kvm_x86_ops { 1058 int (*hardware_enable)(void); 1059 void (*hardware_disable)(void); 1060 void (*hardware_unsetup)(void); 1061 bool (*cpu_has_accelerated_tpr)(void); 1062 bool (*has_emulated_msr)(int index); 1063 void (*cpuid_update)(struct kvm_vcpu *vcpu); 1064 1065 unsigned int vm_size; 1066 int (*vm_init)(struct kvm *kvm); 1067 void (*vm_destroy)(struct kvm *kvm); 1068 1069 /* Create, but do not attach this VCPU */ 1070 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1071 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1072 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1073 1074 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1075 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1076 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1077 1078 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 1079 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1080 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1081 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1082 void (*get_segment)(struct kvm_vcpu *vcpu, 1083 struct kvm_segment *var, int seg); 1084 int (*get_cpl)(struct kvm_vcpu *vcpu); 1085 void (*set_segment)(struct kvm_vcpu *vcpu, 1086 struct kvm_segment *var, int seg); 1087 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1088 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 1089 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 1090 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1091 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1092 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1093 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1094 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1095 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1096 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1097 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1098 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1099 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1100 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1101 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1102 1103 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa); 1104 int (*tlb_remote_flush)(struct kvm *kvm); 1105 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1106 struct kvm_tlb_range *range); 1107 1108 /* 1109 * Flush any TLB entries associated with the given GVA. 1110 * Does not need to flush GPA->HPA mappings. 1111 * Can potentially get non-canonical addresses through INVLPGs, which 1112 * the implementation may choose to ignore if appropriate. 1113 */ 1114 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1115 1116 void (*run)(struct kvm_vcpu *vcpu); 1117 int (*handle_exit)(struct kvm_vcpu *vcpu, 1118 enum exit_fastpath_completion exit_fastpath); 1119 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1120 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1121 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1122 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1123 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1124 unsigned char *hypercall_addr); 1125 void (*set_irq)(struct kvm_vcpu *vcpu); 1126 void (*set_nmi)(struct kvm_vcpu *vcpu); 1127 void (*queue_exception)(struct kvm_vcpu *vcpu); 1128 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1129 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 1130 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 1131 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1132 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1133 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1134 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1135 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1136 bool (*check_apicv_inhibit_reasons)(ulong bit); 1137 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate); 1138 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1139 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1140 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1141 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1142 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1143 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1144 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 1145 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1146 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1147 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1148 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1149 int (*get_tdp_level)(struct kvm_vcpu *vcpu); 1150 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1151 1152 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, unsigned long cr3); 1153 1154 bool (*has_wbinvd_exit)(void); 1155 1156 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu); 1157 /* Returns actual tsc_offset set in active VMCS */ 1158 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1159 1160 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 1161 1162 int (*check_intercept)(struct kvm_vcpu *vcpu, 1163 struct x86_instruction_info *info, 1164 enum x86_intercept_stage stage, 1165 struct x86_exception *exception); 1166 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu, 1167 enum exit_fastpath_completion *exit_fastpath); 1168 1169 int (*check_nested_events)(struct kvm_vcpu *vcpu); 1170 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1171 1172 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1173 1174 /* 1175 * Arch-specific dirty logging hooks. These hooks are only supposed to 1176 * be valid if the specific arch has hardware-accelerated dirty logging 1177 * mechanism. Currently only for PML on VMX. 1178 * 1179 * - slot_enable_log_dirty: 1180 * called when enabling log dirty mode for the slot. 1181 * - slot_disable_log_dirty: 1182 * called when disabling log dirty mode for the slot. 1183 * also called when slot is created with log dirty disabled. 1184 * - flush_log_dirty: 1185 * called before reporting dirty_bitmap to userspace. 1186 * - enable_log_dirty_pt_masked: 1187 * called when reenabling log dirty for the GFNs in the mask after 1188 * corresponding bits are cleared in slot->dirty_bitmap. 1189 */ 1190 void (*slot_enable_log_dirty)(struct kvm *kvm, 1191 struct kvm_memory_slot *slot); 1192 void (*slot_disable_log_dirty)(struct kvm *kvm, 1193 struct kvm_memory_slot *slot); 1194 void (*flush_log_dirty)(struct kvm *kvm); 1195 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1196 struct kvm_memory_slot *slot, 1197 gfn_t offset, unsigned long mask); 1198 int (*write_log_dirty)(struct kvm_vcpu *vcpu); 1199 1200 /* pmu operations of sub-arch */ 1201 const struct kvm_pmu_ops *pmu_ops; 1202 1203 /* 1204 * Architecture specific hooks for vCPU blocking due to 1205 * HLT instruction. 1206 * Returns for .pre_block(): 1207 * - 0 means continue to block the vCPU. 1208 * - 1 means we cannot block the vCPU since some event 1209 * happens during this period, such as, 'ON' bit in 1210 * posted-interrupts descriptor is set. 1211 */ 1212 int (*pre_block)(struct kvm_vcpu *vcpu); 1213 void (*post_block)(struct kvm_vcpu *vcpu); 1214 1215 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1216 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1217 1218 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1219 uint32_t guest_irq, bool set); 1220 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1221 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1222 1223 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1224 bool *expired); 1225 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1226 1227 void (*setup_mce)(struct kvm_vcpu *vcpu); 1228 1229 int (*get_nested_state)(struct kvm_vcpu *vcpu, 1230 struct kvm_nested_state __user *user_kvm_nested_state, 1231 unsigned user_data_size); 1232 int (*set_nested_state)(struct kvm_vcpu *vcpu, 1233 struct kvm_nested_state __user *user_kvm_nested_state, 1234 struct kvm_nested_state *kvm_state); 1235 bool (*get_vmcs12_pages)(struct kvm_vcpu *vcpu); 1236 1237 int (*smi_allowed)(struct kvm_vcpu *vcpu); 1238 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1239 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1240 int (*enable_smi_window)(struct kvm_vcpu *vcpu); 1241 1242 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1243 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1244 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1245 1246 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1247 1248 int (*nested_enable_evmcs)(struct kvm_vcpu *vcpu, 1249 uint16_t *vmcs_version); 1250 uint16_t (*nested_get_evmcs_version)(struct kvm_vcpu *vcpu); 1251 1252 bool (*need_emulation_on_page_fault)(struct kvm_vcpu *vcpu); 1253 1254 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1255 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1256 }; 1257 1258 struct kvm_x86_init_ops { 1259 int (*cpu_has_kvm_support)(void); 1260 int (*disabled_by_bios)(void); 1261 int (*check_processor_compatibility)(void); 1262 int (*hardware_setup)(void); 1263 1264 struct kvm_x86_ops *runtime_ops; 1265 }; 1266 1267 struct kvm_arch_async_pf { 1268 u32 token; 1269 gfn_t gfn; 1270 unsigned long cr3; 1271 bool direct_map; 1272 }; 1273 1274 extern u64 __read_mostly host_efer; 1275 1276 extern struct kvm_x86_ops kvm_x86_ops; 1277 extern struct kmem_cache *x86_fpu_cache; 1278 1279 #define __KVM_HAVE_ARCH_VM_ALLOC 1280 static inline struct kvm *kvm_arch_alloc_vm(void) 1281 { 1282 return __vmalloc(kvm_x86_ops.vm_size, 1283 GFP_KERNEL_ACCOUNT | __GFP_ZERO, PAGE_KERNEL); 1284 } 1285 void kvm_arch_free_vm(struct kvm *kvm); 1286 1287 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1288 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1289 { 1290 if (kvm_x86_ops.tlb_remote_flush && 1291 !kvm_x86_ops.tlb_remote_flush(kvm)) 1292 return 0; 1293 else 1294 return -ENOTSUPP; 1295 } 1296 1297 int kvm_mmu_module_init(void); 1298 void kvm_mmu_module_exit(void); 1299 1300 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1301 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1302 void kvm_mmu_init_vm(struct kvm *kvm); 1303 void kvm_mmu_uninit_vm(struct kvm *kvm); 1304 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1305 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1306 u64 acc_track_mask, u64 me_mask); 1307 1308 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1309 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1310 struct kvm_memory_slot *memslot, 1311 int start_level); 1312 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1313 const struct kvm_memory_slot *memslot); 1314 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1315 struct kvm_memory_slot *memslot); 1316 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1317 struct kvm_memory_slot *memslot); 1318 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1319 struct kvm_memory_slot *memslot); 1320 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1321 struct kvm_memory_slot *slot, 1322 gfn_t gfn_offset, unsigned long mask); 1323 void kvm_mmu_zap_all(struct kvm *kvm); 1324 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1325 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1326 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1327 1328 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1329 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1330 1331 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1332 const void *val, int bytes); 1333 1334 struct kvm_irq_mask_notifier { 1335 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1336 int irq; 1337 struct hlist_node link; 1338 }; 1339 1340 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1341 struct kvm_irq_mask_notifier *kimn); 1342 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1343 struct kvm_irq_mask_notifier *kimn); 1344 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1345 bool mask); 1346 1347 extern bool tdp_enabled; 1348 1349 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1350 1351 /* control of guest tsc rate supported? */ 1352 extern bool kvm_has_tsc_control; 1353 /* maximum supported tsc_khz for guests */ 1354 extern u32 kvm_max_guest_tsc_khz; 1355 /* number of bits of the fractional part of the TSC scaling ratio */ 1356 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1357 /* maximum allowed value of TSC scaling ratio */ 1358 extern u64 kvm_max_tsc_scaling_ratio; 1359 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1360 extern u64 kvm_default_tsc_scaling_ratio; 1361 1362 extern u64 kvm_mce_cap_supported; 1363 1364 /* 1365 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1366 * userspace I/O) to indicate that the emulation context 1367 * should be resued as is, i.e. skip initialization of 1368 * emulation context, instruction fetch and decode. 1369 * 1370 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1371 * Indicates that only select instructions (tagged with 1372 * EmulateOnUD) should be emulated (to minimize the emulator 1373 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1374 * 1375 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1376 * decode the instruction length. For use *only* by 1377 * kvm_x86_ops.skip_emulated_instruction() implementations. 1378 * 1379 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1380 * retry native execution under certain conditions, 1381 * Can only be set in conjunction with EMULTYPE_PF. 1382 * 1383 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1384 * triggered by KVM's magic "force emulation" prefix, 1385 * which is opt in via module param (off by default). 1386 * Bypasses EmulateOnUD restriction despite emulating 1387 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1388 * Used to test the full emulator from userspace. 1389 * 1390 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1391 * backdoor emulation, which is opt in via module param. 1392 * VMware backoor emulation handles select instructions 1393 * and reinjects the #GP for all other cases. 1394 * 1395 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1396 * case the CR2/GPA value pass on the stack is valid. 1397 */ 1398 #define EMULTYPE_NO_DECODE (1 << 0) 1399 #define EMULTYPE_TRAP_UD (1 << 1) 1400 #define EMULTYPE_SKIP (1 << 2) 1401 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1402 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1403 #define EMULTYPE_VMWARE_GP (1 << 5) 1404 #define EMULTYPE_PF (1 << 6) 1405 1406 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1407 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1408 void *insn, int insn_len); 1409 1410 void kvm_enable_efer_bits(u64); 1411 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1412 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1413 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1414 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1415 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1416 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1417 1418 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1419 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1420 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1421 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1422 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1423 1424 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1425 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1426 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1427 1428 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1429 int reason, bool has_error_code, u32 error_code); 1430 1431 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1432 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1433 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1434 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1435 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1436 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1437 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1438 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1439 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1440 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1441 1442 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1443 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1444 1445 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1446 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1447 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1448 1449 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1450 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1451 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1452 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1453 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1454 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1455 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1456 gfn_t gfn, void *data, int offset, int len, 1457 u32 access); 1458 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1459 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1460 1461 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1462 int irq_source_id, int level) 1463 { 1464 /* Logical OR for level trig interrupt */ 1465 if (level) 1466 __set_bit(irq_source_id, irq_state); 1467 else 1468 __clear_bit(irq_source_id, irq_state); 1469 1470 return !!(*irq_state); 1471 } 1472 1473 #define KVM_MMU_ROOT_CURRENT BIT(0) 1474 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1475 #define KVM_MMU_ROOTS_ALL (~0UL) 1476 1477 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1478 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1479 1480 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1481 1482 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1483 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1484 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1485 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1486 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1487 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1488 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1489 ulong roots_to_free); 1490 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1491 struct x86_exception *exception); 1492 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1493 struct x86_exception *exception); 1494 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1495 struct x86_exception *exception); 1496 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1497 struct x86_exception *exception); 1498 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1499 struct x86_exception *exception); 1500 1501 bool kvm_apicv_activated(struct kvm *kvm); 1502 void kvm_apicv_init(struct kvm *kvm, bool enable); 1503 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1504 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1505 unsigned long bit); 1506 1507 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1508 1509 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1510 void *insn, int insn_len); 1511 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1512 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1513 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush); 1514 1515 void kvm_configure_mmu(bool enable_tdp, int tdp_page_level); 1516 1517 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1518 struct x86_exception *exception) 1519 { 1520 return gpa; 1521 } 1522 1523 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1524 { 1525 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1526 1527 return (struct kvm_mmu_page *)page_private(page); 1528 } 1529 1530 static inline u16 kvm_read_ldt(void) 1531 { 1532 u16 ldt; 1533 asm("sldt %0" : "=g"(ldt)); 1534 return ldt; 1535 } 1536 1537 static inline void kvm_load_ldt(u16 sel) 1538 { 1539 asm("lldt %0" : : "rm"(sel)); 1540 } 1541 1542 #ifdef CONFIG_X86_64 1543 static inline unsigned long read_msr(unsigned long msr) 1544 { 1545 u64 value; 1546 1547 rdmsrl(msr, value); 1548 return value; 1549 } 1550 #endif 1551 1552 static inline u32 get_rdx_init_val(void) 1553 { 1554 return 0x600; /* P6 family */ 1555 } 1556 1557 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1558 { 1559 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1560 } 1561 1562 #define TSS_IOPB_BASE_OFFSET 0x66 1563 #define TSS_BASE_SIZE 0x68 1564 #define TSS_IOPB_SIZE (65536 / 8) 1565 #define TSS_REDIRECTION_SIZE (256 / 8) 1566 #define RMODE_TSS_SIZE \ 1567 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1568 1569 enum { 1570 TASK_SWITCH_CALL = 0, 1571 TASK_SWITCH_IRET = 1, 1572 TASK_SWITCH_JMP = 2, 1573 TASK_SWITCH_GATE = 3, 1574 }; 1575 1576 #define HF_GIF_MASK (1 << 0) 1577 #define HF_HIF_MASK (1 << 1) 1578 #define HF_VINTR_MASK (1 << 2) 1579 #define HF_NMI_MASK (1 << 3) 1580 #define HF_IRET_MASK (1 << 4) 1581 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1582 #define HF_SMM_MASK (1 << 6) 1583 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1584 1585 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1586 #define KVM_ADDRESS_SPACE_NUM 2 1587 1588 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1589 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1590 1591 asmlinkage void kvm_spurious_fault(void); 1592 1593 /* 1594 * Hardware virtualization extension instructions may fault if a 1595 * reboot turns off virtualization while processes are running. 1596 * Usually after catching the fault we just panic; during reboot 1597 * instead the instruction is ignored. 1598 */ 1599 #define __kvm_handle_fault_on_reboot(insn) \ 1600 "666: \n\t" \ 1601 insn "\n\t" \ 1602 "jmp 668f \n\t" \ 1603 "667: \n\t" \ 1604 "call kvm_spurious_fault \n\t" \ 1605 "668: \n\t" \ 1606 _ASM_EXTABLE(666b, 667b) 1607 1608 #define KVM_ARCH_WANT_MMU_NOTIFIER 1609 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1610 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1611 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1612 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1613 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1614 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1615 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1616 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1617 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1618 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1619 1620 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1621 unsigned long ipi_bitmap_high, u32 min, 1622 unsigned long icr, int op_64_bit); 1623 1624 void kvm_define_shared_msr(unsigned index, u32 msr); 1625 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1626 1627 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1628 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1629 1630 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1631 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1632 1633 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1634 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1635 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1636 unsigned long *vcpu_bitmap); 1637 1638 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1639 struct kvm_async_pf *work); 1640 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1641 struct kvm_async_pf *work); 1642 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1643 struct kvm_async_pf *work); 1644 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1645 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1646 1647 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1648 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1649 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1650 1651 int kvm_is_in_guest(void); 1652 1653 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1654 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1655 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1656 1657 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1658 struct kvm_vcpu **dest_vcpu); 1659 1660 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1661 struct kvm_lapic_irq *irq); 1662 1663 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1664 { 1665 /* We can only post Fixed and LowPrio IRQs */ 1666 return (irq->delivery_mode == APIC_DM_FIXED || 1667 irq->delivery_mode == APIC_DM_LOWEST); 1668 } 1669 1670 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1671 { 1672 if (kvm_x86_ops.vcpu_blocking) 1673 kvm_x86_ops.vcpu_blocking(vcpu); 1674 } 1675 1676 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1677 { 1678 if (kvm_x86_ops.vcpu_unblocking) 1679 kvm_x86_ops.vcpu_unblocking(vcpu); 1680 } 1681 1682 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1683 1684 static inline int kvm_cpu_get_apicid(int mps_cpu) 1685 { 1686 #ifdef CONFIG_X86_LOCAL_APIC 1687 return default_cpu_present_to_apicid(mps_cpu); 1688 #else 1689 WARN_ON_ONCE(1); 1690 return BAD_APICID; 1691 #endif 1692 } 1693 1694 #define put_smstate(type, buf, offset, val) \ 1695 *(type *)((buf) + (offset) - 0x7e00) = val 1696 1697 #define GET_SMSTATE(type, buf, offset) \ 1698 (*(type *)((buf) + (offset) - 0x7e00)) 1699 1700 #endif /* _ASM_X86_KVM_HOST_H */ 1701