1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 21 #include <linux/kvm.h> 22 #include <linux/kvm_para.h> 23 #include <linux/kvm_types.h> 24 #include <linux/perf_event.h> 25 #include <linux/pvclock_gtod.h> 26 #include <linux/clocksource.h> 27 #include <linux/irqbypass.h> 28 #include <linux/hyperv.h> 29 30 #include <asm/pvclock-abi.h> 31 #include <asm/desc.h> 32 #include <asm/mtrr.h> 33 #include <asm/msr-index.h> 34 #include <asm/asm.h> 35 36 #define KVM_MAX_VCPUS 255 37 #define KVM_SOFT_MAX_VCPUS 160 38 #define KVM_USER_MEM_SLOTS 509 39 /* memory slots that are not exposed to userspace */ 40 #define KVM_PRIVATE_MEM_SLOTS 3 41 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 42 43 #define KVM_PIO_PAGE_OFFSET 1 44 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 45 #define KVM_HALT_POLL_NS_DEFAULT 500000 46 47 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 48 49 /* x86-specific vcpu->requests bit members */ 50 #define KVM_REQ_MIGRATE_TIMER 8 51 #define KVM_REQ_REPORT_TPR_ACCESS 9 52 #define KVM_REQ_TRIPLE_FAULT 10 53 #define KVM_REQ_MMU_SYNC 11 54 #define KVM_REQ_CLOCK_UPDATE 12 55 #define KVM_REQ_DEACTIVATE_FPU 13 56 #define KVM_REQ_EVENT 14 57 #define KVM_REQ_APF_HALT 15 58 #define KVM_REQ_STEAL_UPDATE 16 59 #define KVM_REQ_NMI 17 60 #define KVM_REQ_PMU 18 61 #define KVM_REQ_PMI 19 62 #define KVM_REQ_SMI 20 63 #define KVM_REQ_MASTERCLOCK_UPDATE 21 64 #define KVM_REQ_MCLOCK_INPROGRESS 22 65 #define KVM_REQ_SCAN_IOAPIC 23 66 #define KVM_REQ_GLOBAL_CLOCK_UPDATE 24 67 #define KVM_REQ_APIC_PAGE_RELOAD 25 68 #define KVM_REQ_HV_CRASH 26 69 #define KVM_REQ_IOAPIC_EOI_EXIT 27 70 #define KVM_REQ_HV_RESET 28 71 #define KVM_REQ_HV_EXIT 29 72 #define KVM_REQ_HV_STIMER 30 73 74 #define CR0_RESERVED_BITS \ 75 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 76 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 77 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 78 79 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL 80 #define CR3_PCID_INVD BIT_64(63) 81 #define CR4_RESERVED_BITS \ 82 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 83 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 84 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 85 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 86 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP)) 87 88 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 89 90 91 92 #define INVALID_PAGE (~(hpa_t)0) 93 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 94 95 #define UNMAPPED_GVA (~(gpa_t)0) 96 97 /* KVM Hugepage definitions for x86 */ 98 #define KVM_NR_PAGE_SIZES 3 99 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 100 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 101 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 102 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 103 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 104 105 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 106 { 107 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 108 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 109 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 110 } 111 112 #define KVM_PERMILLE_MMU_PAGES 20 113 #define KVM_MIN_ALLOC_MMU_PAGES 64 114 #define KVM_MMU_HASH_SHIFT 10 115 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 116 #define KVM_MIN_FREE_MMU_PAGES 5 117 #define KVM_REFILL_PAGES 25 118 #define KVM_MAX_CPUID_ENTRIES 80 119 #define KVM_NR_FIXED_MTRR_REGION 88 120 #define KVM_NR_VAR_MTRR 8 121 122 #define ASYNC_PF_PER_VCPU 64 123 124 enum kvm_reg { 125 VCPU_REGS_RAX = 0, 126 VCPU_REGS_RCX = 1, 127 VCPU_REGS_RDX = 2, 128 VCPU_REGS_RBX = 3, 129 VCPU_REGS_RSP = 4, 130 VCPU_REGS_RBP = 5, 131 VCPU_REGS_RSI = 6, 132 VCPU_REGS_RDI = 7, 133 #ifdef CONFIG_X86_64 134 VCPU_REGS_R8 = 8, 135 VCPU_REGS_R9 = 9, 136 VCPU_REGS_R10 = 10, 137 VCPU_REGS_R11 = 11, 138 VCPU_REGS_R12 = 12, 139 VCPU_REGS_R13 = 13, 140 VCPU_REGS_R14 = 14, 141 VCPU_REGS_R15 = 15, 142 #endif 143 VCPU_REGS_RIP, 144 NR_VCPU_REGS 145 }; 146 147 enum kvm_reg_ex { 148 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 149 VCPU_EXREG_CR3, 150 VCPU_EXREG_RFLAGS, 151 VCPU_EXREG_SEGMENTS, 152 }; 153 154 enum { 155 VCPU_SREG_ES, 156 VCPU_SREG_CS, 157 VCPU_SREG_SS, 158 VCPU_SREG_DS, 159 VCPU_SREG_FS, 160 VCPU_SREG_GS, 161 VCPU_SREG_TR, 162 VCPU_SREG_LDTR, 163 }; 164 165 #include <asm/kvm_emulate.h> 166 167 #define KVM_NR_MEM_OBJS 40 168 169 #define KVM_NR_DB_REGS 4 170 171 #define DR6_BD (1 << 13) 172 #define DR6_BS (1 << 14) 173 #define DR6_RTM (1 << 16) 174 #define DR6_FIXED_1 0xfffe0ff0 175 #define DR6_INIT 0xffff0ff0 176 #define DR6_VOLATILE 0x0001e00f 177 178 #define DR7_BP_EN_MASK 0x000000ff 179 #define DR7_GE (1 << 9) 180 #define DR7_GD (1 << 13) 181 #define DR7_FIXED_1 0x00000400 182 #define DR7_VOLATILE 0xffff2bff 183 184 #define PFERR_PRESENT_BIT 0 185 #define PFERR_WRITE_BIT 1 186 #define PFERR_USER_BIT 2 187 #define PFERR_RSVD_BIT 3 188 #define PFERR_FETCH_BIT 4 189 190 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 191 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 192 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 193 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 194 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 195 196 /* apic attention bits */ 197 #define KVM_APIC_CHECK_VAPIC 0 198 /* 199 * The following bit is set with PV-EOI, unset on EOI. 200 * We detect PV-EOI changes by guest by comparing 201 * this bit with PV-EOI in guest memory. 202 * See the implementation in apic_update_pv_eoi. 203 */ 204 #define KVM_APIC_PV_EOI_PENDING 1 205 206 struct kvm_kernel_irq_routing_entry; 207 208 /* 209 * We don't want allocation failures within the mmu code, so we preallocate 210 * enough memory for a single page fault in a cache. 211 */ 212 struct kvm_mmu_memory_cache { 213 int nobjs; 214 void *objects[KVM_NR_MEM_OBJS]; 215 }; 216 217 union kvm_mmu_page_role { 218 unsigned word; 219 struct { 220 unsigned level:4; 221 unsigned cr4_pae:1; 222 unsigned quadrant:2; 223 unsigned direct:1; 224 unsigned access:3; 225 unsigned invalid:1; 226 unsigned nxe:1; 227 unsigned cr0_wp:1; 228 unsigned smep_andnot_wp:1; 229 unsigned smap_andnot_wp:1; 230 unsigned :8; 231 232 /* 233 * This is left at the top of the word so that 234 * kvm_memslots_for_spte_role can extract it with a 235 * simple shift. While there is room, give it a whole 236 * byte so it is also faster to load it from memory. 237 */ 238 unsigned smm:8; 239 }; 240 }; 241 242 struct kvm_rmap_head { 243 unsigned long val; 244 }; 245 246 struct kvm_mmu_page { 247 struct list_head link; 248 struct hlist_node hash_link; 249 250 /* 251 * The following two entries are used to key the shadow page in the 252 * hash table. 253 */ 254 gfn_t gfn; 255 union kvm_mmu_page_role role; 256 257 u64 *spt; 258 /* hold the gfn of each spte inside spt */ 259 gfn_t *gfns; 260 bool unsync; 261 int root_count; /* Currently serving as active root */ 262 unsigned int unsync_children; 263 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 264 265 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 266 unsigned long mmu_valid_gen; 267 268 DECLARE_BITMAP(unsync_child_bitmap, 512); 269 270 #ifdef CONFIG_X86_32 271 /* 272 * Used out of the mmu-lock to avoid reading spte values while an 273 * update is in progress; see the comments in __get_spte_lockless(). 274 */ 275 int clear_spte_count; 276 #endif 277 278 /* Number of writes since the last time traversal visited this page. */ 279 int write_flooding_count; 280 }; 281 282 struct kvm_pio_request { 283 unsigned long count; 284 int in; 285 int port; 286 int size; 287 }; 288 289 struct rsvd_bits_validate { 290 u64 rsvd_bits_mask[2][4]; 291 u64 bad_mt_xwr; 292 }; 293 294 /* 295 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level 296 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu 297 * mode. 298 */ 299 struct kvm_mmu { 300 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 301 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 302 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 303 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 304 bool prefault); 305 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 306 struct x86_exception *fault); 307 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 308 struct x86_exception *exception); 309 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 310 struct x86_exception *exception); 311 int (*sync_page)(struct kvm_vcpu *vcpu, 312 struct kvm_mmu_page *sp); 313 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 314 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 315 u64 *spte, const void *pte); 316 hpa_t root_hpa; 317 int root_level; 318 int shadow_root_level; 319 union kvm_mmu_page_role base_role; 320 bool direct_map; 321 322 /* 323 * Bitmap; bit set = permission fault 324 * Byte index: page fault error code [4:1] 325 * Bit index: pte permissions in ACC_* format 326 */ 327 u8 permissions[16]; 328 329 u64 *pae_root; 330 u64 *lm_root; 331 332 /* 333 * check zero bits on shadow page table entries, these 334 * bits include not only hardware reserved bits but also 335 * the bits spte never used. 336 */ 337 struct rsvd_bits_validate shadow_zero_check; 338 339 struct rsvd_bits_validate guest_rsvd_check; 340 341 /* 342 * Bitmap: bit set = last pte in walk 343 * index[0:1]: level (zero-based) 344 * index[2]: pte.ps 345 */ 346 u8 last_pte_bitmap; 347 348 bool nx; 349 350 u64 pdptrs[4]; /* pae */ 351 }; 352 353 enum pmc_type { 354 KVM_PMC_GP = 0, 355 KVM_PMC_FIXED, 356 }; 357 358 struct kvm_pmc { 359 enum pmc_type type; 360 u8 idx; 361 u64 counter; 362 u64 eventsel; 363 struct perf_event *perf_event; 364 struct kvm_vcpu *vcpu; 365 }; 366 367 struct kvm_pmu { 368 unsigned nr_arch_gp_counters; 369 unsigned nr_arch_fixed_counters; 370 unsigned available_event_types; 371 u64 fixed_ctr_ctrl; 372 u64 global_ctrl; 373 u64 global_status; 374 u64 global_ovf_ctrl; 375 u64 counter_bitmask[2]; 376 u64 global_ctrl_mask; 377 u64 reserved_bits; 378 u8 version; 379 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 380 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 381 struct irq_work irq_work; 382 u64 reprogram_pmi; 383 }; 384 385 struct kvm_pmu_ops; 386 387 enum { 388 KVM_DEBUGREG_BP_ENABLED = 1, 389 KVM_DEBUGREG_WONT_EXIT = 2, 390 KVM_DEBUGREG_RELOAD = 4, 391 }; 392 393 struct kvm_mtrr_range { 394 u64 base; 395 u64 mask; 396 struct list_head node; 397 }; 398 399 struct kvm_mtrr { 400 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 401 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 402 u64 deftype; 403 404 struct list_head head; 405 }; 406 407 /* Hyper-V SynIC timer */ 408 struct kvm_vcpu_hv_stimer { 409 struct hrtimer timer; 410 int index; 411 u64 config; 412 u64 count; 413 u64 exp_time; 414 struct hv_message msg; 415 bool msg_pending; 416 }; 417 418 /* Hyper-V synthetic interrupt controller (SynIC)*/ 419 struct kvm_vcpu_hv_synic { 420 u64 version; 421 u64 control; 422 u64 msg_page; 423 u64 evt_page; 424 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 425 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 426 DECLARE_BITMAP(auto_eoi_bitmap, 256); 427 DECLARE_BITMAP(vec_bitmap, 256); 428 bool active; 429 }; 430 431 /* Hyper-V per vcpu emulation context */ 432 struct kvm_vcpu_hv { 433 u64 hv_vapic; 434 s64 runtime_offset; 435 struct kvm_vcpu_hv_synic synic; 436 struct kvm_hyperv_exit exit; 437 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 438 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 439 }; 440 441 struct kvm_vcpu_arch { 442 /* 443 * rip and regs accesses must go through 444 * kvm_{register,rip}_{read,write} functions. 445 */ 446 unsigned long regs[NR_VCPU_REGS]; 447 u32 regs_avail; 448 u32 regs_dirty; 449 450 unsigned long cr0; 451 unsigned long cr0_guest_owned_bits; 452 unsigned long cr2; 453 unsigned long cr3; 454 unsigned long cr4; 455 unsigned long cr4_guest_owned_bits; 456 unsigned long cr8; 457 u32 hflags; 458 u64 efer; 459 u64 apic_base; 460 struct kvm_lapic *apic; /* kernel irqchip context */ 461 bool apicv_active; 462 DECLARE_BITMAP(ioapic_handled_vectors, 256); 463 unsigned long apic_attention; 464 int32_t apic_arb_prio; 465 int mp_state; 466 u64 ia32_misc_enable_msr; 467 u64 smbase; 468 bool tpr_access_reporting; 469 u64 ia32_xss; 470 471 /* 472 * Paging state of the vcpu 473 * 474 * If the vcpu runs in guest mode with two level paging this still saves 475 * the paging mode of the l1 guest. This context is always used to 476 * handle faults. 477 */ 478 struct kvm_mmu mmu; 479 480 /* 481 * Paging state of an L2 guest (used for nested npt) 482 * 483 * This context will save all necessary information to walk page tables 484 * of the an L2 guest. This context is only initialized for page table 485 * walking and not for faulting since we never handle l2 page faults on 486 * the host. 487 */ 488 struct kvm_mmu nested_mmu; 489 490 /* 491 * Pointer to the mmu context currently used for 492 * gva_to_gpa translations. 493 */ 494 struct kvm_mmu *walk_mmu; 495 496 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 497 struct kvm_mmu_memory_cache mmu_page_cache; 498 struct kvm_mmu_memory_cache mmu_page_header_cache; 499 500 struct fpu guest_fpu; 501 bool eager_fpu; 502 u64 xcr0; 503 u64 guest_supported_xcr0; 504 u32 guest_xstate_size; 505 506 struct kvm_pio_request pio; 507 void *pio_data; 508 509 u8 event_exit_inst_len; 510 511 struct kvm_queued_exception { 512 bool pending; 513 bool has_error_code; 514 bool reinject; 515 u8 nr; 516 u32 error_code; 517 } exception; 518 519 struct kvm_queued_interrupt { 520 bool pending; 521 bool soft; 522 u8 nr; 523 } interrupt; 524 525 int halt_request; /* real mode on Intel only */ 526 527 int cpuid_nent; 528 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 529 530 int maxphyaddr; 531 532 /* emulate context */ 533 534 struct x86_emulate_ctxt emulate_ctxt; 535 bool emulate_regs_need_sync_to_vcpu; 536 bool emulate_regs_need_sync_from_vcpu; 537 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 538 539 gpa_t time; 540 struct pvclock_vcpu_time_info hv_clock; 541 unsigned int hw_tsc_khz; 542 struct gfn_to_hva_cache pv_time; 543 bool pv_time_enabled; 544 /* set guest stopped flag in pvclock flags field */ 545 bool pvclock_set_guest_stopped_request; 546 547 struct { 548 u64 msr_val; 549 u64 last_steal; 550 u64 accum_steal; 551 struct gfn_to_hva_cache stime; 552 struct kvm_steal_time steal; 553 } st; 554 555 u64 last_guest_tsc; 556 u64 last_host_tsc; 557 u64 tsc_offset_adjustment; 558 u64 this_tsc_nsec; 559 u64 this_tsc_write; 560 u64 this_tsc_generation; 561 bool tsc_catchup; 562 bool tsc_always_catchup; 563 s8 virtual_tsc_shift; 564 u32 virtual_tsc_mult; 565 u32 virtual_tsc_khz; 566 s64 ia32_tsc_adjust_msr; 567 u64 tsc_scaling_ratio; 568 569 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 570 unsigned nmi_pending; /* NMI queued after currently running handler */ 571 bool nmi_injected; /* Trying to inject an NMI this entry */ 572 bool smi_pending; /* SMI queued after currently running handler */ 573 574 struct kvm_mtrr mtrr_state; 575 u64 pat; 576 577 unsigned switch_db_regs; 578 unsigned long db[KVM_NR_DB_REGS]; 579 unsigned long dr6; 580 unsigned long dr7; 581 unsigned long eff_db[KVM_NR_DB_REGS]; 582 unsigned long guest_debug_dr7; 583 584 u64 mcg_cap; 585 u64 mcg_status; 586 u64 mcg_ctl; 587 u64 *mce_banks; 588 589 /* Cache MMIO info */ 590 u64 mmio_gva; 591 unsigned access; 592 gfn_t mmio_gfn; 593 u64 mmio_gen; 594 595 struct kvm_pmu pmu; 596 597 /* used for guest single stepping over the given code position */ 598 unsigned long singlestep_rip; 599 600 struct kvm_vcpu_hv hyperv; 601 602 cpumask_var_t wbinvd_dirty_mask; 603 604 unsigned long last_retry_eip; 605 unsigned long last_retry_addr; 606 607 struct { 608 bool halted; 609 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 610 struct gfn_to_hva_cache data; 611 u64 msr_val; 612 u32 id; 613 bool send_user_only; 614 } apf; 615 616 /* OSVW MSRs (AMD only) */ 617 struct { 618 u64 length; 619 u64 status; 620 } osvw; 621 622 struct { 623 u64 msr_val; 624 struct gfn_to_hva_cache data; 625 } pv_eoi; 626 627 /* 628 * Indicate whether the access faults on its page table in guest 629 * which is set when fix page fault and used to detect unhandeable 630 * instruction. 631 */ 632 bool write_fault_to_shadow_pgtable; 633 634 /* set at EPT violation at this point */ 635 unsigned long exit_qualification; 636 637 /* pv related host specific info */ 638 struct { 639 bool pv_unhalted; 640 } pv; 641 642 int pending_ioapic_eoi; 643 int pending_external_vector; 644 }; 645 646 struct kvm_lpage_info { 647 int write_count; 648 }; 649 650 struct kvm_arch_memory_slot { 651 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 652 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 653 }; 654 655 /* 656 * We use as the mode the number of bits allocated in the LDR for the 657 * logical processor ID. It happens that these are all powers of two. 658 * This makes it is very easy to detect cases where the APICs are 659 * configured for multiple modes; in that case, we cannot use the map and 660 * hence cannot use kvm_irq_delivery_to_apic_fast either. 661 */ 662 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 663 #define KVM_APIC_MODE_XAPIC_FLAT 8 664 #define KVM_APIC_MODE_X2APIC 16 665 666 struct kvm_apic_map { 667 struct rcu_head rcu; 668 u8 mode; 669 struct kvm_lapic *phys_map[256]; 670 /* first index is cluster id second is cpu id in a cluster */ 671 struct kvm_lapic *logical_map[16][16]; 672 }; 673 674 /* Hyper-V emulation context */ 675 struct kvm_hv { 676 u64 hv_guest_os_id; 677 u64 hv_hypercall; 678 u64 hv_tsc_page; 679 680 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 681 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 682 u64 hv_crash_ctl; 683 }; 684 685 struct kvm_arch { 686 unsigned int n_used_mmu_pages; 687 unsigned int n_requested_mmu_pages; 688 unsigned int n_max_mmu_pages; 689 unsigned int indirect_shadow_pages; 690 unsigned long mmu_valid_gen; 691 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 692 /* 693 * Hash table of struct kvm_mmu_page. 694 */ 695 struct list_head active_mmu_pages; 696 struct list_head zapped_obsolete_pages; 697 698 struct list_head assigned_dev_head; 699 struct iommu_domain *iommu_domain; 700 bool iommu_noncoherent; 701 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 702 atomic_t noncoherent_dma_count; 703 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 704 atomic_t assigned_device_count; 705 struct kvm_pic *vpic; 706 struct kvm_ioapic *vioapic; 707 struct kvm_pit *vpit; 708 atomic_t vapics_in_nmi_mode; 709 struct mutex apic_map_lock; 710 struct kvm_apic_map *apic_map; 711 712 unsigned int tss_addr; 713 bool apic_access_page_done; 714 715 gpa_t wall_clock; 716 717 bool ept_identity_pagetable_done; 718 gpa_t ept_identity_map_addr; 719 720 unsigned long irq_sources_bitmap; 721 s64 kvmclock_offset; 722 raw_spinlock_t tsc_write_lock; 723 u64 last_tsc_nsec; 724 u64 last_tsc_write; 725 u32 last_tsc_khz; 726 u64 cur_tsc_nsec; 727 u64 cur_tsc_write; 728 u64 cur_tsc_offset; 729 u64 cur_tsc_generation; 730 int nr_vcpus_matched_tsc; 731 732 spinlock_t pvclock_gtod_sync_lock; 733 bool use_master_clock; 734 u64 master_kernel_ns; 735 cycle_t master_cycle_now; 736 struct delayed_work kvmclock_update_work; 737 struct delayed_work kvmclock_sync_work; 738 739 struct kvm_xen_hvm_config xen_hvm_config; 740 741 /* reads protected by irq_srcu, writes by irq_lock */ 742 struct hlist_head mask_notifier_list; 743 744 struct kvm_hv hyperv; 745 746 #ifdef CONFIG_KVM_MMU_AUDIT 747 int audit_point; 748 #endif 749 750 bool boot_vcpu_runs_old_kvmclock; 751 u32 bsp_vcpu_id; 752 753 u64 disabled_quirks; 754 755 bool irqchip_split; 756 u8 nr_reserved_ioapic_pins; 757 }; 758 759 struct kvm_vm_stat { 760 u32 mmu_shadow_zapped; 761 u32 mmu_pte_write; 762 u32 mmu_pte_updated; 763 u32 mmu_pde_zapped; 764 u32 mmu_flooded; 765 u32 mmu_recycled; 766 u32 mmu_cache_miss; 767 u32 mmu_unsync; 768 u32 remote_tlb_flush; 769 u32 lpages; 770 }; 771 772 struct kvm_vcpu_stat { 773 u32 pf_fixed; 774 u32 pf_guest; 775 u32 tlb_flush; 776 u32 invlpg; 777 778 u32 exits; 779 u32 io_exits; 780 u32 mmio_exits; 781 u32 signal_exits; 782 u32 irq_window_exits; 783 u32 nmi_window_exits; 784 u32 halt_exits; 785 u32 halt_successful_poll; 786 u32 halt_attempted_poll; 787 u32 halt_wakeup; 788 u32 request_irq_exits; 789 u32 irq_exits; 790 u32 host_state_reload; 791 u32 efer_reload; 792 u32 fpu_reload; 793 u32 insn_emulation; 794 u32 insn_emulation_fail; 795 u32 hypercalls; 796 u32 irq_injections; 797 u32 nmi_injections; 798 }; 799 800 struct x86_instruction_info; 801 802 struct msr_data { 803 bool host_initiated; 804 u32 index; 805 u64 data; 806 }; 807 808 struct kvm_lapic_irq { 809 u32 vector; 810 u16 delivery_mode; 811 u16 dest_mode; 812 bool level; 813 u16 trig_mode; 814 u32 shorthand; 815 u32 dest_id; 816 bool msi_redir_hint; 817 }; 818 819 struct kvm_x86_ops { 820 int (*cpu_has_kvm_support)(void); /* __init */ 821 int (*disabled_by_bios)(void); /* __init */ 822 int (*hardware_enable)(void); 823 void (*hardware_disable)(void); 824 void (*check_processor_compatibility)(void *rtn); 825 int (*hardware_setup)(void); /* __init */ 826 void (*hardware_unsetup)(void); /* __exit */ 827 bool (*cpu_has_accelerated_tpr)(void); 828 bool (*cpu_has_high_real_mode_segbase)(void); 829 void (*cpuid_update)(struct kvm_vcpu *vcpu); 830 831 /* Create, but do not attach this VCPU */ 832 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 833 void (*vcpu_free)(struct kvm_vcpu *vcpu); 834 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 835 836 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 837 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 838 void (*vcpu_put)(struct kvm_vcpu *vcpu); 839 840 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 841 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 842 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 843 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 844 void (*get_segment)(struct kvm_vcpu *vcpu, 845 struct kvm_segment *var, int seg); 846 int (*get_cpl)(struct kvm_vcpu *vcpu); 847 void (*set_segment)(struct kvm_vcpu *vcpu, 848 struct kvm_segment *var, int seg); 849 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 850 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 851 void (*decache_cr3)(struct kvm_vcpu *vcpu); 852 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 853 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 854 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 855 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 856 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 857 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 858 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 859 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 860 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 861 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 862 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 863 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 864 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 865 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 866 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 867 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 868 void (*fpu_activate)(struct kvm_vcpu *vcpu); 869 void (*fpu_deactivate)(struct kvm_vcpu *vcpu); 870 871 void (*tlb_flush)(struct kvm_vcpu *vcpu); 872 873 void (*run)(struct kvm_vcpu *vcpu); 874 int (*handle_exit)(struct kvm_vcpu *vcpu); 875 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 876 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 877 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 878 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 879 unsigned char *hypercall_addr); 880 void (*set_irq)(struct kvm_vcpu *vcpu); 881 void (*set_nmi)(struct kvm_vcpu *vcpu); 882 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, 883 bool has_error_code, u32 error_code, 884 bool reinject); 885 void (*cancel_injection)(struct kvm_vcpu *vcpu); 886 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 887 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 888 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 889 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 890 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 891 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 892 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 893 bool (*get_enable_apicv)(void); 894 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 895 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 896 void (*hwapic_isr_update)(struct kvm *kvm, int isr); 897 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 898 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set); 899 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 900 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 901 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 902 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 903 int (*get_tdp_level)(void); 904 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 905 int (*get_lpage_level)(void); 906 bool (*rdtscp_supported)(void); 907 bool (*invpcid_supported)(void); 908 void (*adjust_tsc_offset_guest)(struct kvm_vcpu *vcpu, s64 adjustment); 909 910 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 911 912 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 913 914 bool (*has_wbinvd_exit)(void); 915 916 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu); 917 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 918 919 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc); 920 921 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 922 923 int (*check_intercept)(struct kvm_vcpu *vcpu, 924 struct x86_instruction_info *info, 925 enum x86_intercept_stage stage); 926 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 927 bool (*mpx_supported)(void); 928 bool (*xsaves_supported)(void); 929 930 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 931 932 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 933 934 /* 935 * Arch-specific dirty logging hooks. These hooks are only supposed to 936 * be valid if the specific arch has hardware-accelerated dirty logging 937 * mechanism. Currently only for PML on VMX. 938 * 939 * - slot_enable_log_dirty: 940 * called when enabling log dirty mode for the slot. 941 * - slot_disable_log_dirty: 942 * called when disabling log dirty mode for the slot. 943 * also called when slot is created with log dirty disabled. 944 * - flush_log_dirty: 945 * called before reporting dirty_bitmap to userspace. 946 * - enable_log_dirty_pt_masked: 947 * called when reenabling log dirty for the GFNs in the mask after 948 * corresponding bits are cleared in slot->dirty_bitmap. 949 */ 950 void (*slot_enable_log_dirty)(struct kvm *kvm, 951 struct kvm_memory_slot *slot); 952 void (*slot_disable_log_dirty)(struct kvm *kvm, 953 struct kvm_memory_slot *slot); 954 void (*flush_log_dirty)(struct kvm *kvm); 955 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 956 struct kvm_memory_slot *slot, 957 gfn_t offset, unsigned long mask); 958 /* pmu operations of sub-arch */ 959 const struct kvm_pmu_ops *pmu_ops; 960 961 /* 962 * Architecture specific hooks for vCPU blocking due to 963 * HLT instruction. 964 * Returns for .pre_block(): 965 * - 0 means continue to block the vCPU. 966 * - 1 means we cannot block the vCPU since some event 967 * happens during this period, such as, 'ON' bit in 968 * posted-interrupts descriptor is set. 969 */ 970 int (*pre_block)(struct kvm_vcpu *vcpu); 971 void (*post_block)(struct kvm_vcpu *vcpu); 972 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 973 uint32_t guest_irq, bool set); 974 }; 975 976 struct kvm_arch_async_pf { 977 u32 token; 978 gfn_t gfn; 979 unsigned long cr3; 980 bool direct_map; 981 }; 982 983 extern struct kvm_x86_ops *kvm_x86_ops; 984 985 int kvm_mmu_module_init(void); 986 void kvm_mmu_module_exit(void); 987 988 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 989 int kvm_mmu_create(struct kvm_vcpu *vcpu); 990 void kvm_mmu_setup(struct kvm_vcpu *vcpu); 991 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 992 u64 dirty_mask, u64 nx_mask, u64 x_mask); 993 994 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 995 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 996 struct kvm_memory_slot *memslot); 997 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 998 const struct kvm_memory_slot *memslot); 999 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1000 struct kvm_memory_slot *memslot); 1001 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1002 struct kvm_memory_slot *memslot); 1003 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1004 struct kvm_memory_slot *memslot); 1005 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1006 struct kvm_memory_slot *slot, 1007 gfn_t gfn_offset, unsigned long mask); 1008 void kvm_mmu_zap_all(struct kvm *kvm); 1009 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots); 1010 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 1011 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 1012 1013 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1014 1015 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1016 const void *val, int bytes); 1017 1018 struct kvm_irq_mask_notifier { 1019 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1020 int irq; 1021 struct hlist_node link; 1022 }; 1023 1024 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1025 struct kvm_irq_mask_notifier *kimn); 1026 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1027 struct kvm_irq_mask_notifier *kimn); 1028 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1029 bool mask); 1030 1031 extern bool tdp_enabled; 1032 1033 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1034 1035 /* control of guest tsc rate supported? */ 1036 extern bool kvm_has_tsc_control; 1037 /* maximum supported tsc_khz for guests */ 1038 extern u32 kvm_max_guest_tsc_khz; 1039 /* number of bits of the fractional part of the TSC scaling ratio */ 1040 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1041 /* maximum allowed value of TSC scaling ratio */ 1042 extern u64 kvm_max_tsc_scaling_ratio; 1043 1044 enum emulation_result { 1045 EMULATE_DONE, /* no further processing */ 1046 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 1047 EMULATE_FAIL, /* can't emulate this instruction */ 1048 }; 1049 1050 #define EMULTYPE_NO_DECODE (1 << 0) 1051 #define EMULTYPE_TRAP_UD (1 << 1) 1052 #define EMULTYPE_SKIP (1 << 2) 1053 #define EMULTYPE_RETRY (1 << 3) 1054 #define EMULTYPE_NO_REEXECUTE (1 << 4) 1055 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 1056 int emulation_type, void *insn, int insn_len); 1057 1058 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 1059 int emulation_type) 1060 { 1061 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0); 1062 } 1063 1064 void kvm_enable_efer_bits(u64); 1065 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1066 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1067 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1068 1069 struct x86_emulate_ctxt; 1070 1071 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); 1072 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1073 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1074 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1075 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1076 1077 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1078 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1079 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1080 1081 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1082 int reason, bool has_error_code, u32 error_code); 1083 1084 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1085 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1086 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1087 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1088 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1089 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1090 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1091 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1092 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1093 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1094 1095 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1096 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1097 1098 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1099 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1100 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1101 1102 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1103 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1104 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1105 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1106 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1107 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1108 gfn_t gfn, void *data, int offset, int len, 1109 u32 access); 1110 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1111 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1112 1113 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1114 int irq_source_id, int level) 1115 { 1116 /* Logical OR for level trig interrupt */ 1117 if (level) 1118 __set_bit(irq_source_id, irq_state); 1119 else 1120 __clear_bit(irq_source_id, irq_state); 1121 1122 return !!(*irq_state); 1123 } 1124 1125 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1126 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1127 1128 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1129 1130 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 1131 const u8 *new, int bytes); 1132 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1133 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1134 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1135 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1136 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1137 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1138 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1139 struct x86_exception *exception); 1140 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1141 struct x86_exception *exception); 1142 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1143 struct x86_exception *exception); 1144 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1145 struct x86_exception *exception); 1146 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1147 struct x86_exception *exception); 1148 1149 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu); 1150 1151 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1152 1153 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code, 1154 void *insn, int insn_len); 1155 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1156 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu); 1157 1158 void kvm_enable_tdp(void); 1159 void kvm_disable_tdp(void); 1160 1161 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1162 struct x86_exception *exception) 1163 { 1164 return gpa; 1165 } 1166 1167 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1168 { 1169 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1170 1171 return (struct kvm_mmu_page *)page_private(page); 1172 } 1173 1174 static inline u16 kvm_read_ldt(void) 1175 { 1176 u16 ldt; 1177 asm("sldt %0" : "=g"(ldt)); 1178 return ldt; 1179 } 1180 1181 static inline void kvm_load_ldt(u16 sel) 1182 { 1183 asm("lldt %0" : : "rm"(sel)); 1184 } 1185 1186 #ifdef CONFIG_X86_64 1187 static inline unsigned long read_msr(unsigned long msr) 1188 { 1189 u64 value; 1190 1191 rdmsrl(msr, value); 1192 return value; 1193 } 1194 #endif 1195 1196 static inline u32 get_rdx_init_val(void) 1197 { 1198 return 0x600; /* P6 family */ 1199 } 1200 1201 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1202 { 1203 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1204 } 1205 1206 static inline u64 get_canonical(u64 la) 1207 { 1208 return ((int64_t)la << 16) >> 16; 1209 } 1210 1211 static inline bool is_noncanonical_address(u64 la) 1212 { 1213 #ifdef CONFIG_X86_64 1214 return get_canonical(la) != la; 1215 #else 1216 return false; 1217 #endif 1218 } 1219 1220 #define TSS_IOPB_BASE_OFFSET 0x66 1221 #define TSS_BASE_SIZE 0x68 1222 #define TSS_IOPB_SIZE (65536 / 8) 1223 #define TSS_REDIRECTION_SIZE (256 / 8) 1224 #define RMODE_TSS_SIZE \ 1225 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1226 1227 enum { 1228 TASK_SWITCH_CALL = 0, 1229 TASK_SWITCH_IRET = 1, 1230 TASK_SWITCH_JMP = 2, 1231 TASK_SWITCH_GATE = 3, 1232 }; 1233 1234 #define HF_GIF_MASK (1 << 0) 1235 #define HF_HIF_MASK (1 << 1) 1236 #define HF_VINTR_MASK (1 << 2) 1237 #define HF_NMI_MASK (1 << 3) 1238 #define HF_IRET_MASK (1 << 4) 1239 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1240 #define HF_SMM_MASK (1 << 6) 1241 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1242 1243 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1244 #define KVM_ADDRESS_SPACE_NUM 2 1245 1246 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1247 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1248 1249 /* 1250 * Hardware virtualization extension instructions may fault if a 1251 * reboot turns off virtualization while processes are running. 1252 * Trap the fault and ignore the instruction if that happens. 1253 */ 1254 asmlinkage void kvm_spurious_fault(void); 1255 1256 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1257 "666: " insn "\n\t" \ 1258 "668: \n\t" \ 1259 ".pushsection .fixup, \"ax\" \n" \ 1260 "667: \n\t" \ 1261 cleanup_insn "\n\t" \ 1262 "cmpb $0, kvm_rebooting \n\t" \ 1263 "jne 668b \n\t" \ 1264 __ASM_SIZE(push) " $666b \n\t" \ 1265 "call kvm_spurious_fault \n\t" \ 1266 ".popsection \n\t" \ 1267 _ASM_EXTABLE(666b, 667b) 1268 1269 #define __kvm_handle_fault_on_reboot(insn) \ 1270 ____kvm_handle_fault_on_reboot(insn, "") 1271 1272 #define KVM_ARCH_WANT_MMU_NOTIFIER 1273 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1274 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1275 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1276 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1277 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1278 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1279 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1280 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1281 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1282 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1283 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1284 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm, 1285 unsigned long address); 1286 1287 void kvm_define_shared_msr(unsigned index, u32 msr); 1288 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1289 1290 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1291 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1292 1293 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1294 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1295 1296 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1297 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1298 1299 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1300 struct kvm_async_pf *work); 1301 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1302 struct kvm_async_pf *work); 1303 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1304 struct kvm_async_pf *work); 1305 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1306 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1307 1308 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1309 1310 int kvm_is_in_guest(void); 1311 1312 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1313 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1314 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1315 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1316 1317 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1318 struct kvm_vcpu **dest_vcpu); 1319 1320 void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e, 1321 struct kvm_lapic_irq *irq); 1322 1323 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} 1324 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} 1325 1326 #endif /* _ASM_X86_KVM_HOST_H */ 1327