1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 #include <linux/irq.h> 21 22 #include <linux/kvm.h> 23 #include <linux/kvm_para.h> 24 #include <linux/kvm_types.h> 25 #include <linux/perf_event.h> 26 #include <linux/pvclock_gtod.h> 27 #include <linux/clocksource.h> 28 #include <linux/irqbypass.h> 29 #include <linux/hyperv.h> 30 31 #include <asm/apic.h> 32 #include <asm/pvclock-abi.h> 33 #include <asm/desc.h> 34 #include <asm/mtrr.h> 35 #include <asm/msr-index.h> 36 #include <asm/asm.h> 37 #include <asm/kvm_page_track.h> 38 #include <asm/hyperv-tlfs.h> 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 #define KVM_USER_MEM_SLOTS 509 44 /* memory slots that are not exposed to userspace */ 45 #define KVM_PRIVATE_MEM_SLOTS 3 46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 47 48 #define KVM_HALT_POLL_NS_DEFAULT 200000 49 50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 51 52 /* x86-specific vcpu->requests bit members */ 53 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 54 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 55 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 56 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 57 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 58 #define KVM_REQ_LOAD_CR3 KVM_ARCH_REQ(5) 59 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 60 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 61 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 62 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 63 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 64 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 65 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 66 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 67 #define KVM_REQ_MCLOCK_INPROGRESS \ 68 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 69 #define KVM_REQ_SCAN_IOAPIC \ 70 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 71 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 72 #define KVM_REQ_APIC_PAGE_RELOAD \ 73 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 74 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 75 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 76 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 77 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 78 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 79 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 80 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24) 81 82 #define CR0_RESERVED_BITS \ 83 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 84 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 85 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 86 87 #define CR4_RESERVED_BITS \ 88 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 89 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 90 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 91 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 92 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 93 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 94 95 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 96 97 98 99 #define INVALID_PAGE (~(hpa_t)0) 100 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 101 102 #define UNMAPPED_GVA (~(gpa_t)0) 103 104 /* KVM Hugepage definitions for x86 */ 105 enum { 106 PT_PAGE_TABLE_LEVEL = 1, 107 PT_DIRECTORY_LEVEL = 2, 108 PT_PDPE_LEVEL = 3, 109 /* set max level to the biggest one */ 110 PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL, 111 }; 112 #define KVM_NR_PAGE_SIZES (PT_MAX_HUGEPAGE_LEVEL - \ 113 PT_PAGE_TABLE_LEVEL + 1) 114 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 115 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 116 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 117 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 118 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 119 120 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 121 { 122 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 123 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 124 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 125 } 126 127 #define KVM_PERMILLE_MMU_PAGES 20 128 #define KVM_MIN_ALLOC_MMU_PAGES 64 129 #define KVM_MMU_HASH_SHIFT 12 130 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 131 #define KVM_MIN_FREE_MMU_PAGES 5 132 #define KVM_REFILL_PAGES 25 133 #define KVM_MAX_CPUID_ENTRIES 80 134 #define KVM_NR_FIXED_MTRR_REGION 88 135 #define KVM_NR_VAR_MTRR 8 136 137 #define ASYNC_PF_PER_VCPU 64 138 139 enum kvm_reg { 140 VCPU_REGS_RAX = 0, 141 VCPU_REGS_RCX = 1, 142 VCPU_REGS_RDX = 2, 143 VCPU_REGS_RBX = 3, 144 VCPU_REGS_RSP = 4, 145 VCPU_REGS_RBP = 5, 146 VCPU_REGS_RSI = 6, 147 VCPU_REGS_RDI = 7, 148 #ifdef CONFIG_X86_64 149 VCPU_REGS_R8 = 8, 150 VCPU_REGS_R9 = 9, 151 VCPU_REGS_R10 = 10, 152 VCPU_REGS_R11 = 11, 153 VCPU_REGS_R12 = 12, 154 VCPU_REGS_R13 = 13, 155 VCPU_REGS_R14 = 14, 156 VCPU_REGS_R15 = 15, 157 #endif 158 VCPU_REGS_RIP, 159 NR_VCPU_REGS 160 }; 161 162 enum kvm_reg_ex { 163 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 164 VCPU_EXREG_CR3, 165 VCPU_EXREG_RFLAGS, 166 VCPU_EXREG_SEGMENTS, 167 }; 168 169 enum { 170 VCPU_SREG_ES, 171 VCPU_SREG_CS, 172 VCPU_SREG_SS, 173 VCPU_SREG_DS, 174 VCPU_SREG_FS, 175 VCPU_SREG_GS, 176 VCPU_SREG_TR, 177 VCPU_SREG_LDTR, 178 }; 179 180 #include <asm/kvm_emulate.h> 181 182 #define KVM_NR_MEM_OBJS 40 183 184 #define KVM_NR_DB_REGS 4 185 186 #define DR6_BD (1 << 13) 187 #define DR6_BS (1 << 14) 188 #define DR6_BT (1 << 15) 189 #define DR6_RTM (1 << 16) 190 #define DR6_FIXED_1 0xfffe0ff0 191 #define DR6_INIT 0xffff0ff0 192 #define DR6_VOLATILE 0x0001e00f 193 194 #define DR7_BP_EN_MASK 0x000000ff 195 #define DR7_GE (1 << 9) 196 #define DR7_GD (1 << 13) 197 #define DR7_FIXED_1 0x00000400 198 #define DR7_VOLATILE 0xffff2bff 199 200 #define PFERR_PRESENT_BIT 0 201 #define PFERR_WRITE_BIT 1 202 #define PFERR_USER_BIT 2 203 #define PFERR_RSVD_BIT 3 204 #define PFERR_FETCH_BIT 4 205 #define PFERR_PK_BIT 5 206 #define PFERR_GUEST_FINAL_BIT 32 207 #define PFERR_GUEST_PAGE_BIT 33 208 209 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 210 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 211 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 212 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 213 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 214 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 215 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 216 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 217 218 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 219 PFERR_WRITE_MASK | \ 220 PFERR_PRESENT_MASK) 221 222 /* 223 * The mask used to denote special SPTEs, which can be either MMIO SPTEs or 224 * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting 225 * with the SVE bit in EPT PTEs. 226 */ 227 #define SPTE_SPECIAL_MASK (1ULL << 62) 228 229 /* apic attention bits */ 230 #define KVM_APIC_CHECK_VAPIC 0 231 /* 232 * The following bit is set with PV-EOI, unset on EOI. 233 * We detect PV-EOI changes by guest by comparing 234 * this bit with PV-EOI in guest memory. 235 * See the implementation in apic_update_pv_eoi. 236 */ 237 #define KVM_APIC_PV_EOI_PENDING 1 238 239 struct kvm_kernel_irq_routing_entry; 240 241 /* 242 * We don't want allocation failures within the mmu code, so we preallocate 243 * enough memory for a single page fault in a cache. 244 */ 245 struct kvm_mmu_memory_cache { 246 int nobjs; 247 void *objects[KVM_NR_MEM_OBJS]; 248 }; 249 250 /* 251 * the pages used as guest page table on soft mmu are tracked by 252 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 253 * by indirect shadow page can not be more than 15 bits. 254 * 255 * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access, 256 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 257 */ 258 union kvm_mmu_page_role { 259 u32 word; 260 struct { 261 unsigned level:4; 262 unsigned cr4_pae:1; 263 unsigned quadrant:2; 264 unsigned direct:1; 265 unsigned access:3; 266 unsigned invalid:1; 267 unsigned nxe:1; 268 unsigned cr0_wp:1; 269 unsigned smep_andnot_wp:1; 270 unsigned smap_andnot_wp:1; 271 unsigned ad_disabled:1; 272 unsigned guest_mode:1; 273 unsigned :6; 274 275 /* 276 * This is left at the top of the word so that 277 * kvm_memslots_for_spte_role can extract it with a 278 * simple shift. While there is room, give it a whole 279 * byte so it is also faster to load it from memory. 280 */ 281 unsigned smm:8; 282 }; 283 }; 284 285 union kvm_mmu_extended_role { 286 /* 287 * This structure complements kvm_mmu_page_role caching everything needed for 288 * MMU configuration. If nothing in both these structures changed, MMU 289 * re-configuration can be skipped. @valid bit is set on first usage so we don't 290 * treat all-zero structure as valid data. 291 */ 292 u32 word; 293 struct { 294 unsigned int valid:1; 295 unsigned int execonly:1; 296 unsigned int cr0_pg:1; 297 unsigned int cr4_pse:1; 298 unsigned int cr4_pke:1; 299 unsigned int cr4_smap:1; 300 unsigned int cr4_smep:1; 301 unsigned int cr4_la57:1; 302 }; 303 }; 304 305 union kvm_mmu_role { 306 u64 as_u64; 307 struct { 308 union kvm_mmu_page_role base; 309 union kvm_mmu_extended_role ext; 310 }; 311 }; 312 313 struct kvm_rmap_head { 314 unsigned long val; 315 }; 316 317 struct kvm_mmu_page { 318 struct list_head link; 319 struct hlist_node hash_link; 320 bool unsync; 321 322 /* 323 * The following two entries are used to key the shadow page in the 324 * hash table. 325 */ 326 union kvm_mmu_page_role role; 327 gfn_t gfn; 328 329 u64 *spt; 330 /* hold the gfn of each spte inside spt */ 331 gfn_t *gfns; 332 int root_count; /* Currently serving as active root */ 333 unsigned int unsync_children; 334 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 335 336 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 337 unsigned long mmu_valid_gen; 338 339 DECLARE_BITMAP(unsync_child_bitmap, 512); 340 341 #ifdef CONFIG_X86_32 342 /* 343 * Used out of the mmu-lock to avoid reading spte values while an 344 * update is in progress; see the comments in __get_spte_lockless(). 345 */ 346 int clear_spte_count; 347 #endif 348 349 /* Number of writes since the last time traversal visited this page. */ 350 atomic_t write_flooding_count; 351 }; 352 353 struct kvm_pio_request { 354 unsigned long count; 355 int in; 356 int port; 357 int size; 358 }; 359 360 #define PT64_ROOT_MAX_LEVEL 5 361 362 struct rsvd_bits_validate { 363 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 364 u64 bad_mt_xwr; 365 }; 366 367 struct kvm_mmu_root_info { 368 gpa_t cr3; 369 hpa_t hpa; 370 }; 371 372 #define KVM_MMU_ROOT_INFO_INVALID \ 373 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE }) 374 375 #define KVM_MMU_NUM_PREV_ROOTS 3 376 377 /* 378 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 379 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 380 * current mmu mode. 381 */ 382 struct kvm_mmu { 383 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 384 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 385 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 386 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 387 bool prefault); 388 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 389 struct x86_exception *fault); 390 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 391 struct x86_exception *exception); 392 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 393 struct x86_exception *exception); 394 int (*sync_page)(struct kvm_vcpu *vcpu, 395 struct kvm_mmu_page *sp); 396 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 397 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 398 u64 *spte, const void *pte); 399 hpa_t root_hpa; 400 union kvm_mmu_role mmu_role; 401 u8 root_level; 402 u8 shadow_root_level; 403 u8 ept_ad; 404 bool direct_map; 405 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 406 407 /* 408 * Bitmap; bit set = permission fault 409 * Byte index: page fault error code [4:1] 410 * Bit index: pte permissions in ACC_* format 411 */ 412 u8 permissions[16]; 413 414 /* 415 * The pkru_mask indicates if protection key checks are needed. It 416 * consists of 16 domains indexed by page fault error code bits [4:1], 417 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 418 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 419 */ 420 u32 pkru_mask; 421 422 u64 *pae_root; 423 u64 *lm_root; 424 425 /* 426 * check zero bits on shadow page table entries, these 427 * bits include not only hardware reserved bits but also 428 * the bits spte never used. 429 */ 430 struct rsvd_bits_validate shadow_zero_check; 431 432 struct rsvd_bits_validate guest_rsvd_check; 433 434 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 435 u8 last_nonleaf_level; 436 437 bool nx; 438 439 u64 pdptrs[4]; /* pae */ 440 }; 441 442 enum pmc_type { 443 KVM_PMC_GP = 0, 444 KVM_PMC_FIXED, 445 }; 446 447 struct kvm_pmc { 448 enum pmc_type type; 449 u8 idx; 450 u64 counter; 451 u64 eventsel; 452 struct perf_event *perf_event; 453 struct kvm_vcpu *vcpu; 454 }; 455 456 struct kvm_pmu { 457 unsigned nr_arch_gp_counters; 458 unsigned nr_arch_fixed_counters; 459 unsigned available_event_types; 460 u64 fixed_ctr_ctrl; 461 u64 global_ctrl; 462 u64 global_status; 463 u64 global_ovf_ctrl; 464 u64 counter_bitmask[2]; 465 u64 global_ctrl_mask; 466 u64 reserved_bits; 467 u8 version; 468 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 469 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 470 struct irq_work irq_work; 471 u64 reprogram_pmi; 472 }; 473 474 struct kvm_pmu_ops; 475 476 enum { 477 KVM_DEBUGREG_BP_ENABLED = 1, 478 KVM_DEBUGREG_WONT_EXIT = 2, 479 KVM_DEBUGREG_RELOAD = 4, 480 }; 481 482 struct kvm_mtrr_range { 483 u64 base; 484 u64 mask; 485 struct list_head node; 486 }; 487 488 struct kvm_mtrr { 489 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 490 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 491 u64 deftype; 492 493 struct list_head head; 494 }; 495 496 /* Hyper-V SynIC timer */ 497 struct kvm_vcpu_hv_stimer { 498 struct hrtimer timer; 499 int index; 500 u64 config; 501 u64 count; 502 u64 exp_time; 503 struct hv_message msg; 504 bool msg_pending; 505 }; 506 507 /* Hyper-V synthetic interrupt controller (SynIC)*/ 508 struct kvm_vcpu_hv_synic { 509 u64 version; 510 u64 control; 511 u64 msg_page; 512 u64 evt_page; 513 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 514 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 515 DECLARE_BITMAP(auto_eoi_bitmap, 256); 516 DECLARE_BITMAP(vec_bitmap, 256); 517 bool active; 518 bool dont_zero_synic_pages; 519 }; 520 521 /* Hyper-V per vcpu emulation context */ 522 struct kvm_vcpu_hv { 523 u32 vp_index; 524 u64 hv_vapic; 525 s64 runtime_offset; 526 struct kvm_vcpu_hv_synic synic; 527 struct kvm_hyperv_exit exit; 528 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 529 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 530 cpumask_t tlb_flush; 531 }; 532 533 struct kvm_vcpu_arch { 534 /* 535 * rip and regs accesses must go through 536 * kvm_{register,rip}_{read,write} functions. 537 */ 538 unsigned long regs[NR_VCPU_REGS]; 539 u32 regs_avail; 540 u32 regs_dirty; 541 542 unsigned long cr0; 543 unsigned long cr0_guest_owned_bits; 544 unsigned long cr2; 545 unsigned long cr3; 546 unsigned long cr4; 547 unsigned long cr4_guest_owned_bits; 548 unsigned long cr8; 549 u32 pkru; 550 u32 hflags; 551 u64 efer; 552 u64 apic_base; 553 struct kvm_lapic *apic; /* kernel irqchip context */ 554 bool apicv_active; 555 bool load_eoi_exitmap_pending; 556 DECLARE_BITMAP(ioapic_handled_vectors, 256); 557 unsigned long apic_attention; 558 int32_t apic_arb_prio; 559 int mp_state; 560 u64 ia32_misc_enable_msr; 561 u64 smbase; 562 u64 smi_count; 563 bool tpr_access_reporting; 564 u64 ia32_xss; 565 u64 microcode_version; 566 567 /* 568 * Paging state of the vcpu 569 * 570 * If the vcpu runs in guest mode with two level paging this still saves 571 * the paging mode of the l1 guest. This context is always used to 572 * handle faults. 573 */ 574 struct kvm_mmu *mmu; 575 576 /* Non-nested MMU for L1 */ 577 struct kvm_mmu root_mmu; 578 579 /* L1 MMU when running nested */ 580 struct kvm_mmu guest_mmu; 581 582 /* 583 * Paging state of an L2 guest (used for nested npt) 584 * 585 * This context will save all necessary information to walk page tables 586 * of the an L2 guest. This context is only initialized for page table 587 * walking and not for faulting since we never handle l2 page faults on 588 * the host. 589 */ 590 struct kvm_mmu nested_mmu; 591 592 /* 593 * Pointer to the mmu context currently used for 594 * gva_to_gpa translations. 595 */ 596 struct kvm_mmu *walk_mmu; 597 598 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 599 struct kvm_mmu_memory_cache mmu_page_cache; 600 struct kvm_mmu_memory_cache mmu_page_header_cache; 601 602 /* 603 * QEMU userspace and the guest each have their own FPU state. 604 * In vcpu_run, we switch between the user and guest FPU contexts. 605 * While running a VCPU, the VCPU thread will have the guest FPU 606 * context. 607 * 608 * Note that while the PKRU state lives inside the fpu registers, 609 * it is switched out separately at VMENTER and VMEXIT time. The 610 * "guest_fpu" state here contains the guest FPU context, with the 611 * host PRKU bits. 612 */ 613 struct fpu user_fpu; 614 struct fpu guest_fpu; 615 616 u64 xcr0; 617 u64 guest_supported_xcr0; 618 u32 guest_xstate_size; 619 620 struct kvm_pio_request pio; 621 void *pio_data; 622 623 u8 event_exit_inst_len; 624 625 struct kvm_queued_exception { 626 bool pending; 627 bool injected; 628 bool has_error_code; 629 u8 nr; 630 u32 error_code; 631 unsigned long payload; 632 bool has_payload; 633 u8 nested_apf; 634 } exception; 635 636 struct kvm_queued_interrupt { 637 bool injected; 638 bool soft; 639 u8 nr; 640 } interrupt; 641 642 int halt_request; /* real mode on Intel only */ 643 644 int cpuid_nent; 645 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 646 647 int maxphyaddr; 648 649 /* emulate context */ 650 651 struct x86_emulate_ctxt emulate_ctxt; 652 bool emulate_regs_need_sync_to_vcpu; 653 bool emulate_regs_need_sync_from_vcpu; 654 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 655 656 gpa_t time; 657 struct pvclock_vcpu_time_info hv_clock; 658 unsigned int hw_tsc_khz; 659 struct gfn_to_hva_cache pv_time; 660 bool pv_time_enabled; 661 /* set guest stopped flag in pvclock flags field */ 662 bool pvclock_set_guest_stopped_request; 663 664 struct { 665 u64 msr_val; 666 u64 last_steal; 667 struct gfn_to_hva_cache stime; 668 struct kvm_steal_time steal; 669 } st; 670 671 u64 tsc_offset; 672 u64 last_guest_tsc; 673 u64 last_host_tsc; 674 u64 tsc_offset_adjustment; 675 u64 this_tsc_nsec; 676 u64 this_tsc_write; 677 u64 this_tsc_generation; 678 bool tsc_catchup; 679 bool tsc_always_catchup; 680 s8 virtual_tsc_shift; 681 u32 virtual_tsc_mult; 682 u32 virtual_tsc_khz; 683 s64 ia32_tsc_adjust_msr; 684 u64 tsc_scaling_ratio; 685 686 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 687 unsigned nmi_pending; /* NMI queued after currently running handler */ 688 bool nmi_injected; /* Trying to inject an NMI this entry */ 689 bool smi_pending; /* SMI queued after currently running handler */ 690 691 struct kvm_mtrr mtrr_state; 692 u64 pat; 693 694 unsigned switch_db_regs; 695 unsigned long db[KVM_NR_DB_REGS]; 696 unsigned long dr6; 697 unsigned long dr7; 698 unsigned long eff_db[KVM_NR_DB_REGS]; 699 unsigned long guest_debug_dr7; 700 u64 msr_platform_info; 701 u64 msr_misc_features_enables; 702 703 u64 mcg_cap; 704 u64 mcg_status; 705 u64 mcg_ctl; 706 u64 mcg_ext_ctl; 707 u64 *mce_banks; 708 709 /* Cache MMIO info */ 710 u64 mmio_gva; 711 unsigned access; 712 gfn_t mmio_gfn; 713 u64 mmio_gen; 714 715 struct kvm_pmu pmu; 716 717 /* used for guest single stepping over the given code position */ 718 unsigned long singlestep_rip; 719 720 struct kvm_vcpu_hv hyperv; 721 722 cpumask_var_t wbinvd_dirty_mask; 723 724 unsigned long last_retry_eip; 725 unsigned long last_retry_addr; 726 727 struct { 728 bool halted; 729 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 730 struct gfn_to_hva_cache data; 731 u64 msr_val; 732 u32 id; 733 bool send_user_only; 734 u32 host_apf_reason; 735 unsigned long nested_apf_token; 736 bool delivery_as_pf_vmexit; 737 } apf; 738 739 /* OSVW MSRs (AMD only) */ 740 struct { 741 u64 length; 742 u64 status; 743 } osvw; 744 745 struct { 746 u64 msr_val; 747 struct gfn_to_hva_cache data; 748 } pv_eoi; 749 750 /* 751 * Indicate whether the access faults on its page table in guest 752 * which is set when fix page fault and used to detect unhandeable 753 * instruction. 754 */ 755 bool write_fault_to_shadow_pgtable; 756 757 /* set at EPT violation at this point */ 758 unsigned long exit_qualification; 759 760 /* pv related host specific info */ 761 struct { 762 bool pv_unhalted; 763 } pv; 764 765 int pending_ioapic_eoi; 766 int pending_external_vector; 767 768 /* GPA available */ 769 bool gpa_available; 770 gpa_t gpa_val; 771 772 /* be preempted when it's in kernel-mode(cpl=0) */ 773 bool preempted_in_kernel; 774 775 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 776 bool l1tf_flush_l1d; 777 }; 778 779 struct kvm_lpage_info { 780 int disallow_lpage; 781 }; 782 783 struct kvm_arch_memory_slot { 784 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 785 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 786 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 787 }; 788 789 /* 790 * We use as the mode the number of bits allocated in the LDR for the 791 * logical processor ID. It happens that these are all powers of two. 792 * This makes it is very easy to detect cases where the APICs are 793 * configured for multiple modes; in that case, we cannot use the map and 794 * hence cannot use kvm_irq_delivery_to_apic_fast either. 795 */ 796 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 797 #define KVM_APIC_MODE_XAPIC_FLAT 8 798 #define KVM_APIC_MODE_X2APIC 16 799 800 struct kvm_apic_map { 801 struct rcu_head rcu; 802 u8 mode; 803 u32 max_apic_id; 804 union { 805 struct kvm_lapic *xapic_flat_map[8]; 806 struct kvm_lapic *xapic_cluster_map[16][4]; 807 }; 808 struct kvm_lapic *phys_map[]; 809 }; 810 811 /* Hyper-V emulation context */ 812 struct kvm_hv { 813 struct mutex hv_lock; 814 u64 hv_guest_os_id; 815 u64 hv_hypercall; 816 u64 hv_tsc_page; 817 818 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 819 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 820 u64 hv_crash_ctl; 821 822 HV_REFERENCE_TSC_PAGE tsc_ref; 823 824 struct idr conn_to_evt; 825 826 u64 hv_reenlightenment_control; 827 u64 hv_tsc_emulation_control; 828 u64 hv_tsc_emulation_status; 829 830 /* How many vCPUs have VP index != vCPU index */ 831 atomic_t num_mismatched_vp_indexes; 832 }; 833 834 enum kvm_irqchip_mode { 835 KVM_IRQCHIP_NONE, 836 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 837 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 838 }; 839 840 struct kvm_arch { 841 unsigned int n_used_mmu_pages; 842 unsigned int n_requested_mmu_pages; 843 unsigned int n_max_mmu_pages; 844 unsigned int indirect_shadow_pages; 845 unsigned long mmu_valid_gen; 846 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 847 /* 848 * Hash table of struct kvm_mmu_page. 849 */ 850 struct list_head active_mmu_pages; 851 struct list_head zapped_obsolete_pages; 852 struct kvm_page_track_notifier_node mmu_sp_tracker; 853 struct kvm_page_track_notifier_head track_notifier_head; 854 855 struct list_head assigned_dev_head; 856 struct iommu_domain *iommu_domain; 857 bool iommu_noncoherent; 858 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 859 atomic_t noncoherent_dma_count; 860 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 861 atomic_t assigned_device_count; 862 struct kvm_pic *vpic; 863 struct kvm_ioapic *vioapic; 864 struct kvm_pit *vpit; 865 atomic_t vapics_in_nmi_mode; 866 struct mutex apic_map_lock; 867 struct kvm_apic_map *apic_map; 868 869 bool apic_access_page_done; 870 871 gpa_t wall_clock; 872 873 bool mwait_in_guest; 874 bool hlt_in_guest; 875 bool pause_in_guest; 876 877 unsigned long irq_sources_bitmap; 878 s64 kvmclock_offset; 879 raw_spinlock_t tsc_write_lock; 880 u64 last_tsc_nsec; 881 u64 last_tsc_write; 882 u32 last_tsc_khz; 883 u64 cur_tsc_nsec; 884 u64 cur_tsc_write; 885 u64 cur_tsc_offset; 886 u64 cur_tsc_generation; 887 int nr_vcpus_matched_tsc; 888 889 spinlock_t pvclock_gtod_sync_lock; 890 bool use_master_clock; 891 u64 master_kernel_ns; 892 u64 master_cycle_now; 893 struct delayed_work kvmclock_update_work; 894 struct delayed_work kvmclock_sync_work; 895 896 struct kvm_xen_hvm_config xen_hvm_config; 897 898 /* reads protected by irq_srcu, writes by irq_lock */ 899 struct hlist_head mask_notifier_list; 900 901 struct kvm_hv hyperv; 902 903 #ifdef CONFIG_KVM_MMU_AUDIT 904 int audit_point; 905 #endif 906 907 bool backwards_tsc_observed; 908 bool boot_vcpu_runs_old_kvmclock; 909 u32 bsp_vcpu_id; 910 911 u64 disabled_quirks; 912 913 enum kvm_irqchip_mode irqchip_mode; 914 u8 nr_reserved_ioapic_pins; 915 916 bool disabled_lapic_found; 917 918 bool x2apic_format; 919 bool x2apic_broadcast_quirk_disabled; 920 921 bool guest_can_read_msr_platform_info; 922 bool exception_payload_enabled; 923 }; 924 925 struct kvm_vm_stat { 926 ulong mmu_shadow_zapped; 927 ulong mmu_pte_write; 928 ulong mmu_pte_updated; 929 ulong mmu_pde_zapped; 930 ulong mmu_flooded; 931 ulong mmu_recycled; 932 ulong mmu_cache_miss; 933 ulong mmu_unsync; 934 ulong remote_tlb_flush; 935 ulong lpages; 936 ulong max_mmu_page_hash_collisions; 937 }; 938 939 struct kvm_vcpu_stat { 940 u64 pf_fixed; 941 u64 pf_guest; 942 u64 tlb_flush; 943 u64 invlpg; 944 945 u64 exits; 946 u64 io_exits; 947 u64 mmio_exits; 948 u64 signal_exits; 949 u64 irq_window_exits; 950 u64 nmi_window_exits; 951 u64 l1d_flush; 952 u64 halt_exits; 953 u64 halt_successful_poll; 954 u64 halt_attempted_poll; 955 u64 halt_poll_invalid; 956 u64 halt_wakeup; 957 u64 request_irq_exits; 958 u64 irq_exits; 959 u64 host_state_reload; 960 u64 fpu_reload; 961 u64 insn_emulation; 962 u64 insn_emulation_fail; 963 u64 hypercalls; 964 u64 irq_injections; 965 u64 nmi_injections; 966 u64 req_event; 967 }; 968 969 struct x86_instruction_info; 970 971 struct msr_data { 972 bool host_initiated; 973 u32 index; 974 u64 data; 975 }; 976 977 struct kvm_lapic_irq { 978 u32 vector; 979 u16 delivery_mode; 980 u16 dest_mode; 981 bool level; 982 u16 trig_mode; 983 u32 shorthand; 984 u32 dest_id; 985 bool msi_redir_hint; 986 }; 987 988 struct kvm_x86_ops { 989 int (*cpu_has_kvm_support)(void); /* __init */ 990 int (*disabled_by_bios)(void); /* __init */ 991 int (*hardware_enable)(void); 992 void (*hardware_disable)(void); 993 void (*check_processor_compatibility)(void *rtn); 994 int (*hardware_setup)(void); /* __init */ 995 void (*hardware_unsetup)(void); /* __exit */ 996 bool (*cpu_has_accelerated_tpr)(void); 997 bool (*has_emulated_msr)(int index); 998 void (*cpuid_update)(struct kvm_vcpu *vcpu); 999 1000 struct kvm *(*vm_alloc)(void); 1001 void (*vm_free)(struct kvm *); 1002 int (*vm_init)(struct kvm *kvm); 1003 void (*vm_destroy)(struct kvm *kvm); 1004 1005 /* Create, but do not attach this VCPU */ 1006 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 1007 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1008 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1009 1010 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1011 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1012 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1013 1014 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 1015 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1016 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1017 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1018 void (*get_segment)(struct kvm_vcpu *vcpu, 1019 struct kvm_segment *var, int seg); 1020 int (*get_cpl)(struct kvm_vcpu *vcpu); 1021 void (*set_segment)(struct kvm_vcpu *vcpu, 1022 struct kvm_segment *var, int seg); 1023 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1024 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 1025 void (*decache_cr3)(struct kvm_vcpu *vcpu); 1026 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 1027 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1028 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1029 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1030 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1031 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1032 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1033 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1034 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1035 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 1036 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 1037 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1038 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1039 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1040 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1041 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1042 1043 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa); 1044 int (*tlb_remote_flush)(struct kvm *kvm); 1045 1046 /* 1047 * Flush any TLB entries associated with the given GVA. 1048 * Does not need to flush GPA->HPA mappings. 1049 * Can potentially get non-canonical addresses through INVLPGs, which 1050 * the implementation may choose to ignore if appropriate. 1051 */ 1052 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1053 1054 void (*run)(struct kvm_vcpu *vcpu); 1055 int (*handle_exit)(struct kvm_vcpu *vcpu); 1056 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1057 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1058 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1059 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1060 unsigned char *hypercall_addr); 1061 void (*set_irq)(struct kvm_vcpu *vcpu); 1062 void (*set_nmi)(struct kvm_vcpu *vcpu); 1063 void (*queue_exception)(struct kvm_vcpu *vcpu); 1064 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1065 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 1066 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 1067 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1068 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1069 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1070 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1071 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1072 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu); 1073 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1074 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1075 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1076 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1077 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1078 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1079 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 1080 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1081 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1082 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1083 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1084 int (*get_tdp_level)(struct kvm_vcpu *vcpu); 1085 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1086 int (*get_lpage_level)(void); 1087 bool (*rdtscp_supported)(void); 1088 bool (*invpcid_supported)(void); 1089 1090 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1091 1092 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 1093 1094 bool (*has_wbinvd_exit)(void); 1095 1096 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu); 1097 /* Returns actual tsc_offset set in active VMCS */ 1098 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1099 1100 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 1101 1102 int (*check_intercept)(struct kvm_vcpu *vcpu, 1103 struct x86_instruction_info *info, 1104 enum x86_intercept_stage stage); 1105 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 1106 bool (*mpx_supported)(void); 1107 bool (*xsaves_supported)(void); 1108 bool (*umip_emulated)(void); 1109 1110 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 1111 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1112 1113 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1114 1115 /* 1116 * Arch-specific dirty logging hooks. These hooks are only supposed to 1117 * be valid if the specific arch has hardware-accelerated dirty logging 1118 * mechanism. Currently only for PML on VMX. 1119 * 1120 * - slot_enable_log_dirty: 1121 * called when enabling log dirty mode for the slot. 1122 * - slot_disable_log_dirty: 1123 * called when disabling log dirty mode for the slot. 1124 * also called when slot is created with log dirty disabled. 1125 * - flush_log_dirty: 1126 * called before reporting dirty_bitmap to userspace. 1127 * - enable_log_dirty_pt_masked: 1128 * called when reenabling log dirty for the GFNs in the mask after 1129 * corresponding bits are cleared in slot->dirty_bitmap. 1130 */ 1131 void (*slot_enable_log_dirty)(struct kvm *kvm, 1132 struct kvm_memory_slot *slot); 1133 void (*slot_disable_log_dirty)(struct kvm *kvm, 1134 struct kvm_memory_slot *slot); 1135 void (*flush_log_dirty)(struct kvm *kvm); 1136 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1137 struct kvm_memory_slot *slot, 1138 gfn_t offset, unsigned long mask); 1139 int (*write_log_dirty)(struct kvm_vcpu *vcpu); 1140 1141 /* pmu operations of sub-arch */ 1142 const struct kvm_pmu_ops *pmu_ops; 1143 1144 /* 1145 * Architecture specific hooks for vCPU blocking due to 1146 * HLT instruction. 1147 * Returns for .pre_block(): 1148 * - 0 means continue to block the vCPU. 1149 * - 1 means we cannot block the vCPU since some event 1150 * happens during this period, such as, 'ON' bit in 1151 * posted-interrupts descriptor is set. 1152 */ 1153 int (*pre_block)(struct kvm_vcpu *vcpu); 1154 void (*post_block)(struct kvm_vcpu *vcpu); 1155 1156 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1157 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1158 1159 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1160 uint32_t guest_irq, bool set); 1161 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1162 1163 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc); 1164 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1165 1166 void (*setup_mce)(struct kvm_vcpu *vcpu); 1167 1168 int (*get_nested_state)(struct kvm_vcpu *vcpu, 1169 struct kvm_nested_state __user *user_kvm_nested_state, 1170 unsigned user_data_size); 1171 int (*set_nested_state)(struct kvm_vcpu *vcpu, 1172 struct kvm_nested_state __user *user_kvm_nested_state, 1173 struct kvm_nested_state *kvm_state); 1174 void (*get_vmcs12_pages)(struct kvm_vcpu *vcpu); 1175 1176 int (*smi_allowed)(struct kvm_vcpu *vcpu); 1177 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1178 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, u64 smbase); 1179 int (*enable_smi_window)(struct kvm_vcpu *vcpu); 1180 1181 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1182 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1183 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1184 1185 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1186 1187 int (*nested_enable_evmcs)(struct kvm_vcpu *vcpu, 1188 uint16_t *vmcs_version); 1189 }; 1190 1191 struct kvm_arch_async_pf { 1192 u32 token; 1193 gfn_t gfn; 1194 unsigned long cr3; 1195 bool direct_map; 1196 }; 1197 1198 extern struct kvm_x86_ops *kvm_x86_ops; 1199 1200 #define __KVM_HAVE_ARCH_VM_ALLOC 1201 static inline struct kvm *kvm_arch_alloc_vm(void) 1202 { 1203 return kvm_x86_ops->vm_alloc(); 1204 } 1205 1206 static inline void kvm_arch_free_vm(struct kvm *kvm) 1207 { 1208 return kvm_x86_ops->vm_free(kvm); 1209 } 1210 1211 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1212 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1213 { 1214 if (kvm_x86_ops->tlb_remote_flush && 1215 !kvm_x86_ops->tlb_remote_flush(kvm)) 1216 return 0; 1217 else 1218 return -ENOTSUPP; 1219 } 1220 1221 int kvm_mmu_module_init(void); 1222 void kvm_mmu_module_exit(void); 1223 1224 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1225 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1226 void kvm_mmu_init_vm(struct kvm *kvm); 1227 void kvm_mmu_uninit_vm(struct kvm *kvm); 1228 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1229 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1230 u64 acc_track_mask, u64 me_mask); 1231 1232 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1233 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1234 struct kvm_memory_slot *memslot); 1235 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1236 const struct kvm_memory_slot *memslot); 1237 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1238 struct kvm_memory_slot *memslot); 1239 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1240 struct kvm_memory_slot *memslot); 1241 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1242 struct kvm_memory_slot *memslot); 1243 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1244 struct kvm_memory_slot *slot, 1245 gfn_t gfn_offset, unsigned long mask); 1246 void kvm_mmu_zap_all(struct kvm *kvm); 1247 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots); 1248 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 1249 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 1250 1251 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1252 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1253 1254 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1255 const void *val, int bytes); 1256 1257 struct kvm_irq_mask_notifier { 1258 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1259 int irq; 1260 struct hlist_node link; 1261 }; 1262 1263 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1264 struct kvm_irq_mask_notifier *kimn); 1265 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1266 struct kvm_irq_mask_notifier *kimn); 1267 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1268 bool mask); 1269 1270 extern bool tdp_enabled; 1271 1272 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1273 1274 /* control of guest tsc rate supported? */ 1275 extern bool kvm_has_tsc_control; 1276 /* maximum supported tsc_khz for guests */ 1277 extern u32 kvm_max_guest_tsc_khz; 1278 /* number of bits of the fractional part of the TSC scaling ratio */ 1279 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1280 /* maximum allowed value of TSC scaling ratio */ 1281 extern u64 kvm_max_tsc_scaling_ratio; 1282 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1283 extern u64 kvm_default_tsc_scaling_ratio; 1284 1285 extern u64 kvm_mce_cap_supported; 1286 1287 enum emulation_result { 1288 EMULATE_DONE, /* no further processing */ 1289 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 1290 EMULATE_FAIL, /* can't emulate this instruction */ 1291 }; 1292 1293 #define EMULTYPE_NO_DECODE (1 << 0) 1294 #define EMULTYPE_TRAP_UD (1 << 1) 1295 #define EMULTYPE_SKIP (1 << 2) 1296 #define EMULTYPE_ALLOW_RETRY (1 << 3) 1297 #define EMULTYPE_NO_UD_ON_FAIL (1 << 4) 1298 #define EMULTYPE_VMWARE (1 << 5) 1299 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1300 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1301 void *insn, int insn_len); 1302 1303 void kvm_enable_efer_bits(u64); 1304 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1305 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1306 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1307 1308 struct x86_emulate_ctxt; 1309 1310 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1311 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1312 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1313 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1314 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1315 1316 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1317 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1318 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1319 1320 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1321 int reason, bool has_error_code, u32 error_code); 1322 1323 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1324 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1325 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1326 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1327 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1328 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1329 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1330 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1331 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1332 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1333 1334 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1335 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1336 1337 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1338 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1339 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1340 1341 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1342 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1343 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1344 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1345 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1346 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1347 gfn_t gfn, void *data, int offset, int len, 1348 u32 access); 1349 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1350 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1351 1352 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1353 int irq_source_id, int level) 1354 { 1355 /* Logical OR for level trig interrupt */ 1356 if (level) 1357 __set_bit(irq_source_id, irq_state); 1358 else 1359 __clear_bit(irq_source_id, irq_state); 1360 1361 return !!(*irq_state); 1362 } 1363 1364 #define KVM_MMU_ROOT_CURRENT BIT(0) 1365 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1366 #define KVM_MMU_ROOTS_ALL (~0UL) 1367 1368 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1369 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1370 1371 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1372 1373 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1374 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1375 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1376 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1377 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1378 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1379 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1380 ulong roots_to_free); 1381 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1382 struct x86_exception *exception); 1383 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1384 struct x86_exception *exception); 1385 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1386 struct x86_exception *exception); 1387 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1388 struct x86_exception *exception); 1389 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1390 struct x86_exception *exception); 1391 1392 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu); 1393 1394 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1395 1396 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code, 1397 void *insn, int insn_len); 1398 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1399 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1400 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush); 1401 1402 void kvm_enable_tdp(void); 1403 void kvm_disable_tdp(void); 1404 1405 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1406 struct x86_exception *exception) 1407 { 1408 return gpa; 1409 } 1410 1411 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1412 { 1413 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1414 1415 return (struct kvm_mmu_page *)page_private(page); 1416 } 1417 1418 static inline u16 kvm_read_ldt(void) 1419 { 1420 u16 ldt; 1421 asm("sldt %0" : "=g"(ldt)); 1422 return ldt; 1423 } 1424 1425 static inline void kvm_load_ldt(u16 sel) 1426 { 1427 asm("lldt %0" : : "rm"(sel)); 1428 } 1429 1430 #ifdef CONFIG_X86_64 1431 static inline unsigned long read_msr(unsigned long msr) 1432 { 1433 u64 value; 1434 1435 rdmsrl(msr, value); 1436 return value; 1437 } 1438 #endif 1439 1440 static inline u32 get_rdx_init_val(void) 1441 { 1442 return 0x600; /* P6 family */ 1443 } 1444 1445 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1446 { 1447 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1448 } 1449 1450 #define TSS_IOPB_BASE_OFFSET 0x66 1451 #define TSS_BASE_SIZE 0x68 1452 #define TSS_IOPB_SIZE (65536 / 8) 1453 #define TSS_REDIRECTION_SIZE (256 / 8) 1454 #define RMODE_TSS_SIZE \ 1455 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1456 1457 enum { 1458 TASK_SWITCH_CALL = 0, 1459 TASK_SWITCH_IRET = 1, 1460 TASK_SWITCH_JMP = 2, 1461 TASK_SWITCH_GATE = 3, 1462 }; 1463 1464 #define HF_GIF_MASK (1 << 0) 1465 #define HF_HIF_MASK (1 << 1) 1466 #define HF_VINTR_MASK (1 << 2) 1467 #define HF_NMI_MASK (1 << 3) 1468 #define HF_IRET_MASK (1 << 4) 1469 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1470 #define HF_SMM_MASK (1 << 6) 1471 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1472 1473 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1474 #define KVM_ADDRESS_SPACE_NUM 2 1475 1476 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1477 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1478 1479 /* 1480 * Hardware virtualization extension instructions may fault if a 1481 * reboot turns off virtualization while processes are running. 1482 * Trap the fault and ignore the instruction if that happens. 1483 */ 1484 asmlinkage void kvm_spurious_fault(void); 1485 1486 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1487 "666: " insn "\n\t" \ 1488 "668: \n\t" \ 1489 ".pushsection .fixup, \"ax\" \n" \ 1490 "667: \n\t" \ 1491 cleanup_insn "\n\t" \ 1492 "cmpb $0, kvm_rebooting \n\t" \ 1493 "jne 668b \n\t" \ 1494 __ASM_SIZE(push) " $666b \n\t" \ 1495 "call kvm_spurious_fault \n\t" \ 1496 ".popsection \n\t" \ 1497 _ASM_EXTABLE(666b, 667b) 1498 1499 #define __kvm_handle_fault_on_reboot(insn) \ 1500 ____kvm_handle_fault_on_reboot(insn, "") 1501 1502 #define KVM_ARCH_WANT_MMU_NOTIFIER 1503 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1504 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1505 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1506 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1507 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1508 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1509 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1510 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1511 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1512 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1513 1514 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1515 unsigned long ipi_bitmap_high, u32 min, 1516 unsigned long icr, int op_64_bit); 1517 1518 u64 kvm_get_arch_capabilities(void); 1519 void kvm_define_shared_msr(unsigned index, u32 msr); 1520 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1521 1522 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1523 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1524 1525 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1526 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1527 1528 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1529 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1530 1531 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1532 struct kvm_async_pf *work); 1533 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1534 struct kvm_async_pf *work); 1535 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1536 struct kvm_async_pf *work); 1537 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1538 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1539 1540 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1541 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1542 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1543 1544 int kvm_is_in_guest(void); 1545 1546 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1547 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1548 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1549 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1550 1551 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1552 struct kvm_vcpu **dest_vcpu); 1553 1554 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1555 struct kvm_lapic_irq *irq); 1556 1557 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1558 { 1559 if (kvm_x86_ops->vcpu_blocking) 1560 kvm_x86_ops->vcpu_blocking(vcpu); 1561 } 1562 1563 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1564 { 1565 if (kvm_x86_ops->vcpu_unblocking) 1566 kvm_x86_ops->vcpu_unblocking(vcpu); 1567 } 1568 1569 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1570 1571 static inline int kvm_cpu_get_apicid(int mps_cpu) 1572 { 1573 #ifdef CONFIG_X86_LOCAL_APIC 1574 return default_cpu_present_to_apicid(mps_cpu); 1575 #else 1576 WARN_ON_ONCE(1); 1577 return BAD_APICID; 1578 #endif 1579 } 1580 1581 #define put_smstate(type, buf, offset, val) \ 1582 *(type *)((buf) + (offset) - 0x7e00) = val 1583 1584 #endif /* _ASM_X86_KVM_HOST_H */ 1585