1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 #define KVM_USER_MEM_SLOTS 509 44 /* memory slots that are not exposed to userspace */ 45 #define KVM_PRIVATE_MEM_SLOTS 3 46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 47 48 #define KVM_HALT_POLL_NS_DEFAULT 200000 49 50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 51 52 /* x86-specific vcpu->requests bit members */ 53 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 54 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 55 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 56 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 57 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 58 #define KVM_REQ_LOAD_CR3 KVM_ARCH_REQ(5) 59 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 60 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 61 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 62 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 63 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 64 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 65 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 66 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 67 #define KVM_REQ_MCLOCK_INPROGRESS \ 68 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 69 #define KVM_REQ_SCAN_IOAPIC \ 70 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 71 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 72 #define KVM_REQ_APIC_PAGE_RELOAD \ 73 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 74 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 75 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 76 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 77 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 78 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 79 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 80 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24) 81 #define KVM_REQ_APICV_UPDATE \ 82 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 83 84 #define CR0_RESERVED_BITS \ 85 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 86 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 87 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 88 89 #define CR4_RESERVED_BITS \ 90 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 91 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 92 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 93 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 94 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 95 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 96 97 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 98 99 100 101 #define INVALID_PAGE (~(hpa_t)0) 102 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 103 104 #define UNMAPPED_GVA (~(gpa_t)0) 105 106 /* KVM Hugepage definitions for x86 */ 107 enum { 108 PT_PAGE_TABLE_LEVEL = 1, 109 PT_DIRECTORY_LEVEL = 2, 110 PT_PDPE_LEVEL = 3, 111 /* set max level to the biggest one */ 112 PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL, 113 }; 114 #define KVM_NR_PAGE_SIZES (PT_MAX_HUGEPAGE_LEVEL - \ 115 PT_PAGE_TABLE_LEVEL + 1) 116 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 117 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 118 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 119 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 120 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 121 122 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 123 { 124 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 125 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 126 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 127 } 128 129 #define KVM_PERMILLE_MMU_PAGES 20 130 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 131 #define KVM_MMU_HASH_SHIFT 12 132 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 133 #define KVM_MIN_FREE_MMU_PAGES 5 134 #define KVM_REFILL_PAGES 25 135 #define KVM_MAX_CPUID_ENTRIES 80 136 #define KVM_NR_FIXED_MTRR_REGION 88 137 #define KVM_NR_VAR_MTRR 8 138 139 #define ASYNC_PF_PER_VCPU 64 140 141 enum kvm_reg { 142 VCPU_REGS_RAX = __VCPU_REGS_RAX, 143 VCPU_REGS_RCX = __VCPU_REGS_RCX, 144 VCPU_REGS_RDX = __VCPU_REGS_RDX, 145 VCPU_REGS_RBX = __VCPU_REGS_RBX, 146 VCPU_REGS_RSP = __VCPU_REGS_RSP, 147 VCPU_REGS_RBP = __VCPU_REGS_RBP, 148 VCPU_REGS_RSI = __VCPU_REGS_RSI, 149 VCPU_REGS_RDI = __VCPU_REGS_RDI, 150 #ifdef CONFIG_X86_64 151 VCPU_REGS_R8 = __VCPU_REGS_R8, 152 VCPU_REGS_R9 = __VCPU_REGS_R9, 153 VCPU_REGS_R10 = __VCPU_REGS_R10, 154 VCPU_REGS_R11 = __VCPU_REGS_R11, 155 VCPU_REGS_R12 = __VCPU_REGS_R12, 156 VCPU_REGS_R13 = __VCPU_REGS_R13, 157 VCPU_REGS_R14 = __VCPU_REGS_R14, 158 VCPU_REGS_R15 = __VCPU_REGS_R15, 159 #endif 160 VCPU_REGS_RIP, 161 NR_VCPU_REGS, 162 163 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 164 VCPU_EXREG_CR3, 165 VCPU_EXREG_RFLAGS, 166 VCPU_EXREG_SEGMENTS, 167 }; 168 169 enum { 170 VCPU_SREG_ES, 171 VCPU_SREG_CS, 172 VCPU_SREG_SS, 173 VCPU_SREG_DS, 174 VCPU_SREG_FS, 175 VCPU_SREG_GS, 176 VCPU_SREG_TR, 177 VCPU_SREG_LDTR, 178 }; 179 180 enum exit_fastpath_completion { 181 EXIT_FASTPATH_NONE, 182 EXIT_FASTPATH_SKIP_EMUL_INS, 183 }; 184 185 #include <asm/kvm_emulate.h> 186 187 #define KVM_NR_MEM_OBJS 40 188 189 #define KVM_NR_DB_REGS 4 190 191 #define DR6_BD (1 << 13) 192 #define DR6_BS (1 << 14) 193 #define DR6_BT (1 << 15) 194 #define DR6_RTM (1 << 16) 195 #define DR6_FIXED_1 0xfffe0ff0 196 #define DR6_INIT 0xffff0ff0 197 #define DR6_VOLATILE 0x0001e00f 198 199 #define DR7_BP_EN_MASK 0x000000ff 200 #define DR7_GE (1 << 9) 201 #define DR7_GD (1 << 13) 202 #define DR7_FIXED_1 0x00000400 203 #define DR7_VOLATILE 0xffff2bff 204 205 #define PFERR_PRESENT_BIT 0 206 #define PFERR_WRITE_BIT 1 207 #define PFERR_USER_BIT 2 208 #define PFERR_RSVD_BIT 3 209 #define PFERR_FETCH_BIT 4 210 #define PFERR_PK_BIT 5 211 #define PFERR_GUEST_FINAL_BIT 32 212 #define PFERR_GUEST_PAGE_BIT 33 213 214 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 215 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 216 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 217 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 218 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 219 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 220 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 221 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 222 223 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 224 PFERR_WRITE_MASK | \ 225 PFERR_PRESENT_MASK) 226 227 /* apic attention bits */ 228 #define KVM_APIC_CHECK_VAPIC 0 229 /* 230 * The following bit is set with PV-EOI, unset on EOI. 231 * We detect PV-EOI changes by guest by comparing 232 * this bit with PV-EOI in guest memory. 233 * See the implementation in apic_update_pv_eoi. 234 */ 235 #define KVM_APIC_PV_EOI_PENDING 1 236 237 struct kvm_kernel_irq_routing_entry; 238 239 /* 240 * We don't want allocation failures within the mmu code, so we preallocate 241 * enough memory for a single page fault in a cache. 242 */ 243 struct kvm_mmu_memory_cache { 244 int nobjs; 245 void *objects[KVM_NR_MEM_OBJS]; 246 }; 247 248 /* 249 * the pages used as guest page table on soft mmu are tracked by 250 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 251 * by indirect shadow page can not be more than 15 bits. 252 * 253 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 254 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 255 */ 256 union kvm_mmu_page_role { 257 u32 word; 258 struct { 259 unsigned level:4; 260 unsigned gpte_is_8_bytes:1; 261 unsigned quadrant:2; 262 unsigned direct:1; 263 unsigned access:3; 264 unsigned invalid:1; 265 unsigned nxe:1; 266 unsigned cr0_wp:1; 267 unsigned smep_andnot_wp:1; 268 unsigned smap_andnot_wp:1; 269 unsigned ad_disabled:1; 270 unsigned guest_mode:1; 271 unsigned :6; 272 273 /* 274 * This is left at the top of the word so that 275 * kvm_memslots_for_spte_role can extract it with a 276 * simple shift. While there is room, give it a whole 277 * byte so it is also faster to load it from memory. 278 */ 279 unsigned smm:8; 280 }; 281 }; 282 283 union kvm_mmu_extended_role { 284 /* 285 * This structure complements kvm_mmu_page_role caching everything needed for 286 * MMU configuration. If nothing in both these structures changed, MMU 287 * re-configuration can be skipped. @valid bit is set on first usage so we don't 288 * treat all-zero structure as valid data. 289 */ 290 u32 word; 291 struct { 292 unsigned int valid:1; 293 unsigned int execonly:1; 294 unsigned int cr0_pg:1; 295 unsigned int cr4_pae:1; 296 unsigned int cr4_pse:1; 297 unsigned int cr4_pke:1; 298 unsigned int cr4_smap:1; 299 unsigned int cr4_smep:1; 300 unsigned int cr4_la57:1; 301 unsigned int maxphyaddr:6; 302 }; 303 }; 304 305 union kvm_mmu_role { 306 u64 as_u64; 307 struct { 308 union kvm_mmu_page_role base; 309 union kvm_mmu_extended_role ext; 310 }; 311 }; 312 313 struct kvm_rmap_head { 314 unsigned long val; 315 }; 316 317 struct kvm_mmu_page { 318 struct list_head link; 319 struct hlist_node hash_link; 320 struct list_head lpage_disallowed_link; 321 322 bool unsync; 323 u8 mmu_valid_gen; 324 bool mmio_cached; 325 bool lpage_disallowed; /* Can't be replaced by an equiv large page */ 326 327 /* 328 * The following two entries are used to key the shadow page in the 329 * hash table. 330 */ 331 union kvm_mmu_page_role role; 332 gfn_t gfn; 333 334 u64 *spt; 335 /* hold the gfn of each spte inside spt */ 336 gfn_t *gfns; 337 int root_count; /* Currently serving as active root */ 338 unsigned int unsync_children; 339 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 340 DECLARE_BITMAP(unsync_child_bitmap, 512); 341 342 #ifdef CONFIG_X86_32 343 /* 344 * Used out of the mmu-lock to avoid reading spte values while an 345 * update is in progress; see the comments in __get_spte_lockless(). 346 */ 347 int clear_spte_count; 348 #endif 349 350 /* Number of writes since the last time traversal visited this page. */ 351 atomic_t write_flooding_count; 352 }; 353 354 struct kvm_pio_request { 355 unsigned long linear_rip; 356 unsigned long count; 357 int in; 358 int port; 359 int size; 360 }; 361 362 #define PT64_ROOT_MAX_LEVEL 5 363 364 struct rsvd_bits_validate { 365 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 366 u64 bad_mt_xwr; 367 }; 368 369 struct kvm_mmu_root_info { 370 gpa_t cr3; 371 hpa_t hpa; 372 }; 373 374 #define KVM_MMU_ROOT_INFO_INVALID \ 375 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE }) 376 377 #define KVM_MMU_NUM_PREV_ROOTS 3 378 379 /* 380 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 381 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 382 * current mmu mode. 383 */ 384 struct kvm_mmu { 385 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 386 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 387 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 388 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err, 389 bool prefault); 390 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 391 struct x86_exception *fault); 392 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 393 u32 access, struct x86_exception *exception); 394 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 395 struct x86_exception *exception); 396 int (*sync_page)(struct kvm_vcpu *vcpu, 397 struct kvm_mmu_page *sp); 398 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 399 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 400 u64 *spte, const void *pte); 401 hpa_t root_hpa; 402 gpa_t root_cr3; 403 union kvm_mmu_role mmu_role; 404 u8 root_level; 405 u8 shadow_root_level; 406 u8 ept_ad; 407 bool direct_map; 408 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 409 410 /* 411 * Bitmap; bit set = permission fault 412 * Byte index: page fault error code [4:1] 413 * Bit index: pte permissions in ACC_* format 414 */ 415 u8 permissions[16]; 416 417 /* 418 * The pkru_mask indicates if protection key checks are needed. It 419 * consists of 16 domains indexed by page fault error code bits [4:1], 420 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 421 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 422 */ 423 u32 pkru_mask; 424 425 u64 *pae_root; 426 u64 *lm_root; 427 428 /* 429 * check zero bits on shadow page table entries, these 430 * bits include not only hardware reserved bits but also 431 * the bits spte never used. 432 */ 433 struct rsvd_bits_validate shadow_zero_check; 434 435 struct rsvd_bits_validate guest_rsvd_check; 436 437 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 438 u8 last_nonleaf_level; 439 440 bool nx; 441 442 u64 pdptrs[4]; /* pae */ 443 }; 444 445 struct kvm_tlb_range { 446 u64 start_gfn; 447 u64 pages; 448 }; 449 450 enum pmc_type { 451 KVM_PMC_GP = 0, 452 KVM_PMC_FIXED, 453 }; 454 455 struct kvm_pmc { 456 enum pmc_type type; 457 u8 idx; 458 u64 counter; 459 u64 eventsel; 460 struct perf_event *perf_event; 461 struct kvm_vcpu *vcpu; 462 /* 463 * eventsel value for general purpose counters, 464 * ctrl value for fixed counters. 465 */ 466 u64 current_config; 467 }; 468 469 struct kvm_pmu { 470 unsigned nr_arch_gp_counters; 471 unsigned nr_arch_fixed_counters; 472 unsigned available_event_types; 473 u64 fixed_ctr_ctrl; 474 u64 global_ctrl; 475 u64 global_status; 476 u64 global_ovf_ctrl; 477 u64 counter_bitmask[2]; 478 u64 global_ctrl_mask; 479 u64 global_ovf_ctrl_mask; 480 u64 reserved_bits; 481 u8 version; 482 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 483 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 484 struct irq_work irq_work; 485 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 486 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 487 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 488 489 /* 490 * The gate to release perf_events not marked in 491 * pmc_in_use only once in a vcpu time slice. 492 */ 493 bool need_cleanup; 494 495 /* 496 * The total number of programmed perf_events and it helps to avoid 497 * redundant check before cleanup if guest don't use vPMU at all. 498 */ 499 u8 event_count; 500 }; 501 502 struct kvm_pmu_ops; 503 504 enum { 505 KVM_DEBUGREG_BP_ENABLED = 1, 506 KVM_DEBUGREG_WONT_EXIT = 2, 507 KVM_DEBUGREG_RELOAD = 4, 508 }; 509 510 struct kvm_mtrr_range { 511 u64 base; 512 u64 mask; 513 struct list_head node; 514 }; 515 516 struct kvm_mtrr { 517 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 518 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 519 u64 deftype; 520 521 struct list_head head; 522 }; 523 524 /* Hyper-V SynIC timer */ 525 struct kvm_vcpu_hv_stimer { 526 struct hrtimer timer; 527 int index; 528 union hv_stimer_config config; 529 u64 count; 530 u64 exp_time; 531 struct hv_message msg; 532 bool msg_pending; 533 }; 534 535 /* Hyper-V synthetic interrupt controller (SynIC)*/ 536 struct kvm_vcpu_hv_synic { 537 u64 version; 538 u64 control; 539 u64 msg_page; 540 u64 evt_page; 541 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 542 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 543 DECLARE_BITMAP(auto_eoi_bitmap, 256); 544 DECLARE_BITMAP(vec_bitmap, 256); 545 bool active; 546 bool dont_zero_synic_pages; 547 }; 548 549 /* Hyper-V per vcpu emulation context */ 550 struct kvm_vcpu_hv { 551 u32 vp_index; 552 u64 hv_vapic; 553 s64 runtime_offset; 554 struct kvm_vcpu_hv_synic synic; 555 struct kvm_hyperv_exit exit; 556 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 557 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 558 cpumask_t tlb_flush; 559 }; 560 561 struct kvm_vcpu_arch { 562 /* 563 * rip and regs accesses must go through 564 * kvm_{register,rip}_{read,write} functions. 565 */ 566 unsigned long regs[NR_VCPU_REGS]; 567 u32 regs_avail; 568 u32 regs_dirty; 569 570 unsigned long cr0; 571 unsigned long cr0_guest_owned_bits; 572 unsigned long cr2; 573 unsigned long cr3; 574 unsigned long cr4; 575 unsigned long cr4_guest_owned_bits; 576 unsigned long cr8; 577 u32 pkru; 578 u32 hflags; 579 u64 efer; 580 u64 apic_base; 581 struct kvm_lapic *apic; /* kernel irqchip context */ 582 bool apicv_active; 583 bool load_eoi_exitmap_pending; 584 DECLARE_BITMAP(ioapic_handled_vectors, 256); 585 unsigned long apic_attention; 586 int32_t apic_arb_prio; 587 int mp_state; 588 u64 ia32_misc_enable_msr; 589 u64 smbase; 590 u64 smi_count; 591 bool tpr_access_reporting; 592 bool xsaves_enabled; 593 u64 ia32_xss; 594 u64 microcode_version; 595 u64 arch_capabilities; 596 597 /* 598 * Paging state of the vcpu 599 * 600 * If the vcpu runs in guest mode with two level paging this still saves 601 * the paging mode of the l1 guest. This context is always used to 602 * handle faults. 603 */ 604 struct kvm_mmu *mmu; 605 606 /* Non-nested MMU for L1 */ 607 struct kvm_mmu root_mmu; 608 609 /* L1 MMU when running nested */ 610 struct kvm_mmu guest_mmu; 611 612 /* 613 * Paging state of an L2 guest (used for nested npt) 614 * 615 * This context will save all necessary information to walk page tables 616 * of an L2 guest. This context is only initialized for page table 617 * walking and not for faulting since we never handle l2 page faults on 618 * the host. 619 */ 620 struct kvm_mmu nested_mmu; 621 622 /* 623 * Pointer to the mmu context currently used for 624 * gva_to_gpa translations. 625 */ 626 struct kvm_mmu *walk_mmu; 627 628 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 629 struct kvm_mmu_memory_cache mmu_page_cache; 630 struct kvm_mmu_memory_cache mmu_page_header_cache; 631 632 /* 633 * QEMU userspace and the guest each have their own FPU state. 634 * In vcpu_run, we switch between the user and guest FPU contexts. 635 * While running a VCPU, the VCPU thread will have the guest FPU 636 * context. 637 * 638 * Note that while the PKRU state lives inside the fpu registers, 639 * it is switched out separately at VMENTER and VMEXIT time. The 640 * "guest_fpu" state here contains the guest FPU context, with the 641 * host PRKU bits. 642 */ 643 struct fpu *user_fpu; 644 struct fpu *guest_fpu; 645 646 u64 xcr0; 647 u64 guest_supported_xcr0; 648 u32 guest_xstate_size; 649 650 struct kvm_pio_request pio; 651 void *pio_data; 652 653 u8 event_exit_inst_len; 654 655 struct kvm_queued_exception { 656 bool pending; 657 bool injected; 658 bool has_error_code; 659 u8 nr; 660 u32 error_code; 661 unsigned long payload; 662 bool has_payload; 663 u8 nested_apf; 664 } exception; 665 666 struct kvm_queued_interrupt { 667 bool injected; 668 bool soft; 669 u8 nr; 670 } interrupt; 671 672 int halt_request; /* real mode on Intel only */ 673 674 int cpuid_nent; 675 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 676 677 int maxphyaddr; 678 679 /* emulate context */ 680 681 struct x86_emulate_ctxt emulate_ctxt; 682 bool emulate_regs_need_sync_to_vcpu; 683 bool emulate_regs_need_sync_from_vcpu; 684 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 685 686 gpa_t time; 687 struct pvclock_vcpu_time_info hv_clock; 688 unsigned int hw_tsc_khz; 689 struct gfn_to_hva_cache pv_time; 690 bool pv_time_enabled; 691 /* set guest stopped flag in pvclock flags field */ 692 bool pvclock_set_guest_stopped_request; 693 694 struct { 695 u8 preempted; 696 u64 msr_val; 697 u64 last_steal; 698 struct gfn_to_pfn_cache cache; 699 } st; 700 701 u64 tsc_offset; 702 u64 last_guest_tsc; 703 u64 last_host_tsc; 704 u64 tsc_offset_adjustment; 705 u64 this_tsc_nsec; 706 u64 this_tsc_write; 707 u64 this_tsc_generation; 708 bool tsc_catchup; 709 bool tsc_always_catchup; 710 s8 virtual_tsc_shift; 711 u32 virtual_tsc_mult; 712 u32 virtual_tsc_khz; 713 s64 ia32_tsc_adjust_msr; 714 u64 msr_ia32_power_ctl; 715 u64 tsc_scaling_ratio; 716 717 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 718 unsigned nmi_pending; /* NMI queued after currently running handler */ 719 bool nmi_injected; /* Trying to inject an NMI this entry */ 720 bool smi_pending; /* SMI queued after currently running handler */ 721 722 struct kvm_mtrr mtrr_state; 723 u64 pat; 724 725 unsigned switch_db_regs; 726 unsigned long db[KVM_NR_DB_REGS]; 727 unsigned long dr6; 728 unsigned long dr7; 729 unsigned long eff_db[KVM_NR_DB_REGS]; 730 unsigned long guest_debug_dr7; 731 u64 msr_platform_info; 732 u64 msr_misc_features_enables; 733 734 u64 mcg_cap; 735 u64 mcg_status; 736 u64 mcg_ctl; 737 u64 mcg_ext_ctl; 738 u64 *mce_banks; 739 740 /* Cache MMIO info */ 741 u64 mmio_gva; 742 unsigned mmio_access; 743 gfn_t mmio_gfn; 744 u64 mmio_gen; 745 746 struct kvm_pmu pmu; 747 748 /* used for guest single stepping over the given code position */ 749 unsigned long singlestep_rip; 750 751 struct kvm_vcpu_hv hyperv; 752 753 cpumask_var_t wbinvd_dirty_mask; 754 755 unsigned long last_retry_eip; 756 unsigned long last_retry_addr; 757 758 struct { 759 bool halted; 760 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 761 struct gfn_to_hva_cache data; 762 u64 msr_val; 763 u32 id; 764 bool send_user_only; 765 u32 host_apf_reason; 766 unsigned long nested_apf_token; 767 bool delivery_as_pf_vmexit; 768 } apf; 769 770 /* OSVW MSRs (AMD only) */ 771 struct { 772 u64 length; 773 u64 status; 774 } osvw; 775 776 struct { 777 u64 msr_val; 778 struct gfn_to_hva_cache data; 779 } pv_eoi; 780 781 u64 msr_kvm_poll_control; 782 783 /* 784 * Indicates the guest is trying to write a gfn that contains one or 785 * more of the PTEs used to translate the write itself, i.e. the access 786 * is changing its own translation in the guest page tables. KVM exits 787 * to userspace if emulation of the faulting instruction fails and this 788 * flag is set, as KVM cannot make forward progress. 789 * 790 * If emulation fails for a write to guest page tables, KVM unprotects 791 * (zaps) the shadow page for the target gfn and resumes the guest to 792 * retry the non-emulatable instruction (on hardware). Unprotecting the 793 * gfn doesn't allow forward progress for a self-changing access because 794 * doing so also zaps the translation for the gfn, i.e. retrying the 795 * instruction will hit a !PRESENT fault, which results in a new shadow 796 * page and sends KVM back to square one. 797 */ 798 bool write_fault_to_shadow_pgtable; 799 800 /* set at EPT violation at this point */ 801 unsigned long exit_qualification; 802 803 /* pv related host specific info */ 804 struct { 805 bool pv_unhalted; 806 } pv; 807 808 int pending_ioapic_eoi; 809 int pending_external_vector; 810 811 /* GPA available */ 812 bool gpa_available; 813 gpa_t gpa_val; 814 815 /* be preempted when it's in kernel-mode(cpl=0) */ 816 bool preempted_in_kernel; 817 818 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 819 bool l1tf_flush_l1d; 820 821 /* AMD MSRC001_0015 Hardware Configuration */ 822 u64 msr_hwcr; 823 }; 824 825 struct kvm_lpage_info { 826 int disallow_lpage; 827 }; 828 829 struct kvm_arch_memory_slot { 830 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 831 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 832 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 833 }; 834 835 /* 836 * We use as the mode the number of bits allocated in the LDR for the 837 * logical processor ID. It happens that these are all powers of two. 838 * This makes it is very easy to detect cases where the APICs are 839 * configured for multiple modes; in that case, we cannot use the map and 840 * hence cannot use kvm_irq_delivery_to_apic_fast either. 841 */ 842 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 843 #define KVM_APIC_MODE_XAPIC_FLAT 8 844 #define KVM_APIC_MODE_X2APIC 16 845 846 struct kvm_apic_map { 847 struct rcu_head rcu; 848 u8 mode; 849 u32 max_apic_id; 850 union { 851 struct kvm_lapic *xapic_flat_map[8]; 852 struct kvm_lapic *xapic_cluster_map[16][4]; 853 }; 854 struct kvm_lapic *phys_map[]; 855 }; 856 857 /* Hyper-V emulation context */ 858 struct kvm_hv { 859 struct mutex hv_lock; 860 u64 hv_guest_os_id; 861 u64 hv_hypercall; 862 u64 hv_tsc_page; 863 864 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 865 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 866 u64 hv_crash_ctl; 867 868 HV_REFERENCE_TSC_PAGE tsc_ref; 869 870 struct idr conn_to_evt; 871 872 u64 hv_reenlightenment_control; 873 u64 hv_tsc_emulation_control; 874 u64 hv_tsc_emulation_status; 875 876 /* How many vCPUs have VP index != vCPU index */ 877 atomic_t num_mismatched_vp_indexes; 878 879 struct hv_partition_assist_pg *hv_pa_pg; 880 }; 881 882 enum kvm_irqchip_mode { 883 KVM_IRQCHIP_NONE, 884 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 885 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 886 }; 887 888 #define APICV_INHIBIT_REASON_DISABLE 0 889 #define APICV_INHIBIT_REASON_HYPERV 1 890 #define APICV_INHIBIT_REASON_NESTED 2 891 #define APICV_INHIBIT_REASON_IRQWIN 3 892 #define APICV_INHIBIT_REASON_PIT_REINJ 4 893 894 struct kvm_arch { 895 unsigned long n_used_mmu_pages; 896 unsigned long n_requested_mmu_pages; 897 unsigned long n_max_mmu_pages; 898 unsigned int indirect_shadow_pages; 899 u8 mmu_valid_gen; 900 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 901 /* 902 * Hash table of struct kvm_mmu_page. 903 */ 904 struct list_head active_mmu_pages; 905 struct list_head zapped_obsolete_pages; 906 struct list_head lpage_disallowed_mmu_pages; 907 struct kvm_page_track_notifier_node mmu_sp_tracker; 908 struct kvm_page_track_notifier_head track_notifier_head; 909 910 struct list_head assigned_dev_head; 911 struct iommu_domain *iommu_domain; 912 bool iommu_noncoherent; 913 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 914 atomic_t noncoherent_dma_count; 915 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 916 atomic_t assigned_device_count; 917 struct kvm_pic *vpic; 918 struct kvm_ioapic *vioapic; 919 struct kvm_pit *vpit; 920 atomic_t vapics_in_nmi_mode; 921 struct mutex apic_map_lock; 922 struct kvm_apic_map *apic_map; 923 924 bool apic_access_page_done; 925 unsigned long apicv_inhibit_reasons; 926 927 gpa_t wall_clock; 928 929 bool mwait_in_guest; 930 bool hlt_in_guest; 931 bool pause_in_guest; 932 bool cstate_in_guest; 933 934 unsigned long irq_sources_bitmap; 935 s64 kvmclock_offset; 936 raw_spinlock_t tsc_write_lock; 937 u64 last_tsc_nsec; 938 u64 last_tsc_write; 939 u32 last_tsc_khz; 940 u64 cur_tsc_nsec; 941 u64 cur_tsc_write; 942 u64 cur_tsc_offset; 943 u64 cur_tsc_generation; 944 int nr_vcpus_matched_tsc; 945 946 spinlock_t pvclock_gtod_sync_lock; 947 bool use_master_clock; 948 u64 master_kernel_ns; 949 u64 master_cycle_now; 950 struct delayed_work kvmclock_update_work; 951 struct delayed_work kvmclock_sync_work; 952 953 struct kvm_xen_hvm_config xen_hvm_config; 954 955 /* reads protected by irq_srcu, writes by irq_lock */ 956 struct hlist_head mask_notifier_list; 957 958 struct kvm_hv hyperv; 959 960 #ifdef CONFIG_KVM_MMU_AUDIT 961 int audit_point; 962 #endif 963 964 bool backwards_tsc_observed; 965 bool boot_vcpu_runs_old_kvmclock; 966 u32 bsp_vcpu_id; 967 968 u64 disabled_quirks; 969 970 enum kvm_irqchip_mode irqchip_mode; 971 u8 nr_reserved_ioapic_pins; 972 973 bool disabled_lapic_found; 974 975 bool x2apic_format; 976 bool x2apic_broadcast_quirk_disabled; 977 978 bool guest_can_read_msr_platform_info; 979 bool exception_payload_enabled; 980 981 struct kvm_pmu_event_filter *pmu_event_filter; 982 struct task_struct *nx_lpage_recovery_thread; 983 }; 984 985 struct kvm_vm_stat { 986 ulong mmu_shadow_zapped; 987 ulong mmu_pte_write; 988 ulong mmu_pte_updated; 989 ulong mmu_pde_zapped; 990 ulong mmu_flooded; 991 ulong mmu_recycled; 992 ulong mmu_cache_miss; 993 ulong mmu_unsync; 994 ulong remote_tlb_flush; 995 ulong lpages; 996 ulong nx_lpage_splits; 997 ulong max_mmu_page_hash_collisions; 998 }; 999 1000 struct kvm_vcpu_stat { 1001 u64 pf_fixed; 1002 u64 pf_guest; 1003 u64 tlb_flush; 1004 u64 invlpg; 1005 1006 u64 exits; 1007 u64 io_exits; 1008 u64 mmio_exits; 1009 u64 signal_exits; 1010 u64 irq_window_exits; 1011 u64 nmi_window_exits; 1012 u64 l1d_flush; 1013 u64 halt_exits; 1014 u64 halt_successful_poll; 1015 u64 halt_attempted_poll; 1016 u64 halt_poll_invalid; 1017 u64 halt_wakeup; 1018 u64 request_irq_exits; 1019 u64 irq_exits; 1020 u64 host_state_reload; 1021 u64 fpu_reload; 1022 u64 insn_emulation; 1023 u64 insn_emulation_fail; 1024 u64 hypercalls; 1025 u64 irq_injections; 1026 u64 nmi_injections; 1027 u64 req_event; 1028 }; 1029 1030 struct x86_instruction_info; 1031 1032 struct msr_data { 1033 bool host_initiated; 1034 u32 index; 1035 u64 data; 1036 }; 1037 1038 struct kvm_lapic_irq { 1039 u32 vector; 1040 u16 delivery_mode; 1041 u16 dest_mode; 1042 bool level; 1043 u16 trig_mode; 1044 u32 shorthand; 1045 u32 dest_id; 1046 bool msi_redir_hint; 1047 }; 1048 1049 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1050 { 1051 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1052 } 1053 1054 struct kvm_x86_ops { 1055 int (*cpu_has_kvm_support)(void); /* __init */ 1056 int (*disabled_by_bios)(void); /* __init */ 1057 int (*hardware_enable)(void); 1058 void (*hardware_disable)(void); 1059 int (*check_processor_compatibility)(void);/* __init */ 1060 int (*hardware_setup)(void); /* __init */ 1061 void (*hardware_unsetup)(void); /* __exit */ 1062 bool (*cpu_has_accelerated_tpr)(void); 1063 bool (*has_emulated_msr)(int index); 1064 void (*cpuid_update)(struct kvm_vcpu *vcpu); 1065 1066 struct kvm *(*vm_alloc)(void); 1067 void (*vm_free)(struct kvm *); 1068 int (*vm_init)(struct kvm *kvm); 1069 void (*vm_destroy)(struct kvm *kvm); 1070 1071 /* Create, but do not attach this VCPU */ 1072 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1073 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1074 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1075 1076 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1077 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1078 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1079 1080 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 1081 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1082 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1083 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1084 void (*get_segment)(struct kvm_vcpu *vcpu, 1085 struct kvm_segment *var, int seg); 1086 int (*get_cpl)(struct kvm_vcpu *vcpu); 1087 void (*set_segment)(struct kvm_vcpu *vcpu, 1088 struct kvm_segment *var, int seg); 1089 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1090 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 1091 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 1092 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1093 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1094 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1095 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1096 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1097 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1098 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1099 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1100 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 1101 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 1102 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1103 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1104 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1105 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1106 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1107 1108 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa); 1109 int (*tlb_remote_flush)(struct kvm *kvm); 1110 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1111 struct kvm_tlb_range *range); 1112 1113 /* 1114 * Flush any TLB entries associated with the given GVA. 1115 * Does not need to flush GPA->HPA mappings. 1116 * Can potentially get non-canonical addresses through INVLPGs, which 1117 * the implementation may choose to ignore if appropriate. 1118 */ 1119 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1120 1121 void (*run)(struct kvm_vcpu *vcpu); 1122 int (*handle_exit)(struct kvm_vcpu *vcpu, 1123 enum exit_fastpath_completion exit_fastpath); 1124 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1125 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1126 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1127 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1128 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1129 unsigned char *hypercall_addr); 1130 void (*set_irq)(struct kvm_vcpu *vcpu); 1131 void (*set_nmi)(struct kvm_vcpu *vcpu); 1132 void (*queue_exception)(struct kvm_vcpu *vcpu); 1133 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1134 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 1135 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 1136 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1137 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1138 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1139 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1140 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1141 bool (*check_apicv_inhibit_reasons)(ulong bit); 1142 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate); 1143 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1144 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1145 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1146 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1147 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1148 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1149 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 1150 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1151 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1152 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1153 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1154 int (*get_tdp_level)(struct kvm_vcpu *vcpu); 1155 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1156 int (*get_lpage_level)(void); 1157 bool (*rdtscp_supported)(void); 1158 bool (*invpcid_supported)(void); 1159 1160 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1161 1162 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 1163 1164 bool (*has_wbinvd_exit)(void); 1165 1166 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu); 1167 /* Returns actual tsc_offset set in active VMCS */ 1168 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1169 1170 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 1171 1172 int (*check_intercept)(struct kvm_vcpu *vcpu, 1173 struct x86_instruction_info *info, 1174 enum x86_intercept_stage stage); 1175 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu, 1176 enum exit_fastpath_completion *exit_fastpath); 1177 bool (*mpx_supported)(void); 1178 bool (*xsaves_supported)(void); 1179 bool (*umip_emulated)(void); 1180 bool (*pt_supported)(void); 1181 bool (*pku_supported)(void); 1182 1183 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 1184 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1185 1186 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1187 1188 /* 1189 * Arch-specific dirty logging hooks. These hooks are only supposed to 1190 * be valid if the specific arch has hardware-accelerated dirty logging 1191 * mechanism. Currently only for PML on VMX. 1192 * 1193 * - slot_enable_log_dirty: 1194 * called when enabling log dirty mode for the slot. 1195 * - slot_disable_log_dirty: 1196 * called when disabling log dirty mode for the slot. 1197 * also called when slot is created with log dirty disabled. 1198 * - flush_log_dirty: 1199 * called before reporting dirty_bitmap to userspace. 1200 * - enable_log_dirty_pt_masked: 1201 * called when reenabling log dirty for the GFNs in the mask after 1202 * corresponding bits are cleared in slot->dirty_bitmap. 1203 */ 1204 void (*slot_enable_log_dirty)(struct kvm *kvm, 1205 struct kvm_memory_slot *slot); 1206 void (*slot_disable_log_dirty)(struct kvm *kvm, 1207 struct kvm_memory_slot *slot); 1208 void (*flush_log_dirty)(struct kvm *kvm); 1209 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1210 struct kvm_memory_slot *slot, 1211 gfn_t offset, unsigned long mask); 1212 int (*write_log_dirty)(struct kvm_vcpu *vcpu); 1213 1214 /* pmu operations of sub-arch */ 1215 const struct kvm_pmu_ops *pmu_ops; 1216 1217 /* 1218 * Architecture specific hooks for vCPU blocking due to 1219 * HLT instruction. 1220 * Returns for .pre_block(): 1221 * - 0 means continue to block the vCPU. 1222 * - 1 means we cannot block the vCPU since some event 1223 * happens during this period, such as, 'ON' bit in 1224 * posted-interrupts descriptor is set. 1225 */ 1226 int (*pre_block)(struct kvm_vcpu *vcpu); 1227 void (*post_block)(struct kvm_vcpu *vcpu); 1228 1229 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1230 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1231 1232 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1233 uint32_t guest_irq, bool set); 1234 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1235 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1236 1237 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1238 bool *expired); 1239 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1240 1241 void (*setup_mce)(struct kvm_vcpu *vcpu); 1242 1243 int (*get_nested_state)(struct kvm_vcpu *vcpu, 1244 struct kvm_nested_state __user *user_kvm_nested_state, 1245 unsigned user_data_size); 1246 int (*set_nested_state)(struct kvm_vcpu *vcpu, 1247 struct kvm_nested_state __user *user_kvm_nested_state, 1248 struct kvm_nested_state *kvm_state); 1249 bool (*get_vmcs12_pages)(struct kvm_vcpu *vcpu); 1250 1251 int (*smi_allowed)(struct kvm_vcpu *vcpu); 1252 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1253 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1254 int (*enable_smi_window)(struct kvm_vcpu *vcpu); 1255 1256 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1257 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1258 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1259 1260 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1261 1262 int (*nested_enable_evmcs)(struct kvm_vcpu *vcpu, 1263 uint16_t *vmcs_version); 1264 uint16_t (*nested_get_evmcs_version)(struct kvm_vcpu *vcpu); 1265 1266 bool (*need_emulation_on_page_fault)(struct kvm_vcpu *vcpu); 1267 1268 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1269 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1270 }; 1271 1272 struct kvm_arch_async_pf { 1273 u32 token; 1274 gfn_t gfn; 1275 unsigned long cr3; 1276 bool direct_map; 1277 }; 1278 1279 extern struct kvm_x86_ops *kvm_x86_ops; 1280 extern struct kmem_cache *x86_fpu_cache; 1281 1282 #define __KVM_HAVE_ARCH_VM_ALLOC 1283 static inline struct kvm *kvm_arch_alloc_vm(void) 1284 { 1285 return kvm_x86_ops->vm_alloc(); 1286 } 1287 1288 static inline void kvm_arch_free_vm(struct kvm *kvm) 1289 { 1290 return kvm_x86_ops->vm_free(kvm); 1291 } 1292 1293 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1294 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1295 { 1296 if (kvm_x86_ops->tlb_remote_flush && 1297 !kvm_x86_ops->tlb_remote_flush(kvm)) 1298 return 0; 1299 else 1300 return -ENOTSUPP; 1301 } 1302 1303 int kvm_mmu_module_init(void); 1304 void kvm_mmu_module_exit(void); 1305 1306 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1307 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1308 void kvm_mmu_init_vm(struct kvm *kvm); 1309 void kvm_mmu_uninit_vm(struct kvm *kvm); 1310 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1311 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1312 u64 acc_track_mask, u64 me_mask); 1313 1314 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1315 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1316 struct kvm_memory_slot *memslot); 1317 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1318 const struct kvm_memory_slot *memslot); 1319 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1320 struct kvm_memory_slot *memslot); 1321 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1322 struct kvm_memory_slot *memslot); 1323 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1324 struct kvm_memory_slot *memslot); 1325 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1326 struct kvm_memory_slot *slot, 1327 gfn_t gfn_offset, unsigned long mask); 1328 void kvm_mmu_zap_all(struct kvm *kvm); 1329 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1330 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1331 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1332 1333 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1334 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1335 1336 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1337 const void *val, int bytes); 1338 1339 struct kvm_irq_mask_notifier { 1340 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1341 int irq; 1342 struct hlist_node link; 1343 }; 1344 1345 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1346 struct kvm_irq_mask_notifier *kimn); 1347 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1348 struct kvm_irq_mask_notifier *kimn); 1349 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1350 bool mask); 1351 1352 extern bool tdp_enabled; 1353 1354 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1355 1356 /* control of guest tsc rate supported? */ 1357 extern bool kvm_has_tsc_control; 1358 /* maximum supported tsc_khz for guests */ 1359 extern u32 kvm_max_guest_tsc_khz; 1360 /* number of bits of the fractional part of the TSC scaling ratio */ 1361 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1362 /* maximum allowed value of TSC scaling ratio */ 1363 extern u64 kvm_max_tsc_scaling_ratio; 1364 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1365 extern u64 kvm_default_tsc_scaling_ratio; 1366 1367 extern u64 kvm_mce_cap_supported; 1368 1369 /* 1370 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1371 * userspace I/O) to indicate that the emulation context 1372 * should be resued as is, i.e. skip initialization of 1373 * emulation context, instruction fetch and decode. 1374 * 1375 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1376 * Indicates that only select instructions (tagged with 1377 * EmulateOnUD) should be emulated (to minimize the emulator 1378 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1379 * 1380 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1381 * decode the instruction length. For use *only* by 1382 * kvm_x86_ops->skip_emulated_instruction() implementations. 1383 * 1384 * EMULTYPE_ALLOW_RETRY - Set when the emulator should resume the guest to 1385 * retry native execution under certain conditions. 1386 * 1387 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1388 * triggered by KVM's magic "force emulation" prefix, 1389 * which is opt in via module param (off by default). 1390 * Bypasses EmulateOnUD restriction despite emulating 1391 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1392 * Used to test the full emulator from userspace. 1393 * 1394 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1395 * backdoor emulation, which is opt in via module param. 1396 * VMware backoor emulation handles select instructions 1397 * and reinjects the #GP for all other cases. 1398 */ 1399 #define EMULTYPE_NO_DECODE (1 << 0) 1400 #define EMULTYPE_TRAP_UD (1 << 1) 1401 #define EMULTYPE_SKIP (1 << 2) 1402 #define EMULTYPE_ALLOW_RETRY (1 << 3) 1403 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1404 #define EMULTYPE_VMWARE_GP (1 << 5) 1405 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1406 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1407 void *insn, int insn_len); 1408 1409 void kvm_enable_efer_bits(u64); 1410 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1411 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1412 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1413 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1414 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1415 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1416 1417 struct x86_emulate_ctxt; 1418 1419 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1420 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1421 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1422 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1423 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1424 1425 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1426 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1427 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1428 1429 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1430 int reason, bool has_error_code, u32 error_code); 1431 1432 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1433 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1434 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1435 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1436 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1437 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1438 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1439 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1440 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1441 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1442 1443 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1444 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1445 1446 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1447 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1448 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1449 1450 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1451 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1452 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1453 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1454 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1455 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1456 gfn_t gfn, void *data, int offset, int len, 1457 u32 access); 1458 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1459 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1460 1461 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1462 int irq_source_id, int level) 1463 { 1464 /* Logical OR for level trig interrupt */ 1465 if (level) 1466 __set_bit(irq_source_id, irq_state); 1467 else 1468 __clear_bit(irq_source_id, irq_state); 1469 1470 return !!(*irq_state); 1471 } 1472 1473 #define KVM_MMU_ROOT_CURRENT BIT(0) 1474 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1475 #define KVM_MMU_ROOTS_ALL (~0UL) 1476 1477 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1478 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1479 1480 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1481 1482 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1483 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1484 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1485 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1486 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1487 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1488 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1489 ulong roots_to_free); 1490 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1491 struct x86_exception *exception); 1492 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1493 struct x86_exception *exception); 1494 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1495 struct x86_exception *exception); 1496 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1497 struct x86_exception *exception); 1498 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1499 struct x86_exception *exception); 1500 1501 bool kvm_apicv_activated(struct kvm *kvm); 1502 void kvm_apicv_init(struct kvm *kvm, bool enable); 1503 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1504 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1505 unsigned long bit); 1506 1507 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1508 1509 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1510 void *insn, int insn_len); 1511 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1512 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1513 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush); 1514 1515 void kvm_enable_tdp(void); 1516 void kvm_disable_tdp(void); 1517 1518 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1519 struct x86_exception *exception) 1520 { 1521 return gpa; 1522 } 1523 1524 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1525 { 1526 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1527 1528 return (struct kvm_mmu_page *)page_private(page); 1529 } 1530 1531 static inline u16 kvm_read_ldt(void) 1532 { 1533 u16 ldt; 1534 asm("sldt %0" : "=g"(ldt)); 1535 return ldt; 1536 } 1537 1538 static inline void kvm_load_ldt(u16 sel) 1539 { 1540 asm("lldt %0" : : "rm"(sel)); 1541 } 1542 1543 #ifdef CONFIG_X86_64 1544 static inline unsigned long read_msr(unsigned long msr) 1545 { 1546 u64 value; 1547 1548 rdmsrl(msr, value); 1549 return value; 1550 } 1551 #endif 1552 1553 static inline u32 get_rdx_init_val(void) 1554 { 1555 return 0x600; /* P6 family */ 1556 } 1557 1558 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1559 { 1560 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1561 } 1562 1563 #define TSS_IOPB_BASE_OFFSET 0x66 1564 #define TSS_BASE_SIZE 0x68 1565 #define TSS_IOPB_SIZE (65536 / 8) 1566 #define TSS_REDIRECTION_SIZE (256 / 8) 1567 #define RMODE_TSS_SIZE \ 1568 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1569 1570 enum { 1571 TASK_SWITCH_CALL = 0, 1572 TASK_SWITCH_IRET = 1, 1573 TASK_SWITCH_JMP = 2, 1574 TASK_SWITCH_GATE = 3, 1575 }; 1576 1577 #define HF_GIF_MASK (1 << 0) 1578 #define HF_HIF_MASK (1 << 1) 1579 #define HF_VINTR_MASK (1 << 2) 1580 #define HF_NMI_MASK (1 << 3) 1581 #define HF_IRET_MASK (1 << 4) 1582 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1583 #define HF_SMM_MASK (1 << 6) 1584 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1585 1586 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1587 #define KVM_ADDRESS_SPACE_NUM 2 1588 1589 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1590 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1591 1592 asmlinkage void kvm_spurious_fault(void); 1593 1594 /* 1595 * Hardware virtualization extension instructions may fault if a 1596 * reboot turns off virtualization while processes are running. 1597 * Usually after catching the fault we just panic; during reboot 1598 * instead the instruction is ignored. 1599 */ 1600 #define __kvm_handle_fault_on_reboot(insn) \ 1601 "666: \n\t" \ 1602 insn "\n\t" \ 1603 "jmp 668f \n\t" \ 1604 "667: \n\t" \ 1605 "call kvm_spurious_fault \n\t" \ 1606 "668: \n\t" \ 1607 _ASM_EXTABLE(666b, 667b) 1608 1609 #define KVM_ARCH_WANT_MMU_NOTIFIER 1610 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1611 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1612 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1613 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1614 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1615 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1616 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1617 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1618 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1619 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1620 1621 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1622 unsigned long ipi_bitmap_high, u32 min, 1623 unsigned long icr, int op_64_bit); 1624 1625 void kvm_define_shared_msr(unsigned index, u32 msr); 1626 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1627 1628 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1629 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1630 1631 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1632 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1633 1634 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1635 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1636 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1637 unsigned long *vcpu_bitmap); 1638 1639 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1640 struct kvm_async_pf *work); 1641 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1642 struct kvm_async_pf *work); 1643 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1644 struct kvm_async_pf *work); 1645 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1646 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1647 1648 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1649 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1650 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1651 1652 int kvm_is_in_guest(void); 1653 1654 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1655 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1656 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1657 1658 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1659 struct kvm_vcpu **dest_vcpu); 1660 1661 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1662 struct kvm_lapic_irq *irq); 1663 1664 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1665 { 1666 /* We can only post Fixed and LowPrio IRQs */ 1667 return (irq->delivery_mode == dest_Fixed || 1668 irq->delivery_mode == dest_LowestPrio); 1669 } 1670 1671 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1672 { 1673 if (kvm_x86_ops->vcpu_blocking) 1674 kvm_x86_ops->vcpu_blocking(vcpu); 1675 } 1676 1677 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1678 { 1679 if (kvm_x86_ops->vcpu_unblocking) 1680 kvm_x86_ops->vcpu_unblocking(vcpu); 1681 } 1682 1683 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1684 1685 static inline int kvm_cpu_get_apicid(int mps_cpu) 1686 { 1687 #ifdef CONFIG_X86_LOCAL_APIC 1688 return default_cpu_present_to_apicid(mps_cpu); 1689 #else 1690 WARN_ON_ONCE(1); 1691 return BAD_APICID; 1692 #endif 1693 } 1694 1695 #define put_smstate(type, buf, offset, val) \ 1696 *(type *)((buf) + (offset) - 0x7e00) = val 1697 1698 #define GET_SMSTATE(type, buf, offset) \ 1699 (*(type *)((buf) + (offset) - 0x7e00)) 1700 1701 #endif /* _ASM_X86_KVM_HOST_H */ 1702