1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 /* memory slots that are not exposed to userspace */ 44 #define KVM_PRIVATE_MEM_SLOTS 3 45 46 #define KVM_HALT_POLL_NS_DEFAULT 200000 47 48 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 49 50 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 51 KVM_DIRTY_LOG_INITIALLY_SET) 52 53 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \ 54 KVM_BUS_LOCK_DETECTION_EXIT) 55 56 /* x86-specific vcpu->requests bit members */ 57 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 58 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 59 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 60 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 61 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 62 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 63 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 64 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 65 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 66 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 67 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 68 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 69 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 70 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 71 #define KVM_REQ_MCLOCK_INPROGRESS \ 72 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 73 #define KVM_REQ_SCAN_IOAPIC \ 74 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 75 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 76 #define KVM_REQ_APIC_PAGE_RELOAD \ 77 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 78 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 79 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 80 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 81 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 82 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 83 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 84 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 85 #define KVM_REQ_APICV_UPDATE \ 86 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 87 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 88 #define KVM_REQ_HV_TLB_FLUSH \ 89 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_NO_WAKEUP) 90 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 91 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 92 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \ 93 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 94 95 #define CR0_RESERVED_BITS \ 96 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 97 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 98 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 99 100 #define CR4_RESERVED_BITS \ 101 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 102 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 103 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 104 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 105 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 106 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 107 108 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 109 110 111 112 #define INVALID_PAGE (~(hpa_t)0) 113 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 114 115 #define UNMAPPED_GVA (~(gpa_t)0) 116 117 /* KVM Hugepage definitions for x86 */ 118 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 119 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 120 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 121 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 122 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 123 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 124 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 125 126 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 127 { 128 /* KVM_HPAGE_GFN_SHIFT(PG_LEVEL_4K) must be 0. */ 129 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 130 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 131 } 132 133 #define KVM_PERMILLE_MMU_PAGES 20 134 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 135 #define KVM_MMU_HASH_SHIFT 12 136 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 137 #define KVM_MIN_FREE_MMU_PAGES 5 138 #define KVM_REFILL_PAGES 25 139 #define KVM_MAX_CPUID_ENTRIES 256 140 #define KVM_NR_FIXED_MTRR_REGION 88 141 #define KVM_NR_VAR_MTRR 8 142 143 #define ASYNC_PF_PER_VCPU 64 144 145 enum kvm_reg { 146 VCPU_REGS_RAX = __VCPU_REGS_RAX, 147 VCPU_REGS_RCX = __VCPU_REGS_RCX, 148 VCPU_REGS_RDX = __VCPU_REGS_RDX, 149 VCPU_REGS_RBX = __VCPU_REGS_RBX, 150 VCPU_REGS_RSP = __VCPU_REGS_RSP, 151 VCPU_REGS_RBP = __VCPU_REGS_RBP, 152 VCPU_REGS_RSI = __VCPU_REGS_RSI, 153 VCPU_REGS_RDI = __VCPU_REGS_RDI, 154 #ifdef CONFIG_X86_64 155 VCPU_REGS_R8 = __VCPU_REGS_R8, 156 VCPU_REGS_R9 = __VCPU_REGS_R9, 157 VCPU_REGS_R10 = __VCPU_REGS_R10, 158 VCPU_REGS_R11 = __VCPU_REGS_R11, 159 VCPU_REGS_R12 = __VCPU_REGS_R12, 160 VCPU_REGS_R13 = __VCPU_REGS_R13, 161 VCPU_REGS_R14 = __VCPU_REGS_R14, 162 VCPU_REGS_R15 = __VCPU_REGS_R15, 163 #endif 164 VCPU_REGS_RIP, 165 NR_VCPU_REGS, 166 167 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 168 VCPU_EXREG_CR0, 169 VCPU_EXREG_CR3, 170 VCPU_EXREG_CR4, 171 VCPU_EXREG_RFLAGS, 172 VCPU_EXREG_SEGMENTS, 173 VCPU_EXREG_EXIT_INFO_1, 174 VCPU_EXREG_EXIT_INFO_2, 175 }; 176 177 enum { 178 VCPU_SREG_ES, 179 VCPU_SREG_CS, 180 VCPU_SREG_SS, 181 VCPU_SREG_DS, 182 VCPU_SREG_FS, 183 VCPU_SREG_GS, 184 VCPU_SREG_TR, 185 VCPU_SREG_LDTR, 186 }; 187 188 enum exit_fastpath_completion { 189 EXIT_FASTPATH_NONE, 190 EXIT_FASTPATH_REENTER_GUEST, 191 EXIT_FASTPATH_EXIT_HANDLED, 192 }; 193 typedef enum exit_fastpath_completion fastpath_t; 194 195 struct x86_emulate_ctxt; 196 struct x86_exception; 197 enum x86_intercept; 198 enum x86_intercept_stage; 199 200 #define KVM_NR_DB_REGS 4 201 202 #define DR6_BD (1 << 13) 203 #define DR6_BS (1 << 14) 204 #define DR6_BT (1 << 15) 205 #define DR6_RTM (1 << 16) 206 /* 207 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits. 208 * We can regard all the bits in DR6_FIXED_1 as active_low bits; 209 * they will never be 0 for now, but when they are defined 210 * in the future it will require no code change. 211 * 212 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6. 213 */ 214 #define DR6_ACTIVE_LOW 0xffff0ff0 215 #define DR6_VOLATILE 0x0001e00f 216 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE) 217 218 #define DR7_BP_EN_MASK 0x000000ff 219 #define DR7_GE (1 << 9) 220 #define DR7_GD (1 << 13) 221 #define DR7_FIXED_1 0x00000400 222 #define DR7_VOLATILE 0xffff2bff 223 224 #define PFERR_PRESENT_BIT 0 225 #define PFERR_WRITE_BIT 1 226 #define PFERR_USER_BIT 2 227 #define PFERR_RSVD_BIT 3 228 #define PFERR_FETCH_BIT 4 229 #define PFERR_PK_BIT 5 230 #define PFERR_GUEST_FINAL_BIT 32 231 #define PFERR_GUEST_PAGE_BIT 33 232 233 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 234 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 235 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 236 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 237 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 238 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 239 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 240 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 241 242 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 243 PFERR_WRITE_MASK | \ 244 PFERR_PRESENT_MASK) 245 246 /* apic attention bits */ 247 #define KVM_APIC_CHECK_VAPIC 0 248 /* 249 * The following bit is set with PV-EOI, unset on EOI. 250 * We detect PV-EOI changes by guest by comparing 251 * this bit with PV-EOI in guest memory. 252 * See the implementation in apic_update_pv_eoi. 253 */ 254 #define KVM_APIC_PV_EOI_PENDING 1 255 256 struct kvm_kernel_irq_routing_entry; 257 258 /* 259 * the pages used as guest page table on soft mmu are tracked by 260 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 261 * by indirect shadow page can not be more than 15 bits. 262 * 263 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 264 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 265 */ 266 union kvm_mmu_page_role { 267 u32 word; 268 struct { 269 unsigned level:4; 270 unsigned gpte_is_8_bytes:1; 271 unsigned quadrant:2; 272 unsigned direct:1; 273 unsigned access:3; 274 unsigned invalid:1; 275 unsigned nxe:1; 276 unsigned cr0_wp:1; 277 unsigned smep_andnot_wp:1; 278 unsigned smap_andnot_wp:1; 279 unsigned ad_disabled:1; 280 unsigned guest_mode:1; 281 unsigned :6; 282 283 /* 284 * This is left at the top of the word so that 285 * kvm_memslots_for_spte_role can extract it with a 286 * simple shift. While there is room, give it a whole 287 * byte so it is also faster to load it from memory. 288 */ 289 unsigned smm:8; 290 }; 291 }; 292 293 union kvm_mmu_extended_role { 294 /* 295 * This structure complements kvm_mmu_page_role caching everything needed for 296 * MMU configuration. If nothing in both these structures changed, MMU 297 * re-configuration can be skipped. @valid bit is set on first usage so we don't 298 * treat all-zero structure as valid data. 299 */ 300 u32 word; 301 struct { 302 unsigned int valid:1; 303 unsigned int execonly:1; 304 unsigned int cr0_pg:1; 305 unsigned int cr4_pae:1; 306 unsigned int cr4_pse:1; 307 unsigned int cr4_pke:1; 308 unsigned int cr4_smap:1; 309 unsigned int cr4_smep:1; 310 unsigned int maxphyaddr:6; 311 }; 312 }; 313 314 union kvm_mmu_role { 315 u64 as_u64; 316 struct { 317 union kvm_mmu_page_role base; 318 union kvm_mmu_extended_role ext; 319 }; 320 }; 321 322 struct kvm_rmap_head { 323 unsigned long val; 324 }; 325 326 struct kvm_pio_request { 327 unsigned long linear_rip; 328 unsigned long count; 329 int in; 330 int port; 331 int size; 332 }; 333 334 #define PT64_ROOT_MAX_LEVEL 5 335 336 struct rsvd_bits_validate { 337 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 338 u64 bad_mt_xwr; 339 }; 340 341 struct kvm_mmu_root_info { 342 gpa_t pgd; 343 hpa_t hpa; 344 }; 345 346 #define KVM_MMU_ROOT_INFO_INVALID \ 347 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 348 349 #define KVM_MMU_NUM_PREV_ROOTS 3 350 351 #define KVM_HAVE_MMU_RWLOCK 352 353 struct kvm_mmu_page; 354 355 /* 356 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 357 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 358 * current mmu mode. 359 */ 360 struct kvm_mmu { 361 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 362 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 363 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err, 364 bool prefault); 365 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 366 struct x86_exception *fault); 367 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 368 u32 access, struct x86_exception *exception); 369 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 370 struct x86_exception *exception); 371 int (*sync_page)(struct kvm_vcpu *vcpu, 372 struct kvm_mmu_page *sp); 373 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 374 hpa_t root_hpa; 375 gpa_t root_pgd; 376 union kvm_mmu_role mmu_role; 377 u8 root_level; 378 u8 shadow_root_level; 379 u8 ept_ad; 380 bool direct_map; 381 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 382 383 /* 384 * Bitmap; bit set = permission fault 385 * Byte index: page fault error code [4:1] 386 * Bit index: pte permissions in ACC_* format 387 */ 388 u8 permissions[16]; 389 390 /* 391 * The pkru_mask indicates if protection key checks are needed. It 392 * consists of 16 domains indexed by page fault error code bits [4:1], 393 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 394 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 395 */ 396 u32 pkru_mask; 397 398 u64 *pae_root; 399 u64 *lm_root; 400 401 /* 402 * check zero bits on shadow page table entries, these 403 * bits include not only hardware reserved bits but also 404 * the bits spte never used. 405 */ 406 struct rsvd_bits_validate shadow_zero_check; 407 408 struct rsvd_bits_validate guest_rsvd_check; 409 410 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 411 u8 last_nonleaf_level; 412 413 bool nx; 414 415 u64 pdptrs[4]; /* pae */ 416 }; 417 418 struct kvm_tlb_range { 419 u64 start_gfn; 420 u64 pages; 421 }; 422 423 enum pmc_type { 424 KVM_PMC_GP = 0, 425 KVM_PMC_FIXED, 426 }; 427 428 struct kvm_pmc { 429 enum pmc_type type; 430 u8 idx; 431 u64 counter; 432 u64 eventsel; 433 struct perf_event *perf_event; 434 struct kvm_vcpu *vcpu; 435 /* 436 * eventsel value for general purpose counters, 437 * ctrl value for fixed counters. 438 */ 439 u64 current_config; 440 }; 441 442 struct kvm_pmu { 443 unsigned nr_arch_gp_counters; 444 unsigned nr_arch_fixed_counters; 445 unsigned available_event_types; 446 u64 fixed_ctr_ctrl; 447 u64 global_ctrl; 448 u64 global_status; 449 u64 global_ovf_ctrl; 450 u64 counter_bitmask[2]; 451 u64 global_ctrl_mask; 452 u64 global_ovf_ctrl_mask; 453 u64 reserved_bits; 454 u8 version; 455 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 456 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 457 struct irq_work irq_work; 458 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 459 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 460 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 461 462 /* 463 * The gate to release perf_events not marked in 464 * pmc_in_use only once in a vcpu time slice. 465 */ 466 bool need_cleanup; 467 468 /* 469 * The total number of programmed perf_events and it helps to avoid 470 * redundant check before cleanup if guest don't use vPMU at all. 471 */ 472 u8 event_count; 473 }; 474 475 struct kvm_pmu_ops; 476 477 enum { 478 KVM_DEBUGREG_BP_ENABLED = 1, 479 KVM_DEBUGREG_WONT_EXIT = 2, 480 KVM_DEBUGREG_RELOAD = 4, 481 }; 482 483 struct kvm_mtrr_range { 484 u64 base; 485 u64 mask; 486 struct list_head node; 487 }; 488 489 struct kvm_mtrr { 490 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 491 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 492 u64 deftype; 493 494 struct list_head head; 495 }; 496 497 /* Hyper-V SynIC timer */ 498 struct kvm_vcpu_hv_stimer { 499 struct hrtimer timer; 500 int index; 501 union hv_stimer_config config; 502 u64 count; 503 u64 exp_time; 504 struct hv_message msg; 505 bool msg_pending; 506 }; 507 508 /* Hyper-V synthetic interrupt controller (SynIC)*/ 509 struct kvm_vcpu_hv_synic { 510 u64 version; 511 u64 control; 512 u64 msg_page; 513 u64 evt_page; 514 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 515 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 516 DECLARE_BITMAP(auto_eoi_bitmap, 256); 517 DECLARE_BITMAP(vec_bitmap, 256); 518 bool active; 519 bool dont_zero_synic_pages; 520 }; 521 522 /* Hyper-V per vcpu emulation context */ 523 struct kvm_vcpu_hv { 524 struct kvm_vcpu *vcpu; 525 u32 vp_index; 526 u64 hv_vapic; 527 s64 runtime_offset; 528 struct kvm_vcpu_hv_synic synic; 529 struct kvm_hyperv_exit exit; 530 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 531 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 532 cpumask_t tlb_flush; 533 }; 534 535 /* Xen HVM per vcpu emulation context */ 536 struct kvm_vcpu_xen { 537 u64 hypercall_rip; 538 u32 current_runstate; 539 bool vcpu_info_set; 540 bool vcpu_time_info_set; 541 bool runstate_set; 542 struct gfn_to_hva_cache vcpu_info_cache; 543 struct gfn_to_hva_cache vcpu_time_info_cache; 544 struct gfn_to_hva_cache runstate_cache; 545 u64 last_steal; 546 u64 runstate_entry_time; 547 u64 runstate_times[4]; 548 }; 549 550 struct kvm_vcpu_arch { 551 /* 552 * rip and regs accesses must go through 553 * kvm_{register,rip}_{read,write} functions. 554 */ 555 unsigned long regs[NR_VCPU_REGS]; 556 u32 regs_avail; 557 u32 regs_dirty; 558 559 unsigned long cr0; 560 unsigned long cr0_guest_owned_bits; 561 unsigned long cr2; 562 unsigned long cr3; 563 unsigned long cr4; 564 unsigned long cr4_guest_owned_bits; 565 unsigned long cr4_guest_rsvd_bits; 566 unsigned long cr8; 567 u32 host_pkru; 568 u32 pkru; 569 u32 hflags; 570 u64 efer; 571 u64 apic_base; 572 struct kvm_lapic *apic; /* kernel irqchip context */ 573 bool apicv_active; 574 bool load_eoi_exitmap_pending; 575 DECLARE_BITMAP(ioapic_handled_vectors, 256); 576 unsigned long apic_attention; 577 int32_t apic_arb_prio; 578 int mp_state; 579 u64 ia32_misc_enable_msr; 580 u64 smbase; 581 u64 smi_count; 582 bool tpr_access_reporting; 583 bool xsaves_enabled; 584 u64 ia32_xss; 585 u64 microcode_version; 586 u64 arch_capabilities; 587 u64 perf_capabilities; 588 589 /* 590 * Paging state of the vcpu 591 * 592 * If the vcpu runs in guest mode with two level paging this still saves 593 * the paging mode of the l1 guest. This context is always used to 594 * handle faults. 595 */ 596 struct kvm_mmu *mmu; 597 598 /* Non-nested MMU for L1 */ 599 struct kvm_mmu root_mmu; 600 601 /* L1 MMU when running nested */ 602 struct kvm_mmu guest_mmu; 603 604 /* 605 * Paging state of an L2 guest (used for nested npt) 606 * 607 * This context will save all necessary information to walk page tables 608 * of an L2 guest. This context is only initialized for page table 609 * walking and not for faulting since we never handle l2 page faults on 610 * the host. 611 */ 612 struct kvm_mmu nested_mmu; 613 614 /* 615 * Pointer to the mmu context currently used for 616 * gva_to_gpa translations. 617 */ 618 struct kvm_mmu *walk_mmu; 619 620 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 621 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 622 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 623 struct kvm_mmu_memory_cache mmu_page_header_cache; 624 625 /* 626 * QEMU userspace and the guest each have their own FPU state. 627 * In vcpu_run, we switch between the user and guest FPU contexts. 628 * While running a VCPU, the VCPU thread will have the guest FPU 629 * context. 630 * 631 * Note that while the PKRU state lives inside the fpu registers, 632 * it is switched out separately at VMENTER and VMEXIT time. The 633 * "guest_fpu" state here contains the guest FPU context, with the 634 * host PRKU bits. 635 */ 636 struct fpu *user_fpu; 637 struct fpu *guest_fpu; 638 639 u64 xcr0; 640 u64 guest_supported_xcr0; 641 642 struct kvm_pio_request pio; 643 void *pio_data; 644 void *guest_ins_data; 645 646 u8 event_exit_inst_len; 647 648 struct kvm_queued_exception { 649 bool pending; 650 bool injected; 651 bool has_error_code; 652 u8 nr; 653 u32 error_code; 654 unsigned long payload; 655 bool has_payload; 656 u8 nested_apf; 657 } exception; 658 659 struct kvm_queued_interrupt { 660 bool injected; 661 bool soft; 662 u8 nr; 663 } interrupt; 664 665 int halt_request; /* real mode on Intel only */ 666 667 int cpuid_nent; 668 struct kvm_cpuid_entry2 *cpuid_entries; 669 670 u64 reserved_gpa_bits; 671 int maxphyaddr; 672 int max_tdp_level; 673 674 /* emulate context */ 675 676 struct x86_emulate_ctxt *emulate_ctxt; 677 bool emulate_regs_need_sync_to_vcpu; 678 bool emulate_regs_need_sync_from_vcpu; 679 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 680 681 gpa_t time; 682 struct pvclock_vcpu_time_info hv_clock; 683 unsigned int hw_tsc_khz; 684 struct gfn_to_hva_cache pv_time; 685 bool pv_time_enabled; 686 /* set guest stopped flag in pvclock flags field */ 687 bool pvclock_set_guest_stopped_request; 688 689 struct { 690 u8 preempted; 691 u64 msr_val; 692 u64 last_steal; 693 struct gfn_to_pfn_cache cache; 694 } st; 695 696 u64 l1_tsc_offset; 697 u64 tsc_offset; 698 u64 last_guest_tsc; 699 u64 last_host_tsc; 700 u64 tsc_offset_adjustment; 701 u64 this_tsc_nsec; 702 u64 this_tsc_write; 703 u64 this_tsc_generation; 704 bool tsc_catchup; 705 bool tsc_always_catchup; 706 s8 virtual_tsc_shift; 707 u32 virtual_tsc_mult; 708 u32 virtual_tsc_khz; 709 s64 ia32_tsc_adjust_msr; 710 u64 msr_ia32_power_ctl; 711 u64 tsc_scaling_ratio; 712 713 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 714 unsigned nmi_pending; /* NMI queued after currently running handler */ 715 bool nmi_injected; /* Trying to inject an NMI this entry */ 716 bool smi_pending; /* SMI queued after currently running handler */ 717 718 struct kvm_mtrr mtrr_state; 719 u64 pat; 720 721 unsigned switch_db_regs; 722 unsigned long db[KVM_NR_DB_REGS]; 723 unsigned long dr6; 724 unsigned long dr7; 725 unsigned long eff_db[KVM_NR_DB_REGS]; 726 unsigned long guest_debug_dr7; 727 u64 msr_platform_info; 728 u64 msr_misc_features_enables; 729 730 u64 mcg_cap; 731 u64 mcg_status; 732 u64 mcg_ctl; 733 u64 mcg_ext_ctl; 734 u64 *mce_banks; 735 736 /* Cache MMIO info */ 737 u64 mmio_gva; 738 unsigned mmio_access; 739 gfn_t mmio_gfn; 740 u64 mmio_gen; 741 742 struct kvm_pmu pmu; 743 744 /* used for guest single stepping over the given code position */ 745 unsigned long singlestep_rip; 746 747 bool hyperv_enabled; 748 struct kvm_vcpu_hv *hyperv; 749 struct kvm_vcpu_xen xen; 750 751 cpumask_var_t wbinvd_dirty_mask; 752 753 unsigned long last_retry_eip; 754 unsigned long last_retry_addr; 755 756 struct { 757 bool halted; 758 gfn_t gfns[ASYNC_PF_PER_VCPU]; 759 struct gfn_to_hva_cache data; 760 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 761 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 762 u16 vec; 763 u32 id; 764 bool send_user_only; 765 u32 host_apf_flags; 766 unsigned long nested_apf_token; 767 bool delivery_as_pf_vmexit; 768 bool pageready_pending; 769 } apf; 770 771 /* OSVW MSRs (AMD only) */ 772 struct { 773 u64 length; 774 u64 status; 775 } osvw; 776 777 struct { 778 u64 msr_val; 779 struct gfn_to_hva_cache data; 780 } pv_eoi; 781 782 u64 msr_kvm_poll_control; 783 784 /* 785 * Indicates the guest is trying to write a gfn that contains one or 786 * more of the PTEs used to translate the write itself, i.e. the access 787 * is changing its own translation in the guest page tables. KVM exits 788 * to userspace if emulation of the faulting instruction fails and this 789 * flag is set, as KVM cannot make forward progress. 790 * 791 * If emulation fails for a write to guest page tables, KVM unprotects 792 * (zaps) the shadow page for the target gfn and resumes the guest to 793 * retry the non-emulatable instruction (on hardware). Unprotecting the 794 * gfn doesn't allow forward progress for a self-changing access because 795 * doing so also zaps the translation for the gfn, i.e. retrying the 796 * instruction will hit a !PRESENT fault, which results in a new shadow 797 * page and sends KVM back to square one. 798 */ 799 bool write_fault_to_shadow_pgtable; 800 801 /* set at EPT violation at this point */ 802 unsigned long exit_qualification; 803 804 /* pv related host specific info */ 805 struct { 806 bool pv_unhalted; 807 } pv; 808 809 int pending_ioapic_eoi; 810 int pending_external_vector; 811 812 /* be preempted when it's in kernel-mode(cpl=0) */ 813 bool preempted_in_kernel; 814 815 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 816 bool l1tf_flush_l1d; 817 818 /* Host CPU on which VM-entry was most recently attempted */ 819 unsigned int last_vmentry_cpu; 820 821 /* AMD MSRC001_0015 Hardware Configuration */ 822 u64 msr_hwcr; 823 824 /* pv related cpuid info */ 825 struct { 826 /* 827 * value of the eax register in the KVM_CPUID_FEATURES CPUID 828 * leaf. 829 */ 830 u32 features; 831 832 /* 833 * indicates whether pv emulation should be disabled if features 834 * are not present in the guest's cpuid 835 */ 836 bool enforce; 837 } pv_cpuid; 838 839 /* Protected Guests */ 840 bool guest_state_protected; 841 }; 842 843 struct kvm_lpage_info { 844 int disallow_lpage; 845 }; 846 847 struct kvm_arch_memory_slot { 848 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 849 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 850 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 851 }; 852 853 /* 854 * We use as the mode the number of bits allocated in the LDR for the 855 * logical processor ID. It happens that these are all powers of two. 856 * This makes it is very easy to detect cases where the APICs are 857 * configured for multiple modes; in that case, we cannot use the map and 858 * hence cannot use kvm_irq_delivery_to_apic_fast either. 859 */ 860 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 861 #define KVM_APIC_MODE_XAPIC_FLAT 8 862 #define KVM_APIC_MODE_X2APIC 16 863 864 struct kvm_apic_map { 865 struct rcu_head rcu; 866 u8 mode; 867 u32 max_apic_id; 868 union { 869 struct kvm_lapic *xapic_flat_map[8]; 870 struct kvm_lapic *xapic_cluster_map[16][4]; 871 }; 872 struct kvm_lapic *phys_map[]; 873 }; 874 875 /* Hyper-V synthetic debugger (SynDbg)*/ 876 struct kvm_hv_syndbg { 877 struct { 878 u64 control; 879 u64 status; 880 u64 send_page; 881 u64 recv_page; 882 u64 pending_page; 883 } control; 884 u64 options; 885 }; 886 887 /* Current state of Hyper-V TSC page clocksource */ 888 enum hv_tsc_page_status { 889 /* TSC page was not set up or disabled */ 890 HV_TSC_PAGE_UNSET = 0, 891 /* TSC page MSR was written by the guest, update pending */ 892 HV_TSC_PAGE_GUEST_CHANGED, 893 /* TSC page MSR was written by KVM userspace, update pending */ 894 HV_TSC_PAGE_HOST_CHANGED, 895 /* TSC page was properly set up and is currently active */ 896 HV_TSC_PAGE_SET, 897 /* TSC page is currently being updated and therefore is inactive */ 898 HV_TSC_PAGE_UPDATING, 899 /* TSC page was set up with an inaccessible GPA */ 900 HV_TSC_PAGE_BROKEN, 901 }; 902 903 /* Hyper-V emulation context */ 904 struct kvm_hv { 905 struct mutex hv_lock; 906 u64 hv_guest_os_id; 907 u64 hv_hypercall; 908 u64 hv_tsc_page; 909 enum hv_tsc_page_status hv_tsc_page_status; 910 911 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 912 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 913 u64 hv_crash_ctl; 914 915 struct ms_hyperv_tsc_page tsc_ref; 916 917 struct idr conn_to_evt; 918 919 u64 hv_reenlightenment_control; 920 u64 hv_tsc_emulation_control; 921 u64 hv_tsc_emulation_status; 922 923 /* How many vCPUs have VP index != vCPU index */ 924 atomic_t num_mismatched_vp_indexes; 925 926 struct hv_partition_assist_pg *hv_pa_pg; 927 struct kvm_hv_syndbg hv_syndbg; 928 }; 929 930 struct msr_bitmap_range { 931 u32 flags; 932 u32 nmsrs; 933 u32 base; 934 unsigned long *bitmap; 935 }; 936 937 /* Xen emulation context */ 938 struct kvm_xen { 939 bool long_mode; 940 bool shinfo_set; 941 u8 upcall_vector; 942 struct gfn_to_hva_cache shinfo_cache; 943 }; 944 945 enum kvm_irqchip_mode { 946 KVM_IRQCHIP_NONE, 947 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 948 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 949 }; 950 951 struct kvm_x86_msr_filter { 952 u8 count; 953 bool default_allow:1; 954 struct msr_bitmap_range ranges[16]; 955 }; 956 957 #define APICV_INHIBIT_REASON_DISABLE 0 958 #define APICV_INHIBIT_REASON_HYPERV 1 959 #define APICV_INHIBIT_REASON_NESTED 2 960 #define APICV_INHIBIT_REASON_IRQWIN 3 961 #define APICV_INHIBIT_REASON_PIT_REINJ 4 962 #define APICV_INHIBIT_REASON_X2APIC 5 963 964 struct kvm_arch { 965 unsigned long n_used_mmu_pages; 966 unsigned long n_requested_mmu_pages; 967 unsigned long n_max_mmu_pages; 968 unsigned int indirect_shadow_pages; 969 u8 mmu_valid_gen; 970 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 971 struct list_head active_mmu_pages; 972 struct list_head zapped_obsolete_pages; 973 struct list_head lpage_disallowed_mmu_pages; 974 struct kvm_page_track_notifier_node mmu_sp_tracker; 975 struct kvm_page_track_notifier_head track_notifier_head; 976 977 struct list_head assigned_dev_head; 978 struct iommu_domain *iommu_domain; 979 bool iommu_noncoherent; 980 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 981 atomic_t noncoherent_dma_count; 982 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 983 atomic_t assigned_device_count; 984 struct kvm_pic *vpic; 985 struct kvm_ioapic *vioapic; 986 struct kvm_pit *vpit; 987 atomic_t vapics_in_nmi_mode; 988 struct mutex apic_map_lock; 989 struct kvm_apic_map __rcu *apic_map; 990 atomic_t apic_map_dirty; 991 992 bool apic_access_page_done; 993 unsigned long apicv_inhibit_reasons; 994 995 gpa_t wall_clock; 996 997 bool mwait_in_guest; 998 bool hlt_in_guest; 999 bool pause_in_guest; 1000 bool cstate_in_guest; 1001 1002 unsigned long irq_sources_bitmap; 1003 s64 kvmclock_offset; 1004 raw_spinlock_t tsc_write_lock; 1005 u64 last_tsc_nsec; 1006 u64 last_tsc_write; 1007 u32 last_tsc_khz; 1008 u64 cur_tsc_nsec; 1009 u64 cur_tsc_write; 1010 u64 cur_tsc_offset; 1011 u64 cur_tsc_generation; 1012 int nr_vcpus_matched_tsc; 1013 1014 spinlock_t pvclock_gtod_sync_lock; 1015 bool use_master_clock; 1016 u64 master_kernel_ns; 1017 u64 master_cycle_now; 1018 struct delayed_work kvmclock_update_work; 1019 struct delayed_work kvmclock_sync_work; 1020 1021 struct kvm_xen_hvm_config xen_hvm_config; 1022 1023 /* reads protected by irq_srcu, writes by irq_lock */ 1024 struct hlist_head mask_notifier_list; 1025 1026 struct kvm_hv hyperv; 1027 struct kvm_xen xen; 1028 1029 #ifdef CONFIG_KVM_MMU_AUDIT 1030 int audit_point; 1031 #endif 1032 1033 bool backwards_tsc_observed; 1034 bool boot_vcpu_runs_old_kvmclock; 1035 u32 bsp_vcpu_id; 1036 1037 u64 disabled_quirks; 1038 int cpu_dirty_logging_count; 1039 1040 enum kvm_irqchip_mode irqchip_mode; 1041 u8 nr_reserved_ioapic_pins; 1042 1043 bool disabled_lapic_found; 1044 1045 bool x2apic_format; 1046 bool x2apic_broadcast_quirk_disabled; 1047 1048 bool guest_can_read_msr_platform_info; 1049 bool exception_payload_enabled; 1050 1051 bool bus_lock_detection_enabled; 1052 1053 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 1054 u32 user_space_msr_mask; 1055 struct kvm_x86_msr_filter __rcu *msr_filter; 1056 1057 struct kvm_pmu_event_filter __rcu *pmu_event_filter; 1058 struct task_struct *nx_lpage_recovery_thread; 1059 1060 #ifdef CONFIG_X86_64 1061 /* 1062 * Whether the TDP MMU is enabled for this VM. This contains a 1063 * snapshot of the TDP MMU module parameter from when the VM was 1064 * created and remains unchanged for the life of the VM. If this is 1065 * true, TDP MMU handler functions will run for various MMU 1066 * operations. 1067 */ 1068 bool tdp_mmu_enabled; 1069 1070 /* 1071 * List of struct kvmp_mmu_pages being used as roots. 1072 * All struct kvm_mmu_pages in the list should have 1073 * tdp_mmu_page set. 1074 * All struct kvm_mmu_pages in the list should have a positive 1075 * root_count except when a thread holds the MMU lock and is removing 1076 * an entry from the list. 1077 */ 1078 struct list_head tdp_mmu_roots; 1079 1080 /* 1081 * List of struct kvmp_mmu_pages not being used as roots. 1082 * All struct kvm_mmu_pages in the list should have 1083 * tdp_mmu_page set and a root_count of 0. 1084 */ 1085 struct list_head tdp_mmu_pages; 1086 1087 /* 1088 * Protects accesses to the following fields when the MMU lock 1089 * is held in read mode: 1090 * - tdp_mmu_pages (above) 1091 * - the link field of struct kvm_mmu_pages used by the TDP MMU 1092 * - lpage_disallowed_mmu_pages 1093 * - the lpage_disallowed_link field of struct kvm_mmu_pages used 1094 * by the TDP MMU 1095 * It is acceptable, but not necessary, to acquire this lock when 1096 * the thread holds the MMU lock in write mode. 1097 */ 1098 spinlock_t tdp_mmu_pages_lock; 1099 #endif /* CONFIG_X86_64 */ 1100 }; 1101 1102 struct kvm_vm_stat { 1103 ulong mmu_shadow_zapped; 1104 ulong mmu_pte_write; 1105 ulong mmu_pde_zapped; 1106 ulong mmu_flooded; 1107 ulong mmu_recycled; 1108 ulong mmu_cache_miss; 1109 ulong mmu_unsync; 1110 ulong remote_tlb_flush; 1111 ulong lpages; 1112 ulong nx_lpage_splits; 1113 ulong max_mmu_page_hash_collisions; 1114 }; 1115 1116 struct kvm_vcpu_stat { 1117 u64 pf_fixed; 1118 u64 pf_guest; 1119 u64 tlb_flush; 1120 u64 invlpg; 1121 1122 u64 exits; 1123 u64 io_exits; 1124 u64 mmio_exits; 1125 u64 signal_exits; 1126 u64 irq_window_exits; 1127 u64 nmi_window_exits; 1128 u64 l1d_flush; 1129 u64 halt_exits; 1130 u64 halt_successful_poll; 1131 u64 halt_attempted_poll; 1132 u64 halt_poll_invalid; 1133 u64 halt_wakeup; 1134 u64 request_irq_exits; 1135 u64 irq_exits; 1136 u64 host_state_reload; 1137 u64 fpu_reload; 1138 u64 insn_emulation; 1139 u64 insn_emulation_fail; 1140 u64 hypercalls; 1141 u64 irq_injections; 1142 u64 nmi_injections; 1143 u64 req_event; 1144 u64 halt_poll_success_ns; 1145 u64 halt_poll_fail_ns; 1146 }; 1147 1148 struct x86_instruction_info; 1149 1150 struct msr_data { 1151 bool host_initiated; 1152 u32 index; 1153 u64 data; 1154 }; 1155 1156 struct kvm_lapic_irq { 1157 u32 vector; 1158 u16 delivery_mode; 1159 u16 dest_mode; 1160 bool level; 1161 u16 trig_mode; 1162 u32 shorthand; 1163 u32 dest_id; 1164 bool msi_redir_hint; 1165 }; 1166 1167 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1168 { 1169 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1170 } 1171 1172 struct kvm_x86_ops { 1173 int (*hardware_enable)(void); 1174 void (*hardware_disable)(void); 1175 void (*hardware_unsetup)(void); 1176 bool (*cpu_has_accelerated_tpr)(void); 1177 bool (*has_emulated_msr)(struct kvm *kvm, u32 index); 1178 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1179 1180 unsigned int vm_size; 1181 int (*vm_init)(struct kvm *kvm); 1182 void (*vm_destroy)(struct kvm *kvm); 1183 1184 /* Create, but do not attach this VCPU */ 1185 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1186 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1187 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1188 1189 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1190 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1191 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1192 1193 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1194 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1195 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1196 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1197 void (*get_segment)(struct kvm_vcpu *vcpu, 1198 struct kvm_segment *var, int seg); 1199 int (*get_cpl)(struct kvm_vcpu *vcpu); 1200 void (*set_segment)(struct kvm_vcpu *vcpu, 1201 struct kvm_segment *var, int seg); 1202 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1203 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1204 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1205 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1206 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1207 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1208 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1209 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1210 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1211 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1212 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1213 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1214 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1215 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1216 1217 void (*tlb_flush_all)(struct kvm_vcpu *vcpu); 1218 void (*tlb_flush_current)(struct kvm_vcpu *vcpu); 1219 int (*tlb_remote_flush)(struct kvm *kvm); 1220 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1221 struct kvm_tlb_range *range); 1222 1223 /* 1224 * Flush any TLB entries associated with the given GVA. 1225 * Does not need to flush GPA->HPA mappings. 1226 * Can potentially get non-canonical addresses through INVLPGs, which 1227 * the implementation may choose to ignore if appropriate. 1228 */ 1229 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1230 1231 /* 1232 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1233 * does not need to flush GPA->HPA mappings. 1234 */ 1235 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu); 1236 1237 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu); 1238 int (*handle_exit)(struct kvm_vcpu *vcpu, 1239 enum exit_fastpath_completion exit_fastpath); 1240 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1241 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1242 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1243 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1244 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1245 unsigned char *hypercall_addr); 1246 void (*set_irq)(struct kvm_vcpu *vcpu); 1247 void (*set_nmi)(struct kvm_vcpu *vcpu); 1248 void (*queue_exception)(struct kvm_vcpu *vcpu); 1249 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1250 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1251 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1252 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1253 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1254 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1255 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1256 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1257 bool (*check_apicv_inhibit_reasons)(ulong bit); 1258 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate); 1259 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1260 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1261 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1262 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1263 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1264 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1265 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1266 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1267 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1268 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1269 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1270 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1271 1272 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, unsigned long pgd, 1273 int pgd_level); 1274 1275 bool (*has_wbinvd_exit)(void); 1276 1277 /* Returns actual tsc_offset set in active VMCS */ 1278 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1279 1280 /* 1281 * Retrieve somewhat arbitrary exit information. Intended to be used 1282 * only from within tracepoints to avoid VMREADs when tracing is off. 1283 */ 1284 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2, 1285 u32 *exit_int_info, u32 *exit_int_info_err_code); 1286 1287 int (*check_intercept)(struct kvm_vcpu *vcpu, 1288 struct x86_instruction_info *info, 1289 enum x86_intercept_stage stage, 1290 struct x86_exception *exception); 1291 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1292 1293 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1294 1295 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1296 1297 /* 1298 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero 1299 * value indicates CPU dirty logging is unsupported or disabled. 1300 */ 1301 int cpu_dirty_log_size; 1302 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu); 1303 1304 /* pmu operations of sub-arch */ 1305 const struct kvm_pmu_ops *pmu_ops; 1306 const struct kvm_x86_nested_ops *nested_ops; 1307 1308 /* 1309 * Architecture specific hooks for vCPU blocking due to 1310 * HLT instruction. 1311 * Returns for .pre_block(): 1312 * - 0 means continue to block the vCPU. 1313 * - 1 means we cannot block the vCPU since some event 1314 * happens during this period, such as, 'ON' bit in 1315 * posted-interrupts descriptor is set. 1316 */ 1317 int (*pre_block)(struct kvm_vcpu *vcpu); 1318 void (*post_block)(struct kvm_vcpu *vcpu); 1319 1320 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1321 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1322 1323 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1324 uint32_t guest_irq, bool set); 1325 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1326 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1327 1328 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1329 bool *expired); 1330 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1331 1332 void (*setup_mce)(struct kvm_vcpu *vcpu); 1333 1334 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1335 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1336 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1337 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1338 1339 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1340 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1341 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1342 1343 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1344 1345 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len); 1346 1347 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1348 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1349 1350 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1351 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1352 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); 1353 1354 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); 1355 }; 1356 1357 struct kvm_x86_nested_ops { 1358 int (*check_events)(struct kvm_vcpu *vcpu); 1359 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1360 int (*get_state)(struct kvm_vcpu *vcpu, 1361 struct kvm_nested_state __user *user_kvm_nested_state, 1362 unsigned user_data_size); 1363 int (*set_state)(struct kvm_vcpu *vcpu, 1364 struct kvm_nested_state __user *user_kvm_nested_state, 1365 struct kvm_nested_state *kvm_state); 1366 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1367 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1368 1369 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1370 uint16_t *vmcs_version); 1371 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1372 }; 1373 1374 struct kvm_x86_init_ops { 1375 int (*cpu_has_kvm_support)(void); 1376 int (*disabled_by_bios)(void); 1377 int (*check_processor_compatibility)(void); 1378 int (*hardware_setup)(void); 1379 1380 struct kvm_x86_ops *runtime_ops; 1381 }; 1382 1383 struct kvm_arch_async_pf { 1384 u32 token; 1385 gfn_t gfn; 1386 unsigned long cr3; 1387 bool direct_map; 1388 }; 1389 1390 extern u64 __read_mostly host_efer; 1391 extern bool __read_mostly allow_smaller_maxphyaddr; 1392 extern struct kvm_x86_ops kvm_x86_ops; 1393 1394 #define KVM_X86_OP(func) \ 1395 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func)); 1396 #define KVM_X86_OP_NULL KVM_X86_OP 1397 #include <asm/kvm-x86-ops.h> 1398 1399 static inline void kvm_ops_static_call_update(void) 1400 { 1401 #define KVM_X86_OP(func) \ 1402 static_call_update(kvm_x86_##func, kvm_x86_ops.func); 1403 #define KVM_X86_OP_NULL KVM_X86_OP 1404 #include <asm/kvm-x86-ops.h> 1405 } 1406 1407 #define __KVM_HAVE_ARCH_VM_ALLOC 1408 static inline struct kvm *kvm_arch_alloc_vm(void) 1409 { 1410 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1411 } 1412 void kvm_arch_free_vm(struct kvm *kvm); 1413 1414 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1415 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1416 { 1417 if (kvm_x86_ops.tlb_remote_flush && 1418 !static_call(kvm_x86_tlb_remote_flush)(kvm)) 1419 return 0; 1420 else 1421 return -ENOTSUPP; 1422 } 1423 1424 int kvm_mmu_module_init(void); 1425 void kvm_mmu_module_exit(void); 1426 1427 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1428 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1429 void kvm_mmu_init_vm(struct kvm *kvm); 1430 void kvm_mmu_uninit_vm(struct kvm *kvm); 1431 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1432 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1433 u64 acc_track_mask, u64 me_mask); 1434 1435 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1436 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1437 struct kvm_memory_slot *memslot, 1438 int start_level); 1439 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1440 const struct kvm_memory_slot *memslot); 1441 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1442 struct kvm_memory_slot *memslot); 1443 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1444 struct kvm_memory_slot *memslot); 1445 void kvm_mmu_zap_all(struct kvm *kvm); 1446 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1447 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1448 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1449 1450 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1451 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1452 1453 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1454 const void *val, int bytes); 1455 1456 struct kvm_irq_mask_notifier { 1457 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1458 int irq; 1459 struct hlist_node link; 1460 }; 1461 1462 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1463 struct kvm_irq_mask_notifier *kimn); 1464 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1465 struct kvm_irq_mask_notifier *kimn); 1466 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1467 bool mask); 1468 1469 extern bool tdp_enabled; 1470 1471 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1472 1473 /* control of guest tsc rate supported? */ 1474 extern bool kvm_has_tsc_control; 1475 /* maximum supported tsc_khz for guests */ 1476 extern u32 kvm_max_guest_tsc_khz; 1477 /* number of bits of the fractional part of the TSC scaling ratio */ 1478 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1479 /* maximum allowed value of TSC scaling ratio */ 1480 extern u64 kvm_max_tsc_scaling_ratio; 1481 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1482 extern u64 kvm_default_tsc_scaling_ratio; 1483 /* bus lock detection supported? */ 1484 extern bool kvm_has_bus_lock_exit; 1485 1486 extern u64 kvm_mce_cap_supported; 1487 1488 /* 1489 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1490 * userspace I/O) to indicate that the emulation context 1491 * should be reused as is, i.e. skip initialization of 1492 * emulation context, instruction fetch and decode. 1493 * 1494 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1495 * Indicates that only select instructions (tagged with 1496 * EmulateOnUD) should be emulated (to minimize the emulator 1497 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1498 * 1499 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1500 * decode the instruction length. For use *only* by 1501 * kvm_x86_ops.skip_emulated_instruction() implementations. 1502 * 1503 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1504 * retry native execution under certain conditions, 1505 * Can only be set in conjunction with EMULTYPE_PF. 1506 * 1507 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1508 * triggered by KVM's magic "force emulation" prefix, 1509 * which is opt in via module param (off by default). 1510 * Bypasses EmulateOnUD restriction despite emulating 1511 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1512 * Used to test the full emulator from userspace. 1513 * 1514 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1515 * backdoor emulation, which is opt in via module param. 1516 * VMware backdoor emulation handles select instructions 1517 * and reinjects the #GP for all other cases. 1518 * 1519 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1520 * case the CR2/GPA value pass on the stack is valid. 1521 */ 1522 #define EMULTYPE_NO_DECODE (1 << 0) 1523 #define EMULTYPE_TRAP_UD (1 << 1) 1524 #define EMULTYPE_SKIP (1 << 2) 1525 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1526 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1527 #define EMULTYPE_VMWARE_GP (1 << 5) 1528 #define EMULTYPE_PF (1 << 6) 1529 1530 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1531 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1532 void *insn, int insn_len); 1533 1534 void kvm_enable_efer_bits(u64); 1535 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1536 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1537 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1538 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1539 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1540 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1541 1542 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1543 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1544 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1545 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1546 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu); 1547 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1548 1549 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1550 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1551 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1552 1553 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1554 int reason, bool has_error_code, u32 error_code); 1555 1556 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu); 1557 1558 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0); 1559 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4); 1560 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1561 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1562 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1563 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1564 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1565 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1566 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1567 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1568 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1569 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1570 1571 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1572 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1573 1574 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1575 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1576 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1577 1578 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1579 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1580 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1581 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1582 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1583 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1584 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1585 struct x86_exception *fault); 1586 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1587 gfn_t gfn, void *data, int offset, int len, 1588 u32 access); 1589 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1590 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1591 1592 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1593 int irq_source_id, int level) 1594 { 1595 /* Logical OR for level trig interrupt */ 1596 if (level) 1597 __set_bit(irq_source_id, irq_state); 1598 else 1599 __clear_bit(irq_source_id, irq_state); 1600 1601 return !!(*irq_state); 1602 } 1603 1604 #define KVM_MMU_ROOT_CURRENT BIT(0) 1605 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1606 #define KVM_MMU_ROOTS_ALL (~0UL) 1607 1608 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1609 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1610 1611 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1612 1613 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1614 1615 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1616 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1617 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1618 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1619 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1620 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1621 ulong roots_to_free); 1622 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1623 struct x86_exception *exception); 1624 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1625 struct x86_exception *exception); 1626 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1627 struct x86_exception *exception); 1628 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1629 struct x86_exception *exception); 1630 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1631 struct x86_exception *exception); 1632 1633 bool kvm_apicv_activated(struct kvm *kvm); 1634 void kvm_apicv_init(struct kvm *kvm, bool enable); 1635 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1636 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1637 unsigned long bit); 1638 1639 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1640 1641 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1642 void *insn, int insn_len); 1643 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1644 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1645 gva_t gva, hpa_t root_hpa); 1646 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1647 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 1648 bool skip_mmu_sync); 1649 1650 void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 1651 int tdp_huge_page_level); 1652 1653 static inline u16 kvm_read_ldt(void) 1654 { 1655 u16 ldt; 1656 asm("sldt %0" : "=g"(ldt)); 1657 return ldt; 1658 } 1659 1660 static inline void kvm_load_ldt(u16 sel) 1661 { 1662 asm("lldt %0" : : "rm"(sel)); 1663 } 1664 1665 #ifdef CONFIG_X86_64 1666 static inline unsigned long read_msr(unsigned long msr) 1667 { 1668 u64 value; 1669 1670 rdmsrl(msr, value); 1671 return value; 1672 } 1673 #endif 1674 1675 static inline u32 get_rdx_init_val(void) 1676 { 1677 return 0x600; /* P6 family */ 1678 } 1679 1680 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1681 { 1682 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1683 } 1684 1685 #define TSS_IOPB_BASE_OFFSET 0x66 1686 #define TSS_BASE_SIZE 0x68 1687 #define TSS_IOPB_SIZE (65536 / 8) 1688 #define TSS_REDIRECTION_SIZE (256 / 8) 1689 #define RMODE_TSS_SIZE \ 1690 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1691 1692 enum { 1693 TASK_SWITCH_CALL = 0, 1694 TASK_SWITCH_IRET = 1, 1695 TASK_SWITCH_JMP = 2, 1696 TASK_SWITCH_GATE = 3, 1697 }; 1698 1699 #define HF_GIF_MASK (1 << 0) 1700 #define HF_NMI_MASK (1 << 3) 1701 #define HF_IRET_MASK (1 << 4) 1702 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1703 #define HF_SMM_MASK (1 << 6) 1704 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1705 1706 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1707 #define KVM_ADDRESS_SPACE_NUM 2 1708 1709 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1710 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1711 1712 asmlinkage void kvm_spurious_fault(void); 1713 1714 /* 1715 * Hardware virtualization extension instructions may fault if a 1716 * reboot turns off virtualization while processes are running. 1717 * Usually after catching the fault we just panic; during reboot 1718 * instead the instruction is ignored. 1719 */ 1720 #define __kvm_handle_fault_on_reboot(insn) \ 1721 "666: \n\t" \ 1722 insn "\n\t" \ 1723 "jmp 668f \n\t" \ 1724 "667: \n\t" \ 1725 "1: \n\t" \ 1726 ".pushsection .discard.instr_begin \n\t" \ 1727 ".long 1b - . \n\t" \ 1728 ".popsection \n\t" \ 1729 "call kvm_spurious_fault \n\t" \ 1730 "1: \n\t" \ 1731 ".pushsection .discard.instr_end \n\t" \ 1732 ".long 1b - . \n\t" \ 1733 ".popsection \n\t" \ 1734 "668: \n\t" \ 1735 _ASM_EXTABLE(666b, 667b) 1736 1737 #define KVM_ARCH_WANT_MMU_NOTIFIER 1738 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, 1739 unsigned flags); 1740 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1741 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1742 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1743 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1744 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1745 int kvm_cpu_has_extint(struct kvm_vcpu *v); 1746 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1747 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1748 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1749 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1750 1751 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1752 unsigned long ipi_bitmap_high, u32 min, 1753 unsigned long icr, int op_64_bit); 1754 1755 void kvm_define_user_return_msr(unsigned index, u32 msr); 1756 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1757 1758 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1759 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1760 1761 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1762 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1763 1764 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1765 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1766 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1767 unsigned long *vcpu_bitmap); 1768 1769 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1770 struct kvm_async_pf *work); 1771 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1772 struct kvm_async_pf *work); 1773 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1774 struct kvm_async_pf *work); 1775 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1776 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1777 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1778 1779 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1780 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1781 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1782 1783 int kvm_is_in_guest(void); 1784 1785 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, 1786 u32 size); 1787 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1788 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1789 1790 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1791 struct kvm_vcpu **dest_vcpu); 1792 1793 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1794 struct kvm_lapic_irq *irq); 1795 1796 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1797 { 1798 /* We can only post Fixed and LowPrio IRQs */ 1799 return (irq->delivery_mode == APIC_DM_FIXED || 1800 irq->delivery_mode == APIC_DM_LOWEST); 1801 } 1802 1803 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1804 { 1805 static_call_cond(kvm_x86_vcpu_blocking)(vcpu); 1806 } 1807 1808 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1809 { 1810 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu); 1811 } 1812 1813 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1814 1815 static inline int kvm_cpu_get_apicid(int mps_cpu) 1816 { 1817 #ifdef CONFIG_X86_LOCAL_APIC 1818 return default_cpu_present_to_apicid(mps_cpu); 1819 #else 1820 WARN_ON_ONCE(1); 1821 return BAD_APICID; 1822 #endif 1823 } 1824 1825 #define put_smstate(type, buf, offset, val) \ 1826 *(type *)((buf) + (offset) - 0x7e00) = val 1827 1828 #define GET_SMSTATE(type, buf, offset) \ 1829 (*(type *)((buf) + (offset) - 0x7e00)) 1830 1831 int kvm_cpu_dirty_log_size(void); 1832 1833 #endif /* _ASM_X86_KVM_HOST_H */ 1834