1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 21 #include <linux/kvm.h> 22 #include <linux/kvm_para.h> 23 #include <linux/kvm_types.h> 24 #include <linux/perf_event.h> 25 #include <linux/pvclock_gtod.h> 26 #include <linux/clocksource.h> 27 28 #include <asm/pvclock-abi.h> 29 #include <asm/desc.h> 30 #include <asm/mtrr.h> 31 #include <asm/msr-index.h> 32 #include <asm/asm.h> 33 34 #define KVM_MAX_VCPUS 255 35 #define KVM_SOFT_MAX_VCPUS 160 36 #define KVM_USER_MEM_SLOTS 509 37 /* memory slots that are not exposed to userspace */ 38 #define KVM_PRIVATE_MEM_SLOTS 3 39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 40 41 #define KVM_PIO_PAGE_OFFSET 1 42 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 43 44 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 45 46 #define CR0_RESERVED_BITS \ 47 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 48 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 49 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 50 51 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL 52 #define CR3_PCID_INVD BIT_64(63) 53 #define CR4_RESERVED_BITS \ 54 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 55 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 56 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 57 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 58 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP)) 59 60 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 61 62 63 64 #define INVALID_PAGE (~(hpa_t)0) 65 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 66 67 #define UNMAPPED_GVA (~(gpa_t)0) 68 69 /* KVM Hugepage definitions for x86 */ 70 #define KVM_NR_PAGE_SIZES 3 71 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 72 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 73 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 74 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 75 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 76 77 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 78 { 79 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 80 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 81 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 82 } 83 84 #define KVM_PERMILLE_MMU_PAGES 20 85 #define KVM_MIN_ALLOC_MMU_PAGES 64 86 #define KVM_MMU_HASH_SHIFT 10 87 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 88 #define KVM_MIN_FREE_MMU_PAGES 5 89 #define KVM_REFILL_PAGES 25 90 #define KVM_MAX_CPUID_ENTRIES 80 91 #define KVM_NR_FIXED_MTRR_REGION 88 92 #define KVM_NR_VAR_MTRR 8 93 94 #define ASYNC_PF_PER_VCPU 64 95 96 enum kvm_reg { 97 VCPU_REGS_RAX = 0, 98 VCPU_REGS_RCX = 1, 99 VCPU_REGS_RDX = 2, 100 VCPU_REGS_RBX = 3, 101 VCPU_REGS_RSP = 4, 102 VCPU_REGS_RBP = 5, 103 VCPU_REGS_RSI = 6, 104 VCPU_REGS_RDI = 7, 105 #ifdef CONFIG_X86_64 106 VCPU_REGS_R8 = 8, 107 VCPU_REGS_R9 = 9, 108 VCPU_REGS_R10 = 10, 109 VCPU_REGS_R11 = 11, 110 VCPU_REGS_R12 = 12, 111 VCPU_REGS_R13 = 13, 112 VCPU_REGS_R14 = 14, 113 VCPU_REGS_R15 = 15, 114 #endif 115 VCPU_REGS_RIP, 116 NR_VCPU_REGS 117 }; 118 119 enum kvm_reg_ex { 120 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 121 VCPU_EXREG_CR3, 122 VCPU_EXREG_RFLAGS, 123 VCPU_EXREG_SEGMENTS, 124 }; 125 126 enum { 127 VCPU_SREG_ES, 128 VCPU_SREG_CS, 129 VCPU_SREG_SS, 130 VCPU_SREG_DS, 131 VCPU_SREG_FS, 132 VCPU_SREG_GS, 133 VCPU_SREG_TR, 134 VCPU_SREG_LDTR, 135 }; 136 137 #include <asm/kvm_emulate.h> 138 139 #define KVM_NR_MEM_OBJS 40 140 141 #define KVM_NR_DB_REGS 4 142 143 #define DR6_BD (1 << 13) 144 #define DR6_BS (1 << 14) 145 #define DR6_RTM (1 << 16) 146 #define DR6_FIXED_1 0xfffe0ff0 147 #define DR6_INIT 0xffff0ff0 148 #define DR6_VOLATILE 0x0001e00f 149 150 #define DR7_BP_EN_MASK 0x000000ff 151 #define DR7_GE (1 << 9) 152 #define DR7_GD (1 << 13) 153 #define DR7_FIXED_1 0x00000400 154 #define DR7_VOLATILE 0xffff2bff 155 156 #define PFERR_PRESENT_BIT 0 157 #define PFERR_WRITE_BIT 1 158 #define PFERR_USER_BIT 2 159 #define PFERR_RSVD_BIT 3 160 #define PFERR_FETCH_BIT 4 161 162 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 163 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 164 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 165 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 166 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 167 168 /* apic attention bits */ 169 #define KVM_APIC_CHECK_VAPIC 0 170 /* 171 * The following bit is set with PV-EOI, unset on EOI. 172 * We detect PV-EOI changes by guest by comparing 173 * this bit with PV-EOI in guest memory. 174 * See the implementation in apic_update_pv_eoi. 175 */ 176 #define KVM_APIC_PV_EOI_PENDING 1 177 178 /* 179 * We don't want allocation failures within the mmu code, so we preallocate 180 * enough memory for a single page fault in a cache. 181 */ 182 struct kvm_mmu_memory_cache { 183 int nobjs; 184 void *objects[KVM_NR_MEM_OBJS]; 185 }; 186 187 /* 188 * kvm_mmu_page_role, below, is defined as: 189 * 190 * bits 0:3 - total guest paging levels (2-4, or zero for real mode) 191 * bits 4:7 - page table level for this shadow (1-4) 192 * bits 8:9 - page table quadrant for 2-level guests 193 * bit 16 - direct mapping of virtual to physical mapping at gfn 194 * used for real mode and two-dimensional paging 195 * bits 17:19 - common access permissions for all ptes in this shadow page 196 */ 197 union kvm_mmu_page_role { 198 unsigned word; 199 struct { 200 unsigned level:4; 201 unsigned cr4_pae:1; 202 unsigned quadrant:2; 203 unsigned pad_for_nice_hex_output:6; 204 unsigned direct:1; 205 unsigned access:3; 206 unsigned invalid:1; 207 unsigned nxe:1; 208 unsigned cr0_wp:1; 209 unsigned smep_andnot_wp:1; 210 }; 211 }; 212 213 struct kvm_mmu_page { 214 struct list_head link; 215 struct hlist_node hash_link; 216 217 /* 218 * The following two entries are used to key the shadow page in the 219 * hash table. 220 */ 221 gfn_t gfn; 222 union kvm_mmu_page_role role; 223 224 u64 *spt; 225 /* hold the gfn of each spte inside spt */ 226 gfn_t *gfns; 227 bool unsync; 228 int root_count; /* Currently serving as active root */ 229 unsigned int unsync_children; 230 unsigned long parent_ptes; /* Reverse mapping for parent_pte */ 231 232 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 233 unsigned long mmu_valid_gen; 234 235 DECLARE_BITMAP(unsync_child_bitmap, 512); 236 237 #ifdef CONFIG_X86_32 238 /* 239 * Used out of the mmu-lock to avoid reading spte values while an 240 * update is in progress; see the comments in __get_spte_lockless(). 241 */ 242 int clear_spte_count; 243 #endif 244 245 /* Number of writes since the last time traversal visited this page. */ 246 int write_flooding_count; 247 }; 248 249 struct kvm_pio_request { 250 unsigned long count; 251 int in; 252 int port; 253 int size; 254 }; 255 256 /* 257 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level 258 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu 259 * mode. 260 */ 261 struct kvm_mmu { 262 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 263 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 264 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 265 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 266 bool prefault); 267 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 268 struct x86_exception *fault); 269 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 270 struct x86_exception *exception); 271 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 272 struct x86_exception *exception); 273 int (*sync_page)(struct kvm_vcpu *vcpu, 274 struct kvm_mmu_page *sp); 275 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 276 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 277 u64 *spte, const void *pte); 278 hpa_t root_hpa; 279 int root_level; 280 int shadow_root_level; 281 union kvm_mmu_page_role base_role; 282 bool direct_map; 283 284 /* 285 * Bitmap; bit set = permission fault 286 * Byte index: page fault error code [4:1] 287 * Bit index: pte permissions in ACC_* format 288 */ 289 u8 permissions[16]; 290 291 u64 *pae_root; 292 u64 *lm_root; 293 u64 rsvd_bits_mask[2][4]; 294 u64 bad_mt_xwr; 295 296 /* 297 * Bitmap: bit set = last pte in walk 298 * index[0:1]: level (zero-based) 299 * index[2]: pte.ps 300 */ 301 u8 last_pte_bitmap; 302 303 bool nx; 304 305 u64 pdptrs[4]; /* pae */ 306 }; 307 308 enum pmc_type { 309 KVM_PMC_GP = 0, 310 KVM_PMC_FIXED, 311 }; 312 313 struct kvm_pmc { 314 enum pmc_type type; 315 u8 idx; 316 u64 counter; 317 u64 eventsel; 318 struct perf_event *perf_event; 319 struct kvm_vcpu *vcpu; 320 }; 321 322 struct kvm_pmu { 323 unsigned nr_arch_gp_counters; 324 unsigned nr_arch_fixed_counters; 325 unsigned available_event_types; 326 u64 fixed_ctr_ctrl; 327 u64 global_ctrl; 328 u64 global_status; 329 u64 global_ovf_ctrl; 330 u64 counter_bitmask[2]; 331 u64 global_ctrl_mask; 332 u64 reserved_bits; 333 u8 version; 334 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 335 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 336 struct irq_work irq_work; 337 u64 reprogram_pmi; 338 }; 339 340 enum { 341 KVM_DEBUGREG_BP_ENABLED = 1, 342 KVM_DEBUGREG_WONT_EXIT = 2, 343 KVM_DEBUGREG_RELOAD = 4, 344 }; 345 346 struct kvm_vcpu_arch { 347 /* 348 * rip and regs accesses must go through 349 * kvm_{register,rip}_{read,write} functions. 350 */ 351 unsigned long regs[NR_VCPU_REGS]; 352 u32 regs_avail; 353 u32 regs_dirty; 354 355 unsigned long cr0; 356 unsigned long cr0_guest_owned_bits; 357 unsigned long cr2; 358 unsigned long cr3; 359 unsigned long cr4; 360 unsigned long cr4_guest_owned_bits; 361 unsigned long cr8; 362 u32 hflags; 363 u64 efer; 364 u64 apic_base; 365 struct kvm_lapic *apic; /* kernel irqchip context */ 366 unsigned long apic_attention; 367 int32_t apic_arb_prio; 368 int mp_state; 369 u64 ia32_misc_enable_msr; 370 bool tpr_access_reporting; 371 u64 ia32_xss; 372 373 /* 374 * Paging state of the vcpu 375 * 376 * If the vcpu runs in guest mode with two level paging this still saves 377 * the paging mode of the l1 guest. This context is always used to 378 * handle faults. 379 */ 380 struct kvm_mmu mmu; 381 382 /* 383 * Paging state of an L2 guest (used for nested npt) 384 * 385 * This context will save all necessary information to walk page tables 386 * of the an L2 guest. This context is only initialized for page table 387 * walking and not for faulting since we never handle l2 page faults on 388 * the host. 389 */ 390 struct kvm_mmu nested_mmu; 391 392 /* 393 * Pointer to the mmu context currently used for 394 * gva_to_gpa translations. 395 */ 396 struct kvm_mmu *walk_mmu; 397 398 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 399 struct kvm_mmu_memory_cache mmu_page_cache; 400 struct kvm_mmu_memory_cache mmu_page_header_cache; 401 402 struct fpu guest_fpu; 403 u64 xcr0; 404 u64 guest_supported_xcr0; 405 u32 guest_xstate_size; 406 407 struct kvm_pio_request pio; 408 void *pio_data; 409 410 u8 event_exit_inst_len; 411 412 struct kvm_queued_exception { 413 bool pending; 414 bool has_error_code; 415 bool reinject; 416 u8 nr; 417 u32 error_code; 418 } exception; 419 420 struct kvm_queued_interrupt { 421 bool pending; 422 bool soft; 423 u8 nr; 424 } interrupt; 425 426 int halt_request; /* real mode on Intel only */ 427 428 int cpuid_nent; 429 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 430 431 int maxphyaddr; 432 433 /* emulate context */ 434 435 struct x86_emulate_ctxt emulate_ctxt; 436 bool emulate_regs_need_sync_to_vcpu; 437 bool emulate_regs_need_sync_from_vcpu; 438 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 439 440 gpa_t time; 441 struct pvclock_vcpu_time_info hv_clock; 442 unsigned int hw_tsc_khz; 443 struct gfn_to_hva_cache pv_time; 444 bool pv_time_enabled; 445 /* set guest stopped flag in pvclock flags field */ 446 bool pvclock_set_guest_stopped_request; 447 448 struct { 449 u64 msr_val; 450 u64 last_steal; 451 u64 accum_steal; 452 struct gfn_to_hva_cache stime; 453 struct kvm_steal_time steal; 454 } st; 455 456 u64 last_guest_tsc; 457 u64 last_host_tsc; 458 u64 tsc_offset_adjustment; 459 u64 this_tsc_nsec; 460 u64 this_tsc_write; 461 u64 this_tsc_generation; 462 bool tsc_catchup; 463 bool tsc_always_catchup; 464 s8 virtual_tsc_shift; 465 u32 virtual_tsc_mult; 466 u32 virtual_tsc_khz; 467 s64 ia32_tsc_adjust_msr; 468 469 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 470 unsigned nmi_pending; /* NMI queued after currently running handler */ 471 bool nmi_injected; /* Trying to inject an NMI this entry */ 472 473 struct mtrr_state_type mtrr_state; 474 u64 pat; 475 476 unsigned switch_db_regs; 477 unsigned long db[KVM_NR_DB_REGS]; 478 unsigned long dr6; 479 unsigned long dr7; 480 unsigned long eff_db[KVM_NR_DB_REGS]; 481 unsigned long guest_debug_dr7; 482 483 u64 mcg_cap; 484 u64 mcg_status; 485 u64 mcg_ctl; 486 u64 *mce_banks; 487 488 /* Cache MMIO info */ 489 u64 mmio_gva; 490 unsigned access; 491 gfn_t mmio_gfn; 492 u64 mmio_gen; 493 494 struct kvm_pmu pmu; 495 496 /* used for guest single stepping over the given code position */ 497 unsigned long singlestep_rip; 498 499 /* fields used by HYPER-V emulation */ 500 u64 hv_vapic; 501 502 cpumask_var_t wbinvd_dirty_mask; 503 504 unsigned long last_retry_eip; 505 unsigned long last_retry_addr; 506 507 struct { 508 bool halted; 509 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 510 struct gfn_to_hva_cache data; 511 u64 msr_val; 512 u32 id; 513 bool send_user_only; 514 } apf; 515 516 /* OSVW MSRs (AMD only) */ 517 struct { 518 u64 length; 519 u64 status; 520 } osvw; 521 522 struct { 523 u64 msr_val; 524 struct gfn_to_hva_cache data; 525 } pv_eoi; 526 527 /* 528 * Indicate whether the access faults on its page table in guest 529 * which is set when fix page fault and used to detect unhandeable 530 * instruction. 531 */ 532 bool write_fault_to_shadow_pgtable; 533 534 /* set at EPT violation at this point */ 535 unsigned long exit_qualification; 536 537 /* pv related host specific info */ 538 struct { 539 bool pv_unhalted; 540 } pv; 541 }; 542 543 struct kvm_lpage_info { 544 int write_count; 545 }; 546 547 struct kvm_arch_memory_slot { 548 unsigned long *rmap[KVM_NR_PAGE_SIZES]; 549 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 550 }; 551 552 /* 553 * We use as the mode the number of bits allocated in the LDR for the 554 * logical processor ID. It happens that these are all powers of two. 555 * This makes it is very easy to detect cases where the APICs are 556 * configured for multiple modes; in that case, we cannot use the map and 557 * hence cannot use kvm_irq_delivery_to_apic_fast either. 558 */ 559 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 560 #define KVM_APIC_MODE_XAPIC_FLAT 8 561 #define KVM_APIC_MODE_X2APIC 16 562 563 struct kvm_apic_map { 564 struct rcu_head rcu; 565 u8 mode; 566 struct kvm_lapic *phys_map[256]; 567 /* first index is cluster id second is cpu id in a cluster */ 568 struct kvm_lapic *logical_map[16][16]; 569 }; 570 571 struct kvm_arch { 572 unsigned int n_used_mmu_pages; 573 unsigned int n_requested_mmu_pages; 574 unsigned int n_max_mmu_pages; 575 unsigned int indirect_shadow_pages; 576 unsigned long mmu_valid_gen; 577 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 578 /* 579 * Hash table of struct kvm_mmu_page. 580 */ 581 struct list_head active_mmu_pages; 582 struct list_head zapped_obsolete_pages; 583 584 struct list_head assigned_dev_head; 585 struct iommu_domain *iommu_domain; 586 bool iommu_noncoherent; 587 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 588 atomic_t noncoherent_dma_count; 589 struct kvm_pic *vpic; 590 struct kvm_ioapic *vioapic; 591 struct kvm_pit *vpit; 592 int vapics_in_nmi_mode; 593 struct mutex apic_map_lock; 594 struct kvm_apic_map *apic_map; 595 596 unsigned int tss_addr; 597 bool apic_access_page_done; 598 599 gpa_t wall_clock; 600 601 bool ept_identity_pagetable_done; 602 gpa_t ept_identity_map_addr; 603 604 unsigned long irq_sources_bitmap; 605 s64 kvmclock_offset; 606 raw_spinlock_t tsc_write_lock; 607 u64 last_tsc_nsec; 608 u64 last_tsc_write; 609 u32 last_tsc_khz; 610 u64 cur_tsc_nsec; 611 u64 cur_tsc_write; 612 u64 cur_tsc_offset; 613 u64 cur_tsc_generation; 614 int nr_vcpus_matched_tsc; 615 616 spinlock_t pvclock_gtod_sync_lock; 617 bool use_master_clock; 618 u64 master_kernel_ns; 619 cycle_t master_cycle_now; 620 struct delayed_work kvmclock_update_work; 621 struct delayed_work kvmclock_sync_work; 622 623 struct kvm_xen_hvm_config xen_hvm_config; 624 625 /* reads protected by irq_srcu, writes by irq_lock */ 626 struct hlist_head mask_notifier_list; 627 628 /* fields used by HYPER-V emulation */ 629 u64 hv_guest_os_id; 630 u64 hv_hypercall; 631 u64 hv_tsc_page; 632 633 #ifdef CONFIG_KVM_MMU_AUDIT 634 int audit_point; 635 #endif 636 637 bool boot_vcpu_runs_old_kvmclock; 638 }; 639 640 struct kvm_vm_stat { 641 u32 mmu_shadow_zapped; 642 u32 mmu_pte_write; 643 u32 mmu_pte_updated; 644 u32 mmu_pde_zapped; 645 u32 mmu_flooded; 646 u32 mmu_recycled; 647 u32 mmu_cache_miss; 648 u32 mmu_unsync; 649 u32 remote_tlb_flush; 650 u32 lpages; 651 }; 652 653 struct kvm_vcpu_stat { 654 u32 pf_fixed; 655 u32 pf_guest; 656 u32 tlb_flush; 657 u32 invlpg; 658 659 u32 exits; 660 u32 io_exits; 661 u32 mmio_exits; 662 u32 signal_exits; 663 u32 irq_window_exits; 664 u32 nmi_window_exits; 665 u32 halt_exits; 666 u32 halt_successful_poll; 667 u32 halt_wakeup; 668 u32 request_irq_exits; 669 u32 irq_exits; 670 u32 host_state_reload; 671 u32 efer_reload; 672 u32 fpu_reload; 673 u32 insn_emulation; 674 u32 insn_emulation_fail; 675 u32 hypercalls; 676 u32 irq_injections; 677 u32 nmi_injections; 678 }; 679 680 struct x86_instruction_info; 681 682 struct msr_data { 683 bool host_initiated; 684 u32 index; 685 u64 data; 686 }; 687 688 struct kvm_lapic_irq { 689 u32 vector; 690 u32 delivery_mode; 691 u32 dest_mode; 692 u32 level; 693 u32 trig_mode; 694 u32 shorthand; 695 u32 dest_id; 696 }; 697 698 struct kvm_x86_ops { 699 int (*cpu_has_kvm_support)(void); /* __init */ 700 int (*disabled_by_bios)(void); /* __init */ 701 int (*hardware_enable)(void); 702 void (*hardware_disable)(void); 703 void (*check_processor_compatibility)(void *rtn); 704 int (*hardware_setup)(void); /* __init */ 705 void (*hardware_unsetup)(void); /* __exit */ 706 bool (*cpu_has_accelerated_tpr)(void); 707 void (*cpuid_update)(struct kvm_vcpu *vcpu); 708 709 /* Create, but do not attach this VCPU */ 710 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 711 void (*vcpu_free)(struct kvm_vcpu *vcpu); 712 void (*vcpu_reset)(struct kvm_vcpu *vcpu); 713 714 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 715 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 716 void (*vcpu_put)(struct kvm_vcpu *vcpu); 717 718 void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu); 719 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); 720 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 721 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 722 void (*get_segment)(struct kvm_vcpu *vcpu, 723 struct kvm_segment *var, int seg); 724 int (*get_cpl)(struct kvm_vcpu *vcpu); 725 void (*set_segment)(struct kvm_vcpu *vcpu, 726 struct kvm_segment *var, int seg); 727 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 728 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 729 void (*decache_cr3)(struct kvm_vcpu *vcpu); 730 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 731 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 732 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 733 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 734 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 735 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 736 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 737 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 738 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 739 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 740 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 741 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 742 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 743 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 744 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 745 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 746 void (*fpu_deactivate)(struct kvm_vcpu *vcpu); 747 748 void (*tlb_flush)(struct kvm_vcpu *vcpu); 749 750 void (*run)(struct kvm_vcpu *vcpu); 751 int (*handle_exit)(struct kvm_vcpu *vcpu); 752 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 753 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 754 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 755 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 756 unsigned char *hypercall_addr); 757 void (*set_irq)(struct kvm_vcpu *vcpu); 758 void (*set_nmi)(struct kvm_vcpu *vcpu); 759 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, 760 bool has_error_code, u32 error_code, 761 bool reinject); 762 void (*cancel_injection)(struct kvm_vcpu *vcpu); 763 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 764 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 765 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 766 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 767 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 768 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 769 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 770 int (*vm_has_apicv)(struct kvm *kvm); 771 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 772 void (*hwapic_isr_update)(struct kvm *kvm, int isr); 773 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 774 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set); 775 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 776 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 777 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 778 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 779 int (*get_tdp_level)(void); 780 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 781 int (*get_lpage_level)(void); 782 bool (*rdtscp_supported)(void); 783 bool (*invpcid_supported)(void); 784 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host); 785 786 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 787 788 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 789 790 bool (*has_wbinvd_exit)(void); 791 792 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale); 793 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu); 794 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 795 796 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc); 797 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc); 798 799 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 800 801 int (*check_intercept)(struct kvm_vcpu *vcpu, 802 struct x86_instruction_info *info, 803 enum x86_intercept_stage stage); 804 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 805 bool (*mpx_supported)(void); 806 bool (*xsaves_supported)(void); 807 808 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 809 810 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 811 812 /* 813 * Arch-specific dirty logging hooks. These hooks are only supposed to 814 * be valid if the specific arch has hardware-accelerated dirty logging 815 * mechanism. Currently only for PML on VMX. 816 * 817 * - slot_enable_log_dirty: 818 * called when enabling log dirty mode for the slot. 819 * - slot_disable_log_dirty: 820 * called when disabling log dirty mode for the slot. 821 * also called when slot is created with log dirty disabled. 822 * - flush_log_dirty: 823 * called before reporting dirty_bitmap to userspace. 824 * - enable_log_dirty_pt_masked: 825 * called when reenabling log dirty for the GFNs in the mask after 826 * corresponding bits are cleared in slot->dirty_bitmap. 827 */ 828 void (*slot_enable_log_dirty)(struct kvm *kvm, 829 struct kvm_memory_slot *slot); 830 void (*slot_disable_log_dirty)(struct kvm *kvm, 831 struct kvm_memory_slot *slot); 832 void (*flush_log_dirty)(struct kvm *kvm); 833 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 834 struct kvm_memory_slot *slot, 835 gfn_t offset, unsigned long mask); 836 }; 837 838 struct kvm_arch_async_pf { 839 u32 token; 840 gfn_t gfn; 841 unsigned long cr3; 842 bool direct_map; 843 }; 844 845 extern struct kvm_x86_ops *kvm_x86_ops; 846 847 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu, 848 s64 adjustment) 849 { 850 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false); 851 } 852 853 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment) 854 { 855 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true); 856 } 857 858 int kvm_mmu_module_init(void); 859 void kvm_mmu_module_exit(void); 860 861 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 862 int kvm_mmu_create(struct kvm_vcpu *vcpu); 863 void kvm_mmu_setup(struct kvm_vcpu *vcpu); 864 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 865 u64 dirty_mask, u64 nx_mask, u64 x_mask); 866 867 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 868 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 869 struct kvm_memory_slot *memslot); 870 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 871 struct kvm_memory_slot *memslot); 872 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 873 struct kvm_memory_slot *memslot); 874 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 875 struct kvm_memory_slot *memslot); 876 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 877 struct kvm_memory_slot *memslot); 878 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 879 struct kvm_memory_slot *slot, 880 gfn_t gfn_offset, unsigned long mask); 881 void kvm_mmu_zap_all(struct kvm *kvm); 882 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm); 883 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 884 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 885 886 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 887 888 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 889 const void *val, int bytes); 890 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); 891 892 struct kvm_irq_mask_notifier { 893 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 894 int irq; 895 struct hlist_node link; 896 }; 897 898 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 899 struct kvm_irq_mask_notifier *kimn); 900 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 901 struct kvm_irq_mask_notifier *kimn); 902 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 903 bool mask); 904 905 extern bool tdp_enabled; 906 907 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 908 909 /* control of guest tsc rate supported? */ 910 extern bool kvm_has_tsc_control; 911 /* minimum supported tsc_khz for guests */ 912 extern u32 kvm_min_guest_tsc_khz; 913 /* maximum supported tsc_khz for guests */ 914 extern u32 kvm_max_guest_tsc_khz; 915 916 enum emulation_result { 917 EMULATE_DONE, /* no further processing */ 918 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 919 EMULATE_FAIL, /* can't emulate this instruction */ 920 }; 921 922 #define EMULTYPE_NO_DECODE (1 << 0) 923 #define EMULTYPE_TRAP_UD (1 << 1) 924 #define EMULTYPE_SKIP (1 << 2) 925 #define EMULTYPE_RETRY (1 << 3) 926 #define EMULTYPE_NO_REEXECUTE (1 << 4) 927 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 928 int emulation_type, void *insn, int insn_len); 929 930 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 931 int emulation_type) 932 { 933 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0); 934 } 935 936 void kvm_enable_efer_bits(u64); 937 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 938 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); 939 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 940 941 struct x86_emulate_ctxt; 942 943 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); 944 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 945 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 946 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 947 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 948 949 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 950 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 951 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 952 953 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 954 int reason, bool has_error_code, u32 error_code); 955 956 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 957 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 958 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 959 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 960 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 961 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 962 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 963 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 964 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 965 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 966 967 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); 968 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 969 970 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 971 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 972 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 973 974 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 975 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 976 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 977 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 978 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 979 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 980 gfn_t gfn, void *data, int offset, int len, 981 u32 access); 982 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 983 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 984 985 static inline int __kvm_irq_line_state(unsigned long *irq_state, 986 int irq_source_id, int level) 987 { 988 /* Logical OR for level trig interrupt */ 989 if (level) 990 __set_bit(irq_source_id, irq_state); 991 else 992 __clear_bit(irq_source_id, irq_state); 993 994 return !!(*irq_state); 995 } 996 997 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 998 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 999 1000 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1001 1002 int fx_init(struct kvm_vcpu *vcpu); 1003 1004 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 1005 const u8 *new, int bytes); 1006 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1007 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1008 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1009 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1010 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1011 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1012 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1013 struct x86_exception *exception); 1014 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1015 struct x86_exception *exception); 1016 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1017 struct x86_exception *exception); 1018 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1019 struct x86_exception *exception); 1020 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1021 struct x86_exception *exception); 1022 1023 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1024 1025 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code, 1026 void *insn, int insn_len); 1027 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1028 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu); 1029 1030 void kvm_enable_tdp(void); 1031 void kvm_disable_tdp(void); 1032 1033 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1034 struct x86_exception *exception) 1035 { 1036 return gpa; 1037 } 1038 1039 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1040 { 1041 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1042 1043 return (struct kvm_mmu_page *)page_private(page); 1044 } 1045 1046 static inline u16 kvm_read_ldt(void) 1047 { 1048 u16 ldt; 1049 asm("sldt %0" : "=g"(ldt)); 1050 return ldt; 1051 } 1052 1053 static inline void kvm_load_ldt(u16 sel) 1054 { 1055 asm("lldt %0" : : "rm"(sel)); 1056 } 1057 1058 #ifdef CONFIG_X86_64 1059 static inline unsigned long read_msr(unsigned long msr) 1060 { 1061 u64 value; 1062 1063 rdmsrl(msr, value); 1064 return value; 1065 } 1066 #endif 1067 1068 static inline u32 get_rdx_init_val(void) 1069 { 1070 return 0x600; /* P6 family */ 1071 } 1072 1073 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1074 { 1075 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1076 } 1077 1078 static inline u64 get_canonical(u64 la) 1079 { 1080 return ((int64_t)la << 16) >> 16; 1081 } 1082 1083 static inline bool is_noncanonical_address(u64 la) 1084 { 1085 #ifdef CONFIG_X86_64 1086 return get_canonical(la) != la; 1087 #else 1088 return false; 1089 #endif 1090 } 1091 1092 #define TSS_IOPB_BASE_OFFSET 0x66 1093 #define TSS_BASE_SIZE 0x68 1094 #define TSS_IOPB_SIZE (65536 / 8) 1095 #define TSS_REDIRECTION_SIZE (256 / 8) 1096 #define RMODE_TSS_SIZE \ 1097 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1098 1099 enum { 1100 TASK_SWITCH_CALL = 0, 1101 TASK_SWITCH_IRET = 1, 1102 TASK_SWITCH_JMP = 2, 1103 TASK_SWITCH_GATE = 3, 1104 }; 1105 1106 #define HF_GIF_MASK (1 << 0) 1107 #define HF_HIF_MASK (1 << 1) 1108 #define HF_VINTR_MASK (1 << 2) 1109 #define HF_NMI_MASK (1 << 3) 1110 #define HF_IRET_MASK (1 << 4) 1111 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1112 1113 /* 1114 * Hardware virtualization extension instructions may fault if a 1115 * reboot turns off virtualization while processes are running. 1116 * Trap the fault and ignore the instruction if that happens. 1117 */ 1118 asmlinkage void kvm_spurious_fault(void); 1119 1120 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1121 "666: " insn "\n\t" \ 1122 "668: \n\t" \ 1123 ".pushsection .fixup, \"ax\" \n" \ 1124 "667: \n\t" \ 1125 cleanup_insn "\n\t" \ 1126 "cmpb $0, kvm_rebooting \n\t" \ 1127 "jne 668b \n\t" \ 1128 __ASM_SIZE(push) " $666b \n\t" \ 1129 "call kvm_spurious_fault \n\t" \ 1130 ".popsection \n\t" \ 1131 _ASM_EXTABLE(666b, 667b) 1132 1133 #define __kvm_handle_fault_on_reboot(insn) \ 1134 ____kvm_handle_fault_on_reboot(insn, "") 1135 1136 #define KVM_ARCH_WANT_MMU_NOTIFIER 1137 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1138 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1139 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1140 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1141 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1142 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1143 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1144 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1145 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1146 void kvm_vcpu_reset(struct kvm_vcpu *vcpu); 1147 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1148 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm, 1149 unsigned long address); 1150 1151 void kvm_define_shared_msr(unsigned index, u32 msr); 1152 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1153 1154 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1155 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1156 1157 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1158 struct kvm_async_pf *work); 1159 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1160 struct kvm_async_pf *work); 1161 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1162 struct kvm_async_pf *work); 1163 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1164 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1165 1166 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1167 1168 int kvm_is_in_guest(void); 1169 1170 void kvm_pmu_init(struct kvm_vcpu *vcpu); 1171 void kvm_pmu_destroy(struct kvm_vcpu *vcpu); 1172 void kvm_pmu_reset(struct kvm_vcpu *vcpu); 1173 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu); 1174 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr); 1175 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data); 1176 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info); 1177 int kvm_pmu_check_pmc(struct kvm_vcpu *vcpu, unsigned pmc); 1178 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data); 1179 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu); 1180 void kvm_deliver_pmi(struct kvm_vcpu *vcpu); 1181 1182 #endif /* _ASM_X86_KVM_HOST_H */ 1183