1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 21 #include <linux/kvm.h> 22 #include <linux/kvm_para.h> 23 #include <linux/kvm_types.h> 24 #include <linux/perf_event.h> 25 #include <linux/pvclock_gtod.h> 26 #include <linux/clocksource.h> 27 #include <linux/irqbypass.h> 28 #include <linux/hyperv.h> 29 30 #include <asm/apic.h> 31 #include <asm/pvclock-abi.h> 32 #include <asm/desc.h> 33 #include <asm/mtrr.h> 34 #include <asm/msr-index.h> 35 #include <asm/asm.h> 36 #include <asm/kvm_page_track.h> 37 38 #define KVM_MAX_VCPUS 255 39 #define KVM_SOFT_MAX_VCPUS 160 40 #define KVM_USER_MEM_SLOTS 509 41 /* memory slots that are not exposed to userspace */ 42 #define KVM_PRIVATE_MEM_SLOTS 3 43 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 44 45 #define KVM_PIO_PAGE_OFFSET 1 46 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 47 #define KVM_HALT_POLL_NS_DEFAULT 400000 48 49 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 50 51 /* x86-specific vcpu->requests bit members */ 52 #define KVM_REQ_MIGRATE_TIMER 8 53 #define KVM_REQ_REPORT_TPR_ACCESS 9 54 #define KVM_REQ_TRIPLE_FAULT 10 55 #define KVM_REQ_MMU_SYNC 11 56 #define KVM_REQ_CLOCK_UPDATE 12 57 #define KVM_REQ_DEACTIVATE_FPU 13 58 #define KVM_REQ_EVENT 14 59 #define KVM_REQ_APF_HALT 15 60 #define KVM_REQ_STEAL_UPDATE 16 61 #define KVM_REQ_NMI 17 62 #define KVM_REQ_PMU 18 63 #define KVM_REQ_PMI 19 64 #define KVM_REQ_SMI 20 65 #define KVM_REQ_MASTERCLOCK_UPDATE 21 66 #define KVM_REQ_MCLOCK_INPROGRESS 22 67 #define KVM_REQ_SCAN_IOAPIC 23 68 #define KVM_REQ_GLOBAL_CLOCK_UPDATE 24 69 #define KVM_REQ_APIC_PAGE_RELOAD 25 70 #define KVM_REQ_HV_CRASH 26 71 #define KVM_REQ_IOAPIC_EOI_EXIT 27 72 #define KVM_REQ_HV_RESET 28 73 #define KVM_REQ_HV_EXIT 29 74 #define KVM_REQ_HV_STIMER 30 75 76 #define CR0_RESERVED_BITS \ 77 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 78 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 79 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 80 81 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL 82 #define CR3_PCID_INVD BIT_64(63) 83 #define CR4_RESERVED_BITS \ 84 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 85 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 86 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 87 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 88 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP \ 89 | X86_CR4_PKE)) 90 91 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 92 93 94 95 #define INVALID_PAGE (~(hpa_t)0) 96 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 97 98 #define UNMAPPED_GVA (~(gpa_t)0) 99 100 /* KVM Hugepage definitions for x86 */ 101 #define KVM_NR_PAGE_SIZES 3 102 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 103 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 104 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 105 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 106 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 107 108 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 109 { 110 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 111 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 112 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 113 } 114 115 #define KVM_PERMILLE_MMU_PAGES 20 116 #define KVM_MIN_ALLOC_MMU_PAGES 64 117 #define KVM_MMU_HASH_SHIFT 10 118 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 119 #define KVM_MIN_FREE_MMU_PAGES 5 120 #define KVM_REFILL_PAGES 25 121 #define KVM_MAX_CPUID_ENTRIES 80 122 #define KVM_NR_FIXED_MTRR_REGION 88 123 #define KVM_NR_VAR_MTRR 8 124 125 #define ASYNC_PF_PER_VCPU 64 126 127 enum kvm_reg { 128 VCPU_REGS_RAX = 0, 129 VCPU_REGS_RCX = 1, 130 VCPU_REGS_RDX = 2, 131 VCPU_REGS_RBX = 3, 132 VCPU_REGS_RSP = 4, 133 VCPU_REGS_RBP = 5, 134 VCPU_REGS_RSI = 6, 135 VCPU_REGS_RDI = 7, 136 #ifdef CONFIG_X86_64 137 VCPU_REGS_R8 = 8, 138 VCPU_REGS_R9 = 9, 139 VCPU_REGS_R10 = 10, 140 VCPU_REGS_R11 = 11, 141 VCPU_REGS_R12 = 12, 142 VCPU_REGS_R13 = 13, 143 VCPU_REGS_R14 = 14, 144 VCPU_REGS_R15 = 15, 145 #endif 146 VCPU_REGS_RIP, 147 NR_VCPU_REGS 148 }; 149 150 enum kvm_reg_ex { 151 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 152 VCPU_EXREG_CR3, 153 VCPU_EXREG_RFLAGS, 154 VCPU_EXREG_SEGMENTS, 155 }; 156 157 enum { 158 VCPU_SREG_ES, 159 VCPU_SREG_CS, 160 VCPU_SREG_SS, 161 VCPU_SREG_DS, 162 VCPU_SREG_FS, 163 VCPU_SREG_GS, 164 VCPU_SREG_TR, 165 VCPU_SREG_LDTR, 166 }; 167 168 #include <asm/kvm_emulate.h> 169 170 #define KVM_NR_MEM_OBJS 40 171 172 #define KVM_NR_DB_REGS 4 173 174 #define DR6_BD (1 << 13) 175 #define DR6_BS (1 << 14) 176 #define DR6_RTM (1 << 16) 177 #define DR6_FIXED_1 0xfffe0ff0 178 #define DR6_INIT 0xffff0ff0 179 #define DR6_VOLATILE 0x0001e00f 180 181 #define DR7_BP_EN_MASK 0x000000ff 182 #define DR7_GE (1 << 9) 183 #define DR7_GD (1 << 13) 184 #define DR7_FIXED_1 0x00000400 185 #define DR7_VOLATILE 0xffff2bff 186 187 #define PFERR_PRESENT_BIT 0 188 #define PFERR_WRITE_BIT 1 189 #define PFERR_USER_BIT 2 190 #define PFERR_RSVD_BIT 3 191 #define PFERR_FETCH_BIT 4 192 #define PFERR_PK_BIT 5 193 194 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 195 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 196 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 197 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 198 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 199 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 200 201 /* apic attention bits */ 202 #define KVM_APIC_CHECK_VAPIC 0 203 /* 204 * The following bit is set with PV-EOI, unset on EOI. 205 * We detect PV-EOI changes by guest by comparing 206 * this bit with PV-EOI in guest memory. 207 * See the implementation in apic_update_pv_eoi. 208 */ 209 #define KVM_APIC_PV_EOI_PENDING 1 210 211 struct kvm_kernel_irq_routing_entry; 212 213 /* 214 * We don't want allocation failures within the mmu code, so we preallocate 215 * enough memory for a single page fault in a cache. 216 */ 217 struct kvm_mmu_memory_cache { 218 int nobjs; 219 void *objects[KVM_NR_MEM_OBJS]; 220 }; 221 222 /* 223 * the pages used as guest page table on soft mmu are tracked by 224 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 225 * by indirect shadow page can not be more than 15 bits. 226 * 227 * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access, 228 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 229 */ 230 union kvm_mmu_page_role { 231 unsigned word; 232 struct { 233 unsigned level:4; 234 unsigned cr4_pae:1; 235 unsigned quadrant:2; 236 unsigned direct:1; 237 unsigned access:3; 238 unsigned invalid:1; 239 unsigned nxe:1; 240 unsigned cr0_wp:1; 241 unsigned smep_andnot_wp:1; 242 unsigned smap_andnot_wp:1; 243 unsigned :8; 244 245 /* 246 * This is left at the top of the word so that 247 * kvm_memslots_for_spte_role can extract it with a 248 * simple shift. While there is room, give it a whole 249 * byte so it is also faster to load it from memory. 250 */ 251 unsigned smm:8; 252 }; 253 }; 254 255 struct kvm_rmap_head { 256 unsigned long val; 257 }; 258 259 struct kvm_mmu_page { 260 struct list_head link; 261 struct hlist_node hash_link; 262 263 /* 264 * The following two entries are used to key the shadow page in the 265 * hash table. 266 */ 267 gfn_t gfn; 268 union kvm_mmu_page_role role; 269 270 u64 *spt; 271 /* hold the gfn of each spte inside spt */ 272 gfn_t *gfns; 273 bool unsync; 274 int root_count; /* Currently serving as active root */ 275 unsigned int unsync_children; 276 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 277 278 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 279 unsigned long mmu_valid_gen; 280 281 DECLARE_BITMAP(unsync_child_bitmap, 512); 282 283 #ifdef CONFIG_X86_32 284 /* 285 * Used out of the mmu-lock to avoid reading spte values while an 286 * update is in progress; see the comments in __get_spte_lockless(). 287 */ 288 int clear_spte_count; 289 #endif 290 291 /* Number of writes since the last time traversal visited this page. */ 292 atomic_t write_flooding_count; 293 }; 294 295 struct kvm_pio_request { 296 unsigned long count; 297 int in; 298 int port; 299 int size; 300 }; 301 302 struct rsvd_bits_validate { 303 u64 rsvd_bits_mask[2][4]; 304 u64 bad_mt_xwr; 305 }; 306 307 /* 308 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level 309 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu 310 * mode. 311 */ 312 struct kvm_mmu { 313 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 314 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 315 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 316 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 317 bool prefault); 318 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 319 struct x86_exception *fault); 320 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 321 struct x86_exception *exception); 322 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 323 struct x86_exception *exception); 324 int (*sync_page)(struct kvm_vcpu *vcpu, 325 struct kvm_mmu_page *sp); 326 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 327 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 328 u64 *spte, const void *pte); 329 hpa_t root_hpa; 330 int root_level; 331 int shadow_root_level; 332 union kvm_mmu_page_role base_role; 333 bool direct_map; 334 335 /* 336 * Bitmap; bit set = permission fault 337 * Byte index: page fault error code [4:1] 338 * Bit index: pte permissions in ACC_* format 339 */ 340 u8 permissions[16]; 341 342 /* 343 * The pkru_mask indicates if protection key checks are needed. It 344 * consists of 16 domains indexed by page fault error code bits [4:1], 345 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 346 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 347 */ 348 u32 pkru_mask; 349 350 u64 *pae_root; 351 u64 *lm_root; 352 353 /* 354 * check zero bits on shadow page table entries, these 355 * bits include not only hardware reserved bits but also 356 * the bits spte never used. 357 */ 358 struct rsvd_bits_validate shadow_zero_check; 359 360 struct rsvd_bits_validate guest_rsvd_check; 361 362 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 363 u8 last_nonleaf_level; 364 365 bool nx; 366 367 u64 pdptrs[4]; /* pae */ 368 }; 369 370 enum pmc_type { 371 KVM_PMC_GP = 0, 372 KVM_PMC_FIXED, 373 }; 374 375 struct kvm_pmc { 376 enum pmc_type type; 377 u8 idx; 378 u64 counter; 379 u64 eventsel; 380 struct perf_event *perf_event; 381 struct kvm_vcpu *vcpu; 382 }; 383 384 struct kvm_pmu { 385 unsigned nr_arch_gp_counters; 386 unsigned nr_arch_fixed_counters; 387 unsigned available_event_types; 388 u64 fixed_ctr_ctrl; 389 u64 global_ctrl; 390 u64 global_status; 391 u64 global_ovf_ctrl; 392 u64 counter_bitmask[2]; 393 u64 global_ctrl_mask; 394 u64 reserved_bits; 395 u8 version; 396 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 397 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 398 struct irq_work irq_work; 399 u64 reprogram_pmi; 400 }; 401 402 struct kvm_pmu_ops; 403 404 enum { 405 KVM_DEBUGREG_BP_ENABLED = 1, 406 KVM_DEBUGREG_WONT_EXIT = 2, 407 KVM_DEBUGREG_RELOAD = 4, 408 }; 409 410 struct kvm_mtrr_range { 411 u64 base; 412 u64 mask; 413 struct list_head node; 414 }; 415 416 struct kvm_mtrr { 417 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 418 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 419 u64 deftype; 420 421 struct list_head head; 422 }; 423 424 /* Hyper-V SynIC timer */ 425 struct kvm_vcpu_hv_stimer { 426 struct hrtimer timer; 427 int index; 428 u64 config; 429 u64 count; 430 u64 exp_time; 431 struct hv_message msg; 432 bool msg_pending; 433 }; 434 435 /* Hyper-V synthetic interrupt controller (SynIC)*/ 436 struct kvm_vcpu_hv_synic { 437 u64 version; 438 u64 control; 439 u64 msg_page; 440 u64 evt_page; 441 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 442 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 443 DECLARE_BITMAP(auto_eoi_bitmap, 256); 444 DECLARE_BITMAP(vec_bitmap, 256); 445 bool active; 446 }; 447 448 /* Hyper-V per vcpu emulation context */ 449 struct kvm_vcpu_hv { 450 u64 hv_vapic; 451 s64 runtime_offset; 452 struct kvm_vcpu_hv_synic synic; 453 struct kvm_hyperv_exit exit; 454 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 455 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 456 }; 457 458 struct kvm_vcpu_arch { 459 /* 460 * rip and regs accesses must go through 461 * kvm_{register,rip}_{read,write} functions. 462 */ 463 unsigned long regs[NR_VCPU_REGS]; 464 u32 regs_avail; 465 u32 regs_dirty; 466 467 unsigned long cr0; 468 unsigned long cr0_guest_owned_bits; 469 unsigned long cr2; 470 unsigned long cr3; 471 unsigned long cr4; 472 unsigned long cr4_guest_owned_bits; 473 unsigned long cr8; 474 u32 hflags; 475 u64 efer; 476 u64 apic_base; 477 struct kvm_lapic *apic; /* kernel irqchip context */ 478 bool apicv_active; 479 DECLARE_BITMAP(ioapic_handled_vectors, 256); 480 unsigned long apic_attention; 481 int32_t apic_arb_prio; 482 int mp_state; 483 u64 ia32_misc_enable_msr; 484 u64 smbase; 485 bool tpr_access_reporting; 486 u64 ia32_xss; 487 488 /* 489 * Paging state of the vcpu 490 * 491 * If the vcpu runs in guest mode with two level paging this still saves 492 * the paging mode of the l1 guest. This context is always used to 493 * handle faults. 494 */ 495 struct kvm_mmu mmu; 496 497 /* 498 * Paging state of an L2 guest (used for nested npt) 499 * 500 * This context will save all necessary information to walk page tables 501 * of the an L2 guest. This context is only initialized for page table 502 * walking and not for faulting since we never handle l2 page faults on 503 * the host. 504 */ 505 struct kvm_mmu nested_mmu; 506 507 /* 508 * Pointer to the mmu context currently used for 509 * gva_to_gpa translations. 510 */ 511 struct kvm_mmu *walk_mmu; 512 513 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 514 struct kvm_mmu_memory_cache mmu_page_cache; 515 struct kvm_mmu_memory_cache mmu_page_header_cache; 516 517 struct fpu guest_fpu; 518 u64 xcr0; 519 u64 guest_supported_xcr0; 520 u32 guest_xstate_size; 521 522 struct kvm_pio_request pio; 523 void *pio_data; 524 525 u8 event_exit_inst_len; 526 527 struct kvm_queued_exception { 528 bool pending; 529 bool has_error_code; 530 bool reinject; 531 u8 nr; 532 u32 error_code; 533 } exception; 534 535 struct kvm_queued_interrupt { 536 bool pending; 537 bool soft; 538 u8 nr; 539 } interrupt; 540 541 int halt_request; /* real mode on Intel only */ 542 543 int cpuid_nent; 544 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 545 546 int maxphyaddr; 547 548 /* emulate context */ 549 550 struct x86_emulate_ctxt emulate_ctxt; 551 bool emulate_regs_need_sync_to_vcpu; 552 bool emulate_regs_need_sync_from_vcpu; 553 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 554 555 gpa_t time; 556 struct pvclock_vcpu_time_info hv_clock; 557 unsigned int hw_tsc_khz; 558 struct gfn_to_hva_cache pv_time; 559 bool pv_time_enabled; 560 /* set guest stopped flag in pvclock flags field */ 561 bool pvclock_set_guest_stopped_request; 562 563 struct { 564 u64 msr_val; 565 u64 last_steal; 566 struct gfn_to_hva_cache stime; 567 struct kvm_steal_time steal; 568 } st; 569 570 u64 last_guest_tsc; 571 u64 last_host_tsc; 572 u64 tsc_offset_adjustment; 573 u64 this_tsc_nsec; 574 u64 this_tsc_write; 575 u64 this_tsc_generation; 576 bool tsc_catchup; 577 bool tsc_always_catchup; 578 s8 virtual_tsc_shift; 579 u32 virtual_tsc_mult; 580 u32 virtual_tsc_khz; 581 s64 ia32_tsc_adjust_msr; 582 u64 tsc_scaling_ratio; 583 584 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 585 unsigned nmi_pending; /* NMI queued after currently running handler */ 586 bool nmi_injected; /* Trying to inject an NMI this entry */ 587 bool smi_pending; /* SMI queued after currently running handler */ 588 589 struct kvm_mtrr mtrr_state; 590 u64 pat; 591 592 unsigned switch_db_regs; 593 unsigned long db[KVM_NR_DB_REGS]; 594 unsigned long dr6; 595 unsigned long dr7; 596 unsigned long eff_db[KVM_NR_DB_REGS]; 597 unsigned long guest_debug_dr7; 598 599 u64 mcg_cap; 600 u64 mcg_status; 601 u64 mcg_ctl; 602 u64 *mce_banks; 603 604 /* Cache MMIO info */ 605 u64 mmio_gva; 606 unsigned access; 607 gfn_t mmio_gfn; 608 u64 mmio_gen; 609 610 struct kvm_pmu pmu; 611 612 /* used for guest single stepping over the given code position */ 613 unsigned long singlestep_rip; 614 615 struct kvm_vcpu_hv hyperv; 616 617 cpumask_var_t wbinvd_dirty_mask; 618 619 unsigned long last_retry_eip; 620 unsigned long last_retry_addr; 621 622 struct { 623 bool halted; 624 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 625 struct gfn_to_hva_cache data; 626 u64 msr_val; 627 u32 id; 628 bool send_user_only; 629 } apf; 630 631 /* OSVW MSRs (AMD only) */ 632 struct { 633 u64 length; 634 u64 status; 635 } osvw; 636 637 struct { 638 u64 msr_val; 639 struct gfn_to_hva_cache data; 640 } pv_eoi; 641 642 /* 643 * Indicate whether the access faults on its page table in guest 644 * which is set when fix page fault and used to detect unhandeable 645 * instruction. 646 */ 647 bool write_fault_to_shadow_pgtable; 648 649 /* set at EPT violation at this point */ 650 unsigned long exit_qualification; 651 652 /* pv related host specific info */ 653 struct { 654 bool pv_unhalted; 655 } pv; 656 657 int pending_ioapic_eoi; 658 int pending_external_vector; 659 }; 660 661 struct kvm_lpage_info { 662 int disallow_lpage; 663 }; 664 665 struct kvm_arch_memory_slot { 666 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 667 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 668 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 669 }; 670 671 /* 672 * We use as the mode the number of bits allocated in the LDR for the 673 * logical processor ID. It happens that these are all powers of two. 674 * This makes it is very easy to detect cases where the APICs are 675 * configured for multiple modes; in that case, we cannot use the map and 676 * hence cannot use kvm_irq_delivery_to_apic_fast either. 677 */ 678 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 679 #define KVM_APIC_MODE_XAPIC_FLAT 8 680 #define KVM_APIC_MODE_X2APIC 16 681 682 struct kvm_apic_map { 683 struct rcu_head rcu; 684 u8 mode; 685 struct kvm_lapic *phys_map[256]; 686 /* first index is cluster id second is cpu id in a cluster */ 687 struct kvm_lapic *logical_map[16][16]; 688 }; 689 690 /* Hyper-V emulation context */ 691 struct kvm_hv { 692 u64 hv_guest_os_id; 693 u64 hv_hypercall; 694 u64 hv_tsc_page; 695 696 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 697 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 698 u64 hv_crash_ctl; 699 }; 700 701 struct kvm_arch { 702 unsigned int n_used_mmu_pages; 703 unsigned int n_requested_mmu_pages; 704 unsigned int n_max_mmu_pages; 705 unsigned int indirect_shadow_pages; 706 unsigned long mmu_valid_gen; 707 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 708 /* 709 * Hash table of struct kvm_mmu_page. 710 */ 711 struct list_head active_mmu_pages; 712 struct list_head zapped_obsolete_pages; 713 struct kvm_page_track_notifier_node mmu_sp_tracker; 714 struct kvm_page_track_notifier_head track_notifier_head; 715 716 struct list_head assigned_dev_head; 717 struct iommu_domain *iommu_domain; 718 bool iommu_noncoherent; 719 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 720 atomic_t noncoherent_dma_count; 721 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 722 atomic_t assigned_device_count; 723 struct kvm_pic *vpic; 724 struct kvm_ioapic *vioapic; 725 struct kvm_pit *vpit; 726 atomic_t vapics_in_nmi_mode; 727 struct mutex apic_map_lock; 728 struct kvm_apic_map *apic_map; 729 730 unsigned int tss_addr; 731 bool apic_access_page_done; 732 733 gpa_t wall_clock; 734 735 bool ept_identity_pagetable_done; 736 gpa_t ept_identity_map_addr; 737 738 unsigned long irq_sources_bitmap; 739 s64 kvmclock_offset; 740 raw_spinlock_t tsc_write_lock; 741 u64 last_tsc_nsec; 742 u64 last_tsc_write; 743 u32 last_tsc_khz; 744 u64 cur_tsc_nsec; 745 u64 cur_tsc_write; 746 u64 cur_tsc_offset; 747 u64 cur_tsc_generation; 748 int nr_vcpus_matched_tsc; 749 750 spinlock_t pvclock_gtod_sync_lock; 751 bool use_master_clock; 752 u64 master_kernel_ns; 753 cycle_t master_cycle_now; 754 struct delayed_work kvmclock_update_work; 755 struct delayed_work kvmclock_sync_work; 756 757 struct kvm_xen_hvm_config xen_hvm_config; 758 759 /* reads protected by irq_srcu, writes by irq_lock */ 760 struct hlist_head mask_notifier_list; 761 762 struct kvm_hv hyperv; 763 764 #ifdef CONFIG_KVM_MMU_AUDIT 765 int audit_point; 766 #endif 767 768 bool boot_vcpu_runs_old_kvmclock; 769 u32 bsp_vcpu_id; 770 771 u64 disabled_quirks; 772 773 bool irqchip_split; 774 u8 nr_reserved_ioapic_pins; 775 776 bool disabled_lapic_found; 777 778 /* Struct members for AVIC */ 779 u32 ldr_mode; 780 struct page *avic_logical_id_table_page; 781 struct page *avic_physical_id_table_page; 782 }; 783 784 struct kvm_vm_stat { 785 u32 mmu_shadow_zapped; 786 u32 mmu_pte_write; 787 u32 mmu_pte_updated; 788 u32 mmu_pde_zapped; 789 u32 mmu_flooded; 790 u32 mmu_recycled; 791 u32 mmu_cache_miss; 792 u32 mmu_unsync; 793 u32 remote_tlb_flush; 794 u32 lpages; 795 }; 796 797 struct kvm_vcpu_stat { 798 u32 pf_fixed; 799 u32 pf_guest; 800 u32 tlb_flush; 801 u32 invlpg; 802 803 u32 exits; 804 u32 io_exits; 805 u32 mmio_exits; 806 u32 signal_exits; 807 u32 irq_window_exits; 808 u32 nmi_window_exits; 809 u32 halt_exits; 810 u32 halt_successful_poll; 811 u32 halt_attempted_poll; 812 u32 halt_poll_invalid; 813 u32 halt_wakeup; 814 u32 request_irq_exits; 815 u32 irq_exits; 816 u32 host_state_reload; 817 u32 efer_reload; 818 u32 fpu_reload; 819 u32 insn_emulation; 820 u32 insn_emulation_fail; 821 u32 hypercalls; 822 u32 irq_injections; 823 u32 nmi_injections; 824 }; 825 826 struct x86_instruction_info; 827 828 struct msr_data { 829 bool host_initiated; 830 u32 index; 831 u64 data; 832 }; 833 834 struct kvm_lapic_irq { 835 u32 vector; 836 u16 delivery_mode; 837 u16 dest_mode; 838 bool level; 839 u16 trig_mode; 840 u32 shorthand; 841 u32 dest_id; 842 bool msi_redir_hint; 843 }; 844 845 struct kvm_x86_ops { 846 int (*cpu_has_kvm_support)(void); /* __init */ 847 int (*disabled_by_bios)(void); /* __init */ 848 int (*hardware_enable)(void); 849 void (*hardware_disable)(void); 850 void (*check_processor_compatibility)(void *rtn); 851 int (*hardware_setup)(void); /* __init */ 852 void (*hardware_unsetup)(void); /* __exit */ 853 bool (*cpu_has_accelerated_tpr)(void); 854 bool (*cpu_has_high_real_mode_segbase)(void); 855 void (*cpuid_update)(struct kvm_vcpu *vcpu); 856 857 int (*vm_init)(struct kvm *kvm); 858 void (*vm_destroy)(struct kvm *kvm); 859 860 /* Create, but do not attach this VCPU */ 861 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 862 void (*vcpu_free)(struct kvm_vcpu *vcpu); 863 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 864 865 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 866 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 867 void (*vcpu_put)(struct kvm_vcpu *vcpu); 868 869 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 870 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 871 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 872 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 873 void (*get_segment)(struct kvm_vcpu *vcpu, 874 struct kvm_segment *var, int seg); 875 int (*get_cpl)(struct kvm_vcpu *vcpu); 876 void (*set_segment)(struct kvm_vcpu *vcpu, 877 struct kvm_segment *var, int seg); 878 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 879 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 880 void (*decache_cr3)(struct kvm_vcpu *vcpu); 881 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 882 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 883 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 884 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 885 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 886 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 887 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 888 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 889 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 890 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 891 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 892 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 893 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 894 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 895 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 896 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 897 u32 (*get_pkru)(struct kvm_vcpu *vcpu); 898 void (*fpu_activate)(struct kvm_vcpu *vcpu); 899 void (*fpu_deactivate)(struct kvm_vcpu *vcpu); 900 901 void (*tlb_flush)(struct kvm_vcpu *vcpu); 902 903 void (*run)(struct kvm_vcpu *vcpu); 904 int (*handle_exit)(struct kvm_vcpu *vcpu); 905 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 906 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 907 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 908 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 909 unsigned char *hypercall_addr); 910 void (*set_irq)(struct kvm_vcpu *vcpu); 911 void (*set_nmi)(struct kvm_vcpu *vcpu); 912 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, 913 bool has_error_code, u32 error_code, 914 bool reinject); 915 void (*cancel_injection)(struct kvm_vcpu *vcpu); 916 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 917 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 918 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 919 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 920 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 921 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 922 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 923 bool (*get_enable_apicv)(void); 924 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 925 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 926 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 927 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 928 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set); 929 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 930 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 931 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 932 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 933 int (*get_tdp_level)(void); 934 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 935 int (*get_lpage_level)(void); 936 bool (*rdtscp_supported)(void); 937 bool (*invpcid_supported)(void); 938 void (*adjust_tsc_offset_guest)(struct kvm_vcpu *vcpu, s64 adjustment); 939 940 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 941 942 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 943 944 bool (*has_wbinvd_exit)(void); 945 946 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu); 947 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 948 949 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc); 950 951 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 952 953 int (*check_intercept)(struct kvm_vcpu *vcpu, 954 struct x86_instruction_info *info, 955 enum x86_intercept_stage stage); 956 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 957 bool (*mpx_supported)(void); 958 bool (*xsaves_supported)(void); 959 960 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 961 962 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 963 964 /* 965 * Arch-specific dirty logging hooks. These hooks are only supposed to 966 * be valid if the specific arch has hardware-accelerated dirty logging 967 * mechanism. Currently only for PML on VMX. 968 * 969 * - slot_enable_log_dirty: 970 * called when enabling log dirty mode for the slot. 971 * - slot_disable_log_dirty: 972 * called when disabling log dirty mode for the slot. 973 * also called when slot is created with log dirty disabled. 974 * - flush_log_dirty: 975 * called before reporting dirty_bitmap to userspace. 976 * - enable_log_dirty_pt_masked: 977 * called when reenabling log dirty for the GFNs in the mask after 978 * corresponding bits are cleared in slot->dirty_bitmap. 979 */ 980 void (*slot_enable_log_dirty)(struct kvm *kvm, 981 struct kvm_memory_slot *slot); 982 void (*slot_disable_log_dirty)(struct kvm *kvm, 983 struct kvm_memory_slot *slot); 984 void (*flush_log_dirty)(struct kvm *kvm); 985 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 986 struct kvm_memory_slot *slot, 987 gfn_t offset, unsigned long mask); 988 /* pmu operations of sub-arch */ 989 const struct kvm_pmu_ops *pmu_ops; 990 991 /* 992 * Architecture specific hooks for vCPU blocking due to 993 * HLT instruction. 994 * Returns for .pre_block(): 995 * - 0 means continue to block the vCPU. 996 * - 1 means we cannot block the vCPU since some event 997 * happens during this period, such as, 'ON' bit in 998 * posted-interrupts descriptor is set. 999 */ 1000 int (*pre_block)(struct kvm_vcpu *vcpu); 1001 void (*post_block)(struct kvm_vcpu *vcpu); 1002 1003 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1004 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1005 1006 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1007 uint32_t guest_irq, bool set); 1008 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1009 }; 1010 1011 struct kvm_arch_async_pf { 1012 u32 token; 1013 gfn_t gfn; 1014 unsigned long cr3; 1015 bool direct_map; 1016 }; 1017 1018 extern struct kvm_x86_ops *kvm_x86_ops; 1019 1020 int kvm_mmu_module_init(void); 1021 void kvm_mmu_module_exit(void); 1022 1023 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1024 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1025 void kvm_mmu_setup(struct kvm_vcpu *vcpu); 1026 void kvm_mmu_init_vm(struct kvm *kvm); 1027 void kvm_mmu_uninit_vm(struct kvm *kvm); 1028 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1029 u64 dirty_mask, u64 nx_mask, u64 x_mask); 1030 1031 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1032 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1033 struct kvm_memory_slot *memslot); 1034 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1035 const struct kvm_memory_slot *memslot); 1036 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1037 struct kvm_memory_slot *memslot); 1038 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1039 struct kvm_memory_slot *memslot); 1040 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1041 struct kvm_memory_slot *memslot); 1042 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1043 struct kvm_memory_slot *slot, 1044 gfn_t gfn_offset, unsigned long mask); 1045 void kvm_mmu_zap_all(struct kvm *kvm); 1046 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots); 1047 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 1048 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 1049 1050 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1051 1052 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1053 const void *val, int bytes); 1054 1055 struct kvm_irq_mask_notifier { 1056 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1057 int irq; 1058 struct hlist_node link; 1059 }; 1060 1061 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1062 struct kvm_irq_mask_notifier *kimn); 1063 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1064 struct kvm_irq_mask_notifier *kimn); 1065 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1066 bool mask); 1067 1068 extern bool tdp_enabled; 1069 1070 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1071 1072 /* control of guest tsc rate supported? */ 1073 extern bool kvm_has_tsc_control; 1074 /* maximum supported tsc_khz for guests */ 1075 extern u32 kvm_max_guest_tsc_khz; 1076 /* number of bits of the fractional part of the TSC scaling ratio */ 1077 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1078 /* maximum allowed value of TSC scaling ratio */ 1079 extern u64 kvm_max_tsc_scaling_ratio; 1080 1081 enum emulation_result { 1082 EMULATE_DONE, /* no further processing */ 1083 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 1084 EMULATE_FAIL, /* can't emulate this instruction */ 1085 }; 1086 1087 #define EMULTYPE_NO_DECODE (1 << 0) 1088 #define EMULTYPE_TRAP_UD (1 << 1) 1089 #define EMULTYPE_SKIP (1 << 2) 1090 #define EMULTYPE_RETRY (1 << 3) 1091 #define EMULTYPE_NO_REEXECUTE (1 << 4) 1092 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 1093 int emulation_type, void *insn, int insn_len); 1094 1095 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 1096 int emulation_type) 1097 { 1098 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0); 1099 } 1100 1101 void kvm_enable_efer_bits(u64); 1102 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1103 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1104 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1105 1106 struct x86_emulate_ctxt; 1107 1108 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); 1109 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1110 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1111 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1112 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1113 1114 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1115 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1116 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1117 1118 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1119 int reason, bool has_error_code, u32 error_code); 1120 1121 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1122 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1123 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1124 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1125 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1126 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1127 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1128 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1129 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1130 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1131 1132 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1133 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1134 1135 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1136 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1137 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1138 1139 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1140 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1141 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1142 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1143 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1144 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1145 gfn_t gfn, void *data, int offset, int len, 1146 u32 access); 1147 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1148 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1149 1150 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1151 int irq_source_id, int level) 1152 { 1153 /* Logical OR for level trig interrupt */ 1154 if (level) 1155 __set_bit(irq_source_id, irq_state); 1156 else 1157 __clear_bit(irq_source_id, irq_state); 1158 1159 return !!(*irq_state); 1160 } 1161 1162 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1163 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1164 1165 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1166 1167 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1168 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1169 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1170 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1171 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1172 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1173 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1174 struct x86_exception *exception); 1175 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1176 struct x86_exception *exception); 1177 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1178 struct x86_exception *exception); 1179 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1180 struct x86_exception *exception); 1181 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1182 struct x86_exception *exception); 1183 1184 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu); 1185 1186 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1187 1188 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code, 1189 void *insn, int insn_len); 1190 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1191 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu); 1192 1193 void kvm_enable_tdp(void); 1194 void kvm_disable_tdp(void); 1195 1196 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1197 struct x86_exception *exception) 1198 { 1199 return gpa; 1200 } 1201 1202 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1203 { 1204 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1205 1206 return (struct kvm_mmu_page *)page_private(page); 1207 } 1208 1209 static inline u16 kvm_read_ldt(void) 1210 { 1211 u16 ldt; 1212 asm("sldt %0" : "=g"(ldt)); 1213 return ldt; 1214 } 1215 1216 static inline void kvm_load_ldt(u16 sel) 1217 { 1218 asm("lldt %0" : : "rm"(sel)); 1219 } 1220 1221 #ifdef CONFIG_X86_64 1222 static inline unsigned long read_msr(unsigned long msr) 1223 { 1224 u64 value; 1225 1226 rdmsrl(msr, value); 1227 return value; 1228 } 1229 #endif 1230 1231 static inline u32 get_rdx_init_val(void) 1232 { 1233 return 0x600; /* P6 family */ 1234 } 1235 1236 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1237 { 1238 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1239 } 1240 1241 static inline u64 get_canonical(u64 la) 1242 { 1243 return ((int64_t)la << 16) >> 16; 1244 } 1245 1246 static inline bool is_noncanonical_address(u64 la) 1247 { 1248 #ifdef CONFIG_X86_64 1249 return get_canonical(la) != la; 1250 #else 1251 return false; 1252 #endif 1253 } 1254 1255 #define TSS_IOPB_BASE_OFFSET 0x66 1256 #define TSS_BASE_SIZE 0x68 1257 #define TSS_IOPB_SIZE (65536 / 8) 1258 #define TSS_REDIRECTION_SIZE (256 / 8) 1259 #define RMODE_TSS_SIZE \ 1260 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1261 1262 enum { 1263 TASK_SWITCH_CALL = 0, 1264 TASK_SWITCH_IRET = 1, 1265 TASK_SWITCH_JMP = 2, 1266 TASK_SWITCH_GATE = 3, 1267 }; 1268 1269 #define HF_GIF_MASK (1 << 0) 1270 #define HF_HIF_MASK (1 << 1) 1271 #define HF_VINTR_MASK (1 << 2) 1272 #define HF_NMI_MASK (1 << 3) 1273 #define HF_IRET_MASK (1 << 4) 1274 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1275 #define HF_SMM_MASK (1 << 6) 1276 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1277 1278 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1279 #define KVM_ADDRESS_SPACE_NUM 2 1280 1281 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1282 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1283 1284 /* 1285 * Hardware virtualization extension instructions may fault if a 1286 * reboot turns off virtualization while processes are running. 1287 * Trap the fault and ignore the instruction if that happens. 1288 */ 1289 asmlinkage void kvm_spurious_fault(void); 1290 1291 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1292 "666: " insn "\n\t" \ 1293 "668: \n\t" \ 1294 ".pushsection .fixup, \"ax\" \n" \ 1295 "667: \n\t" \ 1296 cleanup_insn "\n\t" \ 1297 "cmpb $0, kvm_rebooting \n\t" \ 1298 "jne 668b \n\t" \ 1299 __ASM_SIZE(push) " $666b \n\t" \ 1300 "call kvm_spurious_fault \n\t" \ 1301 ".popsection \n\t" \ 1302 _ASM_EXTABLE(666b, 667b) 1303 1304 #define __kvm_handle_fault_on_reboot(insn) \ 1305 ____kvm_handle_fault_on_reboot(insn, "") 1306 1307 #define KVM_ARCH_WANT_MMU_NOTIFIER 1308 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1309 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1310 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1311 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1312 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1313 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1314 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1315 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1316 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1317 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1318 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1319 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm, 1320 unsigned long address); 1321 1322 void kvm_define_shared_msr(unsigned index, u32 msr); 1323 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1324 1325 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1326 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1327 1328 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1329 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1330 1331 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1332 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1333 1334 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1335 struct kvm_async_pf *work); 1336 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1337 struct kvm_async_pf *work); 1338 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1339 struct kvm_async_pf *work); 1340 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1341 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1342 1343 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1344 1345 int kvm_is_in_guest(void); 1346 1347 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1348 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1349 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1350 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1351 1352 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1353 struct kvm_vcpu **dest_vcpu); 1354 1355 void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e, 1356 struct kvm_lapic_irq *irq); 1357 1358 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1359 { 1360 if (kvm_x86_ops->vcpu_blocking) 1361 kvm_x86_ops->vcpu_blocking(vcpu); 1362 } 1363 1364 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1365 { 1366 if (kvm_x86_ops->vcpu_unblocking) 1367 kvm_x86_ops->vcpu_unblocking(vcpu); 1368 } 1369 1370 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1371 1372 static inline int kvm_cpu_get_apicid(int mps_cpu) 1373 { 1374 #ifdef CONFIG_X86_LOCAL_APIC 1375 return __default_cpu_present_to_apicid(mps_cpu); 1376 #else 1377 WARN_ON_ONCE(1); 1378 return BAD_APICID; 1379 #endif 1380 } 1381 1382 #endif /* _ASM_X86_KVM_HOST_H */ 1383