1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 /* memory slots that are not exposed to userspace */ 44 #define KVM_PRIVATE_MEM_SLOTS 3 45 46 #define KVM_HALT_POLL_NS_DEFAULT 200000 47 48 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 49 50 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 51 KVM_DIRTY_LOG_INITIALLY_SET) 52 53 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \ 54 KVM_BUS_LOCK_DETECTION_EXIT) 55 56 /* x86-specific vcpu->requests bit members */ 57 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 58 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 59 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 60 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 61 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 62 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 63 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 64 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 65 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 66 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 67 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 68 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 69 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 70 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 71 #define KVM_REQ_MCLOCK_INPROGRESS \ 72 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 73 #define KVM_REQ_SCAN_IOAPIC \ 74 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 75 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 76 #define KVM_REQ_APIC_PAGE_RELOAD \ 77 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 78 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 79 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 80 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 81 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 82 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 83 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 84 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 85 #define KVM_REQ_APICV_UPDATE \ 86 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 87 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 88 #define KVM_REQ_HV_TLB_FLUSH \ 89 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_NO_WAKEUP) 90 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 91 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 92 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \ 93 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 94 95 #define CR0_RESERVED_BITS \ 96 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 97 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 98 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 99 100 #define CR4_RESERVED_BITS \ 101 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 102 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 103 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 104 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 105 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 106 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 107 108 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 109 110 111 112 #define INVALID_PAGE (~(hpa_t)0) 113 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 114 115 #define UNMAPPED_GVA (~(gpa_t)0) 116 #define INVALID_GPA (~(gpa_t)0) 117 118 /* KVM Hugepage definitions for x86 */ 119 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 120 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 121 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 122 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 123 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 124 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 125 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 126 127 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 128 { 129 /* KVM_HPAGE_GFN_SHIFT(PG_LEVEL_4K) must be 0. */ 130 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 131 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 132 } 133 134 #define KVM_PERMILLE_MMU_PAGES 20 135 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 136 #define KVM_MMU_HASH_SHIFT 12 137 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 138 #define KVM_MIN_FREE_MMU_PAGES 5 139 #define KVM_REFILL_PAGES 25 140 #define KVM_MAX_CPUID_ENTRIES 256 141 #define KVM_NR_FIXED_MTRR_REGION 88 142 #define KVM_NR_VAR_MTRR 8 143 144 #define ASYNC_PF_PER_VCPU 64 145 146 enum kvm_reg { 147 VCPU_REGS_RAX = __VCPU_REGS_RAX, 148 VCPU_REGS_RCX = __VCPU_REGS_RCX, 149 VCPU_REGS_RDX = __VCPU_REGS_RDX, 150 VCPU_REGS_RBX = __VCPU_REGS_RBX, 151 VCPU_REGS_RSP = __VCPU_REGS_RSP, 152 VCPU_REGS_RBP = __VCPU_REGS_RBP, 153 VCPU_REGS_RSI = __VCPU_REGS_RSI, 154 VCPU_REGS_RDI = __VCPU_REGS_RDI, 155 #ifdef CONFIG_X86_64 156 VCPU_REGS_R8 = __VCPU_REGS_R8, 157 VCPU_REGS_R9 = __VCPU_REGS_R9, 158 VCPU_REGS_R10 = __VCPU_REGS_R10, 159 VCPU_REGS_R11 = __VCPU_REGS_R11, 160 VCPU_REGS_R12 = __VCPU_REGS_R12, 161 VCPU_REGS_R13 = __VCPU_REGS_R13, 162 VCPU_REGS_R14 = __VCPU_REGS_R14, 163 VCPU_REGS_R15 = __VCPU_REGS_R15, 164 #endif 165 VCPU_REGS_RIP, 166 NR_VCPU_REGS, 167 168 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 169 VCPU_EXREG_CR0, 170 VCPU_EXREG_CR3, 171 VCPU_EXREG_CR4, 172 VCPU_EXREG_RFLAGS, 173 VCPU_EXREG_SEGMENTS, 174 VCPU_EXREG_EXIT_INFO_1, 175 VCPU_EXREG_EXIT_INFO_2, 176 }; 177 178 enum { 179 VCPU_SREG_ES, 180 VCPU_SREG_CS, 181 VCPU_SREG_SS, 182 VCPU_SREG_DS, 183 VCPU_SREG_FS, 184 VCPU_SREG_GS, 185 VCPU_SREG_TR, 186 VCPU_SREG_LDTR, 187 }; 188 189 enum exit_fastpath_completion { 190 EXIT_FASTPATH_NONE, 191 EXIT_FASTPATH_REENTER_GUEST, 192 EXIT_FASTPATH_EXIT_HANDLED, 193 }; 194 typedef enum exit_fastpath_completion fastpath_t; 195 196 struct x86_emulate_ctxt; 197 struct x86_exception; 198 enum x86_intercept; 199 enum x86_intercept_stage; 200 201 #define KVM_NR_DB_REGS 4 202 203 #define DR6_BUS_LOCK (1 << 11) 204 #define DR6_BD (1 << 13) 205 #define DR6_BS (1 << 14) 206 #define DR6_BT (1 << 15) 207 #define DR6_RTM (1 << 16) 208 /* 209 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits. 210 * We can regard all the bits in DR6_FIXED_1 as active_low bits; 211 * they will never be 0 for now, but when they are defined 212 * in the future it will require no code change. 213 * 214 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6. 215 */ 216 #define DR6_ACTIVE_LOW 0xffff0ff0 217 #define DR6_VOLATILE 0x0001e80f 218 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE) 219 220 #define DR7_BP_EN_MASK 0x000000ff 221 #define DR7_GE (1 << 9) 222 #define DR7_GD (1 << 13) 223 #define DR7_FIXED_1 0x00000400 224 #define DR7_VOLATILE 0xffff2bff 225 226 #define KVM_GUESTDBG_VALID_MASK \ 227 (KVM_GUESTDBG_ENABLE | \ 228 KVM_GUESTDBG_SINGLESTEP | \ 229 KVM_GUESTDBG_USE_HW_BP | \ 230 KVM_GUESTDBG_USE_SW_BP | \ 231 KVM_GUESTDBG_INJECT_BP | \ 232 KVM_GUESTDBG_INJECT_DB) 233 234 235 #define PFERR_PRESENT_BIT 0 236 #define PFERR_WRITE_BIT 1 237 #define PFERR_USER_BIT 2 238 #define PFERR_RSVD_BIT 3 239 #define PFERR_FETCH_BIT 4 240 #define PFERR_PK_BIT 5 241 #define PFERR_SGX_BIT 15 242 #define PFERR_GUEST_FINAL_BIT 32 243 #define PFERR_GUEST_PAGE_BIT 33 244 245 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 246 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 247 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 248 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 249 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 250 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 251 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT) 252 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 253 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 254 255 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 256 PFERR_WRITE_MASK | \ 257 PFERR_PRESENT_MASK) 258 259 /* apic attention bits */ 260 #define KVM_APIC_CHECK_VAPIC 0 261 /* 262 * The following bit is set with PV-EOI, unset on EOI. 263 * We detect PV-EOI changes by guest by comparing 264 * this bit with PV-EOI in guest memory. 265 * See the implementation in apic_update_pv_eoi. 266 */ 267 #define KVM_APIC_PV_EOI_PENDING 1 268 269 struct kvm_kernel_irq_routing_entry; 270 271 /* 272 * the pages used as guest page table on soft mmu are tracked by 273 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 274 * by indirect shadow page can not be more than 15 bits. 275 * 276 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 277 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 278 */ 279 union kvm_mmu_page_role { 280 u32 word; 281 struct { 282 unsigned level:4; 283 unsigned gpte_is_8_bytes:1; 284 unsigned quadrant:2; 285 unsigned direct:1; 286 unsigned access:3; 287 unsigned invalid:1; 288 unsigned nxe:1; 289 unsigned cr0_wp:1; 290 unsigned smep_andnot_wp:1; 291 unsigned smap_andnot_wp:1; 292 unsigned ad_disabled:1; 293 unsigned guest_mode:1; 294 unsigned :6; 295 296 /* 297 * This is left at the top of the word so that 298 * kvm_memslots_for_spte_role can extract it with a 299 * simple shift. While there is room, give it a whole 300 * byte so it is also faster to load it from memory. 301 */ 302 unsigned smm:8; 303 }; 304 }; 305 306 union kvm_mmu_extended_role { 307 /* 308 * This structure complements kvm_mmu_page_role caching everything needed for 309 * MMU configuration. If nothing in both these structures changed, MMU 310 * re-configuration can be skipped. @valid bit is set on first usage so we don't 311 * treat all-zero structure as valid data. 312 */ 313 u32 word; 314 struct { 315 unsigned int valid:1; 316 unsigned int execonly:1; 317 unsigned int cr0_pg:1; 318 unsigned int cr4_pae:1; 319 unsigned int cr4_pse:1; 320 unsigned int cr4_pke:1; 321 unsigned int cr4_smap:1; 322 unsigned int cr4_smep:1; 323 unsigned int maxphyaddr:6; 324 }; 325 }; 326 327 union kvm_mmu_role { 328 u64 as_u64; 329 struct { 330 union kvm_mmu_page_role base; 331 union kvm_mmu_extended_role ext; 332 }; 333 }; 334 335 struct kvm_rmap_head { 336 unsigned long val; 337 }; 338 339 struct kvm_pio_request { 340 unsigned long linear_rip; 341 unsigned long count; 342 int in; 343 int port; 344 int size; 345 }; 346 347 #define PT64_ROOT_MAX_LEVEL 5 348 349 struct rsvd_bits_validate { 350 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 351 u64 bad_mt_xwr; 352 }; 353 354 struct kvm_mmu_root_info { 355 gpa_t pgd; 356 hpa_t hpa; 357 }; 358 359 #define KVM_MMU_ROOT_INFO_INVALID \ 360 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 361 362 #define KVM_MMU_NUM_PREV_ROOTS 3 363 364 #define KVM_HAVE_MMU_RWLOCK 365 366 struct kvm_mmu_page; 367 368 /* 369 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 370 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 371 * current mmu mode. 372 */ 373 struct kvm_mmu { 374 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 375 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 376 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err, 377 bool prefault); 378 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 379 struct x86_exception *fault); 380 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 381 u32 access, struct x86_exception *exception); 382 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 383 struct x86_exception *exception); 384 int (*sync_page)(struct kvm_vcpu *vcpu, 385 struct kvm_mmu_page *sp); 386 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 387 hpa_t root_hpa; 388 gpa_t root_pgd; 389 union kvm_mmu_role mmu_role; 390 u8 root_level; 391 u8 shadow_root_level; 392 u8 ept_ad; 393 bool direct_map; 394 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 395 396 /* 397 * Bitmap; bit set = permission fault 398 * Byte index: page fault error code [4:1] 399 * Bit index: pte permissions in ACC_* format 400 */ 401 u8 permissions[16]; 402 403 /* 404 * The pkru_mask indicates if protection key checks are needed. It 405 * consists of 16 domains indexed by page fault error code bits [4:1], 406 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 407 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 408 */ 409 u32 pkru_mask; 410 411 u64 *pae_root; 412 u64 *pml4_root; 413 414 /* 415 * check zero bits on shadow page table entries, these 416 * bits include not only hardware reserved bits but also 417 * the bits spte never used. 418 */ 419 struct rsvd_bits_validate shadow_zero_check; 420 421 struct rsvd_bits_validate guest_rsvd_check; 422 423 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 424 u8 last_nonleaf_level; 425 426 bool nx; 427 428 u64 pdptrs[4]; /* pae */ 429 }; 430 431 struct kvm_tlb_range { 432 u64 start_gfn; 433 u64 pages; 434 }; 435 436 enum pmc_type { 437 KVM_PMC_GP = 0, 438 KVM_PMC_FIXED, 439 }; 440 441 struct kvm_pmc { 442 enum pmc_type type; 443 u8 idx; 444 u64 counter; 445 u64 eventsel; 446 struct perf_event *perf_event; 447 struct kvm_vcpu *vcpu; 448 /* 449 * eventsel value for general purpose counters, 450 * ctrl value for fixed counters. 451 */ 452 u64 current_config; 453 }; 454 455 struct kvm_pmu { 456 unsigned nr_arch_gp_counters; 457 unsigned nr_arch_fixed_counters; 458 unsigned available_event_types; 459 u64 fixed_ctr_ctrl; 460 u64 global_ctrl; 461 u64 global_status; 462 u64 global_ovf_ctrl; 463 u64 counter_bitmask[2]; 464 u64 global_ctrl_mask; 465 u64 global_ovf_ctrl_mask; 466 u64 reserved_bits; 467 u8 version; 468 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 469 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 470 struct irq_work irq_work; 471 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 472 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 473 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 474 475 /* 476 * The gate to release perf_events not marked in 477 * pmc_in_use only once in a vcpu time slice. 478 */ 479 bool need_cleanup; 480 481 /* 482 * The total number of programmed perf_events and it helps to avoid 483 * redundant check before cleanup if guest don't use vPMU at all. 484 */ 485 u8 event_count; 486 }; 487 488 struct kvm_pmu_ops; 489 490 enum { 491 KVM_DEBUGREG_BP_ENABLED = 1, 492 KVM_DEBUGREG_WONT_EXIT = 2, 493 KVM_DEBUGREG_RELOAD = 4, 494 }; 495 496 struct kvm_mtrr_range { 497 u64 base; 498 u64 mask; 499 struct list_head node; 500 }; 501 502 struct kvm_mtrr { 503 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 504 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 505 u64 deftype; 506 507 struct list_head head; 508 }; 509 510 /* Hyper-V SynIC timer */ 511 struct kvm_vcpu_hv_stimer { 512 struct hrtimer timer; 513 int index; 514 union hv_stimer_config config; 515 u64 count; 516 u64 exp_time; 517 struct hv_message msg; 518 bool msg_pending; 519 }; 520 521 /* Hyper-V synthetic interrupt controller (SynIC)*/ 522 struct kvm_vcpu_hv_synic { 523 u64 version; 524 u64 control; 525 u64 msg_page; 526 u64 evt_page; 527 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 528 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 529 DECLARE_BITMAP(auto_eoi_bitmap, 256); 530 DECLARE_BITMAP(vec_bitmap, 256); 531 bool active; 532 bool dont_zero_synic_pages; 533 }; 534 535 /* Hyper-V per vcpu emulation context */ 536 struct kvm_vcpu_hv { 537 struct kvm_vcpu *vcpu; 538 u32 vp_index; 539 u64 hv_vapic; 540 s64 runtime_offset; 541 struct kvm_vcpu_hv_synic synic; 542 struct kvm_hyperv_exit exit; 543 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 544 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 545 cpumask_t tlb_flush; 546 }; 547 548 /* Xen HVM per vcpu emulation context */ 549 struct kvm_vcpu_xen { 550 u64 hypercall_rip; 551 u32 current_runstate; 552 bool vcpu_info_set; 553 bool vcpu_time_info_set; 554 bool runstate_set; 555 struct gfn_to_hva_cache vcpu_info_cache; 556 struct gfn_to_hva_cache vcpu_time_info_cache; 557 struct gfn_to_hva_cache runstate_cache; 558 u64 last_steal; 559 u64 runstate_entry_time; 560 u64 runstate_times[4]; 561 }; 562 563 struct kvm_vcpu_arch { 564 /* 565 * rip and regs accesses must go through 566 * kvm_{register,rip}_{read,write} functions. 567 */ 568 unsigned long regs[NR_VCPU_REGS]; 569 u32 regs_avail; 570 u32 regs_dirty; 571 572 unsigned long cr0; 573 unsigned long cr0_guest_owned_bits; 574 unsigned long cr2; 575 unsigned long cr3; 576 unsigned long cr4; 577 unsigned long cr4_guest_owned_bits; 578 unsigned long cr4_guest_rsvd_bits; 579 unsigned long cr8; 580 u32 host_pkru; 581 u32 pkru; 582 u32 hflags; 583 u64 efer; 584 u64 apic_base; 585 struct kvm_lapic *apic; /* kernel irqchip context */ 586 bool apicv_active; 587 bool load_eoi_exitmap_pending; 588 DECLARE_BITMAP(ioapic_handled_vectors, 256); 589 unsigned long apic_attention; 590 int32_t apic_arb_prio; 591 int mp_state; 592 u64 ia32_misc_enable_msr; 593 u64 smbase; 594 u64 smi_count; 595 bool tpr_access_reporting; 596 bool xsaves_enabled; 597 u64 ia32_xss; 598 u64 microcode_version; 599 u64 arch_capabilities; 600 u64 perf_capabilities; 601 602 /* 603 * Paging state of the vcpu 604 * 605 * If the vcpu runs in guest mode with two level paging this still saves 606 * the paging mode of the l1 guest. This context is always used to 607 * handle faults. 608 */ 609 struct kvm_mmu *mmu; 610 611 /* Non-nested MMU for L1 */ 612 struct kvm_mmu root_mmu; 613 614 /* L1 MMU when running nested */ 615 struct kvm_mmu guest_mmu; 616 617 /* 618 * Paging state of an L2 guest (used for nested npt) 619 * 620 * This context will save all necessary information to walk page tables 621 * of an L2 guest. This context is only initialized for page table 622 * walking and not for faulting since we never handle l2 page faults on 623 * the host. 624 */ 625 struct kvm_mmu nested_mmu; 626 627 /* 628 * Pointer to the mmu context currently used for 629 * gva_to_gpa translations. 630 */ 631 struct kvm_mmu *walk_mmu; 632 633 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 634 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 635 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 636 struct kvm_mmu_memory_cache mmu_page_header_cache; 637 638 /* 639 * QEMU userspace and the guest each have their own FPU state. 640 * In vcpu_run, we switch between the user and guest FPU contexts. 641 * While running a VCPU, the VCPU thread will have the guest FPU 642 * context. 643 * 644 * Note that while the PKRU state lives inside the fpu registers, 645 * it is switched out separately at VMENTER and VMEXIT time. The 646 * "guest_fpu" state here contains the guest FPU context, with the 647 * host PRKU bits. 648 */ 649 struct fpu *user_fpu; 650 struct fpu *guest_fpu; 651 652 u64 xcr0; 653 u64 guest_supported_xcr0; 654 655 struct kvm_pio_request pio; 656 void *pio_data; 657 void *guest_ins_data; 658 659 u8 event_exit_inst_len; 660 661 struct kvm_queued_exception { 662 bool pending; 663 bool injected; 664 bool has_error_code; 665 u8 nr; 666 u32 error_code; 667 unsigned long payload; 668 bool has_payload; 669 u8 nested_apf; 670 } exception; 671 672 struct kvm_queued_interrupt { 673 bool injected; 674 bool soft; 675 u8 nr; 676 } interrupt; 677 678 int halt_request; /* real mode on Intel only */ 679 680 int cpuid_nent; 681 struct kvm_cpuid_entry2 *cpuid_entries; 682 683 u64 reserved_gpa_bits; 684 int maxphyaddr; 685 int max_tdp_level; 686 687 /* emulate context */ 688 689 struct x86_emulate_ctxt *emulate_ctxt; 690 bool emulate_regs_need_sync_to_vcpu; 691 bool emulate_regs_need_sync_from_vcpu; 692 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 693 694 gpa_t time; 695 struct pvclock_vcpu_time_info hv_clock; 696 unsigned int hw_tsc_khz; 697 struct gfn_to_hva_cache pv_time; 698 bool pv_time_enabled; 699 /* set guest stopped flag in pvclock flags field */ 700 bool pvclock_set_guest_stopped_request; 701 702 struct { 703 u8 preempted; 704 u64 msr_val; 705 u64 last_steal; 706 struct gfn_to_pfn_cache cache; 707 } st; 708 709 u64 l1_tsc_offset; 710 u64 tsc_offset; 711 u64 last_guest_tsc; 712 u64 last_host_tsc; 713 u64 tsc_offset_adjustment; 714 u64 this_tsc_nsec; 715 u64 this_tsc_write; 716 u64 this_tsc_generation; 717 bool tsc_catchup; 718 bool tsc_always_catchup; 719 s8 virtual_tsc_shift; 720 u32 virtual_tsc_mult; 721 u32 virtual_tsc_khz; 722 s64 ia32_tsc_adjust_msr; 723 u64 msr_ia32_power_ctl; 724 u64 tsc_scaling_ratio; 725 726 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 727 unsigned nmi_pending; /* NMI queued after currently running handler */ 728 bool nmi_injected; /* Trying to inject an NMI this entry */ 729 bool smi_pending; /* SMI queued after currently running handler */ 730 731 struct kvm_mtrr mtrr_state; 732 u64 pat; 733 734 unsigned switch_db_regs; 735 unsigned long db[KVM_NR_DB_REGS]; 736 unsigned long dr6; 737 unsigned long dr7; 738 unsigned long eff_db[KVM_NR_DB_REGS]; 739 unsigned long guest_debug_dr7; 740 u64 msr_platform_info; 741 u64 msr_misc_features_enables; 742 743 u64 mcg_cap; 744 u64 mcg_status; 745 u64 mcg_ctl; 746 u64 mcg_ext_ctl; 747 u64 *mce_banks; 748 749 /* Cache MMIO info */ 750 u64 mmio_gva; 751 unsigned mmio_access; 752 gfn_t mmio_gfn; 753 u64 mmio_gen; 754 755 struct kvm_pmu pmu; 756 757 /* used for guest single stepping over the given code position */ 758 unsigned long singlestep_rip; 759 760 bool hyperv_enabled; 761 struct kvm_vcpu_hv *hyperv; 762 struct kvm_vcpu_xen xen; 763 764 cpumask_var_t wbinvd_dirty_mask; 765 766 unsigned long last_retry_eip; 767 unsigned long last_retry_addr; 768 769 struct { 770 bool halted; 771 gfn_t gfns[ASYNC_PF_PER_VCPU]; 772 struct gfn_to_hva_cache data; 773 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 774 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 775 u16 vec; 776 u32 id; 777 bool send_user_only; 778 u32 host_apf_flags; 779 unsigned long nested_apf_token; 780 bool delivery_as_pf_vmexit; 781 bool pageready_pending; 782 } apf; 783 784 /* OSVW MSRs (AMD only) */ 785 struct { 786 u64 length; 787 u64 status; 788 } osvw; 789 790 struct { 791 u64 msr_val; 792 struct gfn_to_hva_cache data; 793 } pv_eoi; 794 795 u64 msr_kvm_poll_control; 796 797 /* 798 * Indicates the guest is trying to write a gfn that contains one or 799 * more of the PTEs used to translate the write itself, i.e. the access 800 * is changing its own translation in the guest page tables. KVM exits 801 * to userspace if emulation of the faulting instruction fails and this 802 * flag is set, as KVM cannot make forward progress. 803 * 804 * If emulation fails for a write to guest page tables, KVM unprotects 805 * (zaps) the shadow page for the target gfn and resumes the guest to 806 * retry the non-emulatable instruction (on hardware). Unprotecting the 807 * gfn doesn't allow forward progress for a self-changing access because 808 * doing so also zaps the translation for the gfn, i.e. retrying the 809 * instruction will hit a !PRESENT fault, which results in a new shadow 810 * page and sends KVM back to square one. 811 */ 812 bool write_fault_to_shadow_pgtable; 813 814 /* set at EPT violation at this point */ 815 unsigned long exit_qualification; 816 817 /* pv related host specific info */ 818 struct { 819 bool pv_unhalted; 820 } pv; 821 822 int pending_ioapic_eoi; 823 int pending_external_vector; 824 825 /* be preempted when it's in kernel-mode(cpl=0) */ 826 bool preempted_in_kernel; 827 828 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 829 bool l1tf_flush_l1d; 830 831 /* Host CPU on which VM-entry was most recently attempted */ 832 unsigned int last_vmentry_cpu; 833 834 /* AMD MSRC001_0015 Hardware Configuration */ 835 u64 msr_hwcr; 836 837 /* pv related cpuid info */ 838 struct { 839 /* 840 * value of the eax register in the KVM_CPUID_FEATURES CPUID 841 * leaf. 842 */ 843 u32 features; 844 845 /* 846 * indicates whether pv emulation should be disabled if features 847 * are not present in the guest's cpuid 848 */ 849 bool enforce; 850 } pv_cpuid; 851 852 /* Protected Guests */ 853 bool guest_state_protected; 854 }; 855 856 struct kvm_lpage_info { 857 int disallow_lpage; 858 }; 859 860 struct kvm_arch_memory_slot { 861 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 862 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 863 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 864 }; 865 866 /* 867 * We use as the mode the number of bits allocated in the LDR for the 868 * logical processor ID. It happens that these are all powers of two. 869 * This makes it is very easy to detect cases where the APICs are 870 * configured for multiple modes; in that case, we cannot use the map and 871 * hence cannot use kvm_irq_delivery_to_apic_fast either. 872 */ 873 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 874 #define KVM_APIC_MODE_XAPIC_FLAT 8 875 #define KVM_APIC_MODE_X2APIC 16 876 877 struct kvm_apic_map { 878 struct rcu_head rcu; 879 u8 mode; 880 u32 max_apic_id; 881 union { 882 struct kvm_lapic *xapic_flat_map[8]; 883 struct kvm_lapic *xapic_cluster_map[16][4]; 884 }; 885 struct kvm_lapic *phys_map[]; 886 }; 887 888 /* Hyper-V synthetic debugger (SynDbg)*/ 889 struct kvm_hv_syndbg { 890 struct { 891 u64 control; 892 u64 status; 893 u64 send_page; 894 u64 recv_page; 895 u64 pending_page; 896 } control; 897 u64 options; 898 }; 899 900 /* Current state of Hyper-V TSC page clocksource */ 901 enum hv_tsc_page_status { 902 /* TSC page was not set up or disabled */ 903 HV_TSC_PAGE_UNSET = 0, 904 /* TSC page MSR was written by the guest, update pending */ 905 HV_TSC_PAGE_GUEST_CHANGED, 906 /* TSC page MSR was written by KVM userspace, update pending */ 907 HV_TSC_PAGE_HOST_CHANGED, 908 /* TSC page was properly set up and is currently active */ 909 HV_TSC_PAGE_SET, 910 /* TSC page is currently being updated and therefore is inactive */ 911 HV_TSC_PAGE_UPDATING, 912 /* TSC page was set up with an inaccessible GPA */ 913 HV_TSC_PAGE_BROKEN, 914 }; 915 916 /* Hyper-V emulation context */ 917 struct kvm_hv { 918 struct mutex hv_lock; 919 u64 hv_guest_os_id; 920 u64 hv_hypercall; 921 u64 hv_tsc_page; 922 enum hv_tsc_page_status hv_tsc_page_status; 923 924 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 925 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 926 u64 hv_crash_ctl; 927 928 struct ms_hyperv_tsc_page tsc_ref; 929 930 struct idr conn_to_evt; 931 932 u64 hv_reenlightenment_control; 933 u64 hv_tsc_emulation_control; 934 u64 hv_tsc_emulation_status; 935 936 /* How many vCPUs have VP index != vCPU index */ 937 atomic_t num_mismatched_vp_indexes; 938 939 struct hv_partition_assist_pg *hv_pa_pg; 940 struct kvm_hv_syndbg hv_syndbg; 941 }; 942 943 struct msr_bitmap_range { 944 u32 flags; 945 u32 nmsrs; 946 u32 base; 947 unsigned long *bitmap; 948 }; 949 950 /* Xen emulation context */ 951 struct kvm_xen { 952 bool long_mode; 953 bool shinfo_set; 954 u8 upcall_vector; 955 struct gfn_to_hva_cache shinfo_cache; 956 }; 957 958 enum kvm_irqchip_mode { 959 KVM_IRQCHIP_NONE, 960 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 961 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 962 }; 963 964 struct kvm_x86_msr_filter { 965 u8 count; 966 bool default_allow:1; 967 struct msr_bitmap_range ranges[16]; 968 }; 969 970 #define APICV_INHIBIT_REASON_DISABLE 0 971 #define APICV_INHIBIT_REASON_HYPERV 1 972 #define APICV_INHIBIT_REASON_NESTED 2 973 #define APICV_INHIBIT_REASON_IRQWIN 3 974 #define APICV_INHIBIT_REASON_PIT_REINJ 4 975 #define APICV_INHIBIT_REASON_X2APIC 5 976 977 struct kvm_arch { 978 unsigned long n_used_mmu_pages; 979 unsigned long n_requested_mmu_pages; 980 unsigned long n_max_mmu_pages; 981 unsigned int indirect_shadow_pages; 982 u8 mmu_valid_gen; 983 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 984 struct list_head active_mmu_pages; 985 struct list_head zapped_obsolete_pages; 986 struct list_head lpage_disallowed_mmu_pages; 987 struct kvm_page_track_notifier_node mmu_sp_tracker; 988 struct kvm_page_track_notifier_head track_notifier_head; 989 990 struct list_head assigned_dev_head; 991 struct iommu_domain *iommu_domain; 992 bool iommu_noncoherent; 993 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 994 atomic_t noncoherent_dma_count; 995 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 996 atomic_t assigned_device_count; 997 struct kvm_pic *vpic; 998 struct kvm_ioapic *vioapic; 999 struct kvm_pit *vpit; 1000 atomic_t vapics_in_nmi_mode; 1001 struct mutex apic_map_lock; 1002 struct kvm_apic_map __rcu *apic_map; 1003 atomic_t apic_map_dirty; 1004 1005 bool apic_access_page_done; 1006 unsigned long apicv_inhibit_reasons; 1007 1008 gpa_t wall_clock; 1009 1010 bool mwait_in_guest; 1011 bool hlt_in_guest; 1012 bool pause_in_guest; 1013 bool cstate_in_guest; 1014 1015 unsigned long irq_sources_bitmap; 1016 s64 kvmclock_offset; 1017 raw_spinlock_t tsc_write_lock; 1018 u64 last_tsc_nsec; 1019 u64 last_tsc_write; 1020 u32 last_tsc_khz; 1021 u64 cur_tsc_nsec; 1022 u64 cur_tsc_write; 1023 u64 cur_tsc_offset; 1024 u64 cur_tsc_generation; 1025 int nr_vcpus_matched_tsc; 1026 1027 spinlock_t pvclock_gtod_sync_lock; 1028 bool use_master_clock; 1029 u64 master_kernel_ns; 1030 u64 master_cycle_now; 1031 struct delayed_work kvmclock_update_work; 1032 struct delayed_work kvmclock_sync_work; 1033 1034 struct kvm_xen_hvm_config xen_hvm_config; 1035 1036 /* reads protected by irq_srcu, writes by irq_lock */ 1037 struct hlist_head mask_notifier_list; 1038 1039 struct kvm_hv hyperv; 1040 struct kvm_xen xen; 1041 1042 #ifdef CONFIG_KVM_MMU_AUDIT 1043 int audit_point; 1044 #endif 1045 1046 bool backwards_tsc_observed; 1047 bool boot_vcpu_runs_old_kvmclock; 1048 u32 bsp_vcpu_id; 1049 1050 u64 disabled_quirks; 1051 int cpu_dirty_logging_count; 1052 1053 enum kvm_irqchip_mode irqchip_mode; 1054 u8 nr_reserved_ioapic_pins; 1055 1056 bool disabled_lapic_found; 1057 1058 bool x2apic_format; 1059 bool x2apic_broadcast_quirk_disabled; 1060 1061 bool guest_can_read_msr_platform_info; 1062 bool exception_payload_enabled; 1063 1064 bool bus_lock_detection_enabled; 1065 1066 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 1067 u32 user_space_msr_mask; 1068 struct kvm_x86_msr_filter __rcu *msr_filter; 1069 1070 /* Guest can access the SGX PROVISIONKEY. */ 1071 bool sgx_provisioning_allowed; 1072 1073 struct kvm_pmu_event_filter __rcu *pmu_event_filter; 1074 struct task_struct *nx_lpage_recovery_thread; 1075 1076 #ifdef CONFIG_X86_64 1077 /* 1078 * Whether the TDP MMU is enabled for this VM. This contains a 1079 * snapshot of the TDP MMU module parameter from when the VM was 1080 * created and remains unchanged for the life of the VM. If this is 1081 * true, TDP MMU handler functions will run for various MMU 1082 * operations. 1083 */ 1084 bool tdp_mmu_enabled; 1085 1086 /* 1087 * List of struct kvm_mmu_pages being used as roots. 1088 * All struct kvm_mmu_pages in the list should have 1089 * tdp_mmu_page set. 1090 * 1091 * For reads, this list is protected by: 1092 * the MMU lock in read mode + RCU or 1093 * the MMU lock in write mode 1094 * 1095 * For writes, this list is protected by: 1096 * the MMU lock in read mode + the tdp_mmu_pages_lock or 1097 * the MMU lock in write mode 1098 * 1099 * Roots will remain in the list until their tdp_mmu_root_count 1100 * drops to zero, at which point the thread that decremented the 1101 * count to zero should removed the root from the list and clean 1102 * it up, freeing the root after an RCU grace period. 1103 */ 1104 struct list_head tdp_mmu_roots; 1105 1106 /* 1107 * List of struct kvmp_mmu_pages not being used as roots. 1108 * All struct kvm_mmu_pages in the list should have 1109 * tdp_mmu_page set and a tdp_mmu_root_count of 0. 1110 */ 1111 struct list_head tdp_mmu_pages; 1112 1113 /* 1114 * Protects accesses to the following fields when the MMU lock 1115 * is held in read mode: 1116 * - tdp_mmu_roots (above) 1117 * - tdp_mmu_pages (above) 1118 * - the link field of struct kvm_mmu_pages used by the TDP MMU 1119 * - lpage_disallowed_mmu_pages 1120 * - the lpage_disallowed_link field of struct kvm_mmu_pages used 1121 * by the TDP MMU 1122 * It is acceptable, but not necessary, to acquire this lock when 1123 * the thread holds the MMU lock in write mode. 1124 */ 1125 spinlock_t tdp_mmu_pages_lock; 1126 #endif /* CONFIG_X86_64 */ 1127 }; 1128 1129 struct kvm_vm_stat { 1130 ulong mmu_shadow_zapped; 1131 ulong mmu_pte_write; 1132 ulong mmu_pde_zapped; 1133 ulong mmu_flooded; 1134 ulong mmu_recycled; 1135 ulong mmu_cache_miss; 1136 ulong mmu_unsync; 1137 ulong remote_tlb_flush; 1138 ulong lpages; 1139 ulong nx_lpage_splits; 1140 ulong max_mmu_page_hash_collisions; 1141 }; 1142 1143 struct kvm_vcpu_stat { 1144 u64 pf_fixed; 1145 u64 pf_guest; 1146 u64 tlb_flush; 1147 u64 invlpg; 1148 1149 u64 exits; 1150 u64 io_exits; 1151 u64 mmio_exits; 1152 u64 signal_exits; 1153 u64 irq_window_exits; 1154 u64 nmi_window_exits; 1155 u64 l1d_flush; 1156 u64 halt_exits; 1157 u64 halt_successful_poll; 1158 u64 halt_attempted_poll; 1159 u64 halt_poll_invalid; 1160 u64 halt_wakeup; 1161 u64 request_irq_exits; 1162 u64 irq_exits; 1163 u64 host_state_reload; 1164 u64 fpu_reload; 1165 u64 insn_emulation; 1166 u64 insn_emulation_fail; 1167 u64 hypercalls; 1168 u64 irq_injections; 1169 u64 nmi_injections; 1170 u64 req_event; 1171 u64 halt_poll_success_ns; 1172 u64 halt_poll_fail_ns; 1173 u64 nested_run; 1174 u64 directed_yield_attempted; 1175 u64 directed_yield_successful; 1176 }; 1177 1178 struct x86_instruction_info; 1179 1180 struct msr_data { 1181 bool host_initiated; 1182 u32 index; 1183 u64 data; 1184 }; 1185 1186 struct kvm_lapic_irq { 1187 u32 vector; 1188 u16 delivery_mode; 1189 u16 dest_mode; 1190 bool level; 1191 u16 trig_mode; 1192 u32 shorthand; 1193 u32 dest_id; 1194 bool msi_redir_hint; 1195 }; 1196 1197 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1198 { 1199 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1200 } 1201 1202 struct kvm_x86_ops { 1203 int (*hardware_enable)(void); 1204 void (*hardware_disable)(void); 1205 void (*hardware_unsetup)(void); 1206 bool (*cpu_has_accelerated_tpr)(void); 1207 bool (*has_emulated_msr)(struct kvm *kvm, u32 index); 1208 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1209 1210 unsigned int vm_size; 1211 int (*vm_init)(struct kvm *kvm); 1212 void (*vm_destroy)(struct kvm *kvm); 1213 1214 /* Create, but do not attach this VCPU */ 1215 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1216 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1217 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1218 1219 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1220 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1221 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1222 1223 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1224 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1225 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1226 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1227 void (*get_segment)(struct kvm_vcpu *vcpu, 1228 struct kvm_segment *var, int seg); 1229 int (*get_cpl)(struct kvm_vcpu *vcpu); 1230 void (*set_segment)(struct kvm_vcpu *vcpu, 1231 struct kvm_segment *var, int seg); 1232 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1233 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1234 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1235 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1236 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1237 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1238 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1239 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1240 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1241 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1242 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1243 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1244 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1245 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1246 1247 void (*tlb_flush_all)(struct kvm_vcpu *vcpu); 1248 void (*tlb_flush_current)(struct kvm_vcpu *vcpu); 1249 int (*tlb_remote_flush)(struct kvm *kvm); 1250 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1251 struct kvm_tlb_range *range); 1252 1253 /* 1254 * Flush any TLB entries associated with the given GVA. 1255 * Does not need to flush GPA->HPA mappings. 1256 * Can potentially get non-canonical addresses through INVLPGs, which 1257 * the implementation may choose to ignore if appropriate. 1258 */ 1259 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1260 1261 /* 1262 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1263 * does not need to flush GPA->HPA mappings. 1264 */ 1265 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu); 1266 1267 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu); 1268 int (*handle_exit)(struct kvm_vcpu *vcpu, 1269 enum exit_fastpath_completion exit_fastpath); 1270 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1271 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1272 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1273 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1274 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1275 unsigned char *hypercall_addr); 1276 void (*set_irq)(struct kvm_vcpu *vcpu); 1277 void (*set_nmi)(struct kvm_vcpu *vcpu); 1278 void (*queue_exception)(struct kvm_vcpu *vcpu); 1279 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1280 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1281 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1282 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1283 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1284 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1285 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1286 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1287 bool (*check_apicv_inhibit_reasons)(ulong bit); 1288 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate); 1289 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1290 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1291 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1292 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1293 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1294 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1295 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1296 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1297 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1298 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1299 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1300 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1301 1302 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa, 1303 int root_level); 1304 1305 bool (*has_wbinvd_exit)(void); 1306 1307 /* Returns actual tsc_offset set in active VMCS */ 1308 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1309 1310 /* 1311 * Retrieve somewhat arbitrary exit information. Intended to be used 1312 * only from within tracepoints to avoid VMREADs when tracing is off. 1313 */ 1314 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2, 1315 u32 *exit_int_info, u32 *exit_int_info_err_code); 1316 1317 int (*check_intercept)(struct kvm_vcpu *vcpu, 1318 struct x86_instruction_info *info, 1319 enum x86_intercept_stage stage, 1320 struct x86_exception *exception); 1321 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1322 1323 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1324 1325 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1326 1327 /* 1328 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero 1329 * value indicates CPU dirty logging is unsupported or disabled. 1330 */ 1331 int cpu_dirty_log_size; 1332 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu); 1333 1334 /* pmu operations of sub-arch */ 1335 const struct kvm_pmu_ops *pmu_ops; 1336 const struct kvm_x86_nested_ops *nested_ops; 1337 1338 /* 1339 * Architecture specific hooks for vCPU blocking due to 1340 * HLT instruction. 1341 * Returns for .pre_block(): 1342 * - 0 means continue to block the vCPU. 1343 * - 1 means we cannot block the vCPU since some event 1344 * happens during this period, such as, 'ON' bit in 1345 * posted-interrupts descriptor is set. 1346 */ 1347 int (*pre_block)(struct kvm_vcpu *vcpu); 1348 void (*post_block)(struct kvm_vcpu *vcpu); 1349 1350 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1351 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1352 1353 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1354 uint32_t guest_irq, bool set); 1355 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1356 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1357 1358 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1359 bool *expired); 1360 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1361 1362 void (*setup_mce)(struct kvm_vcpu *vcpu); 1363 1364 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1365 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1366 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1367 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1368 1369 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1370 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1371 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1372 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1373 1374 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1375 1376 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len); 1377 1378 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1379 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1380 1381 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1382 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1383 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); 1384 1385 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); 1386 }; 1387 1388 struct kvm_x86_nested_ops { 1389 int (*check_events)(struct kvm_vcpu *vcpu); 1390 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1391 void (*triple_fault)(struct kvm_vcpu *vcpu); 1392 int (*get_state)(struct kvm_vcpu *vcpu, 1393 struct kvm_nested_state __user *user_kvm_nested_state, 1394 unsigned user_data_size); 1395 int (*set_state)(struct kvm_vcpu *vcpu, 1396 struct kvm_nested_state __user *user_kvm_nested_state, 1397 struct kvm_nested_state *kvm_state); 1398 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1399 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1400 1401 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1402 uint16_t *vmcs_version); 1403 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1404 }; 1405 1406 struct kvm_x86_init_ops { 1407 int (*cpu_has_kvm_support)(void); 1408 int (*disabled_by_bios)(void); 1409 int (*check_processor_compatibility)(void); 1410 int (*hardware_setup)(void); 1411 1412 struct kvm_x86_ops *runtime_ops; 1413 }; 1414 1415 struct kvm_arch_async_pf { 1416 u32 token; 1417 gfn_t gfn; 1418 unsigned long cr3; 1419 bool direct_map; 1420 }; 1421 1422 extern u32 __read_mostly kvm_nr_uret_msrs; 1423 extern u64 __read_mostly host_efer; 1424 extern bool __read_mostly allow_smaller_maxphyaddr; 1425 extern struct kvm_x86_ops kvm_x86_ops; 1426 1427 #define KVM_X86_OP(func) \ 1428 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func)); 1429 #define KVM_X86_OP_NULL KVM_X86_OP 1430 #include <asm/kvm-x86-ops.h> 1431 1432 static inline void kvm_ops_static_call_update(void) 1433 { 1434 #define KVM_X86_OP(func) \ 1435 static_call_update(kvm_x86_##func, kvm_x86_ops.func); 1436 #define KVM_X86_OP_NULL KVM_X86_OP 1437 #include <asm/kvm-x86-ops.h> 1438 } 1439 1440 #define __KVM_HAVE_ARCH_VM_ALLOC 1441 static inline struct kvm *kvm_arch_alloc_vm(void) 1442 { 1443 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1444 } 1445 void kvm_arch_free_vm(struct kvm *kvm); 1446 1447 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1448 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1449 { 1450 if (kvm_x86_ops.tlb_remote_flush && 1451 !static_call(kvm_x86_tlb_remote_flush)(kvm)) 1452 return 0; 1453 else 1454 return -ENOTSUPP; 1455 } 1456 1457 int kvm_mmu_module_init(void); 1458 void kvm_mmu_module_exit(void); 1459 1460 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1461 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1462 void kvm_mmu_init_vm(struct kvm *kvm); 1463 void kvm_mmu_uninit_vm(struct kvm *kvm); 1464 1465 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1466 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1467 struct kvm_memory_slot *memslot, 1468 int start_level); 1469 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1470 const struct kvm_memory_slot *memslot); 1471 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1472 struct kvm_memory_slot *memslot); 1473 void kvm_mmu_zap_all(struct kvm *kvm); 1474 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1475 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1476 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1477 1478 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1479 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1480 1481 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1482 const void *val, int bytes); 1483 1484 struct kvm_irq_mask_notifier { 1485 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1486 int irq; 1487 struct hlist_node link; 1488 }; 1489 1490 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1491 struct kvm_irq_mask_notifier *kimn); 1492 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1493 struct kvm_irq_mask_notifier *kimn); 1494 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1495 bool mask); 1496 1497 extern bool tdp_enabled; 1498 1499 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1500 1501 /* control of guest tsc rate supported? */ 1502 extern bool kvm_has_tsc_control; 1503 /* maximum supported tsc_khz for guests */ 1504 extern u32 kvm_max_guest_tsc_khz; 1505 /* number of bits of the fractional part of the TSC scaling ratio */ 1506 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1507 /* maximum allowed value of TSC scaling ratio */ 1508 extern u64 kvm_max_tsc_scaling_ratio; 1509 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1510 extern u64 kvm_default_tsc_scaling_ratio; 1511 /* bus lock detection supported? */ 1512 extern bool kvm_has_bus_lock_exit; 1513 1514 extern u64 kvm_mce_cap_supported; 1515 1516 /* 1517 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1518 * userspace I/O) to indicate that the emulation context 1519 * should be reused as is, i.e. skip initialization of 1520 * emulation context, instruction fetch and decode. 1521 * 1522 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1523 * Indicates that only select instructions (tagged with 1524 * EmulateOnUD) should be emulated (to minimize the emulator 1525 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1526 * 1527 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1528 * decode the instruction length. For use *only* by 1529 * kvm_x86_ops.skip_emulated_instruction() implementations. 1530 * 1531 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1532 * retry native execution under certain conditions, 1533 * Can only be set in conjunction with EMULTYPE_PF. 1534 * 1535 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1536 * triggered by KVM's magic "force emulation" prefix, 1537 * which is opt in via module param (off by default). 1538 * Bypasses EmulateOnUD restriction despite emulating 1539 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1540 * Used to test the full emulator from userspace. 1541 * 1542 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1543 * backdoor emulation, which is opt in via module param. 1544 * VMware backdoor emulation handles select instructions 1545 * and reinjects the #GP for all other cases. 1546 * 1547 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1548 * case the CR2/GPA value pass on the stack is valid. 1549 */ 1550 #define EMULTYPE_NO_DECODE (1 << 0) 1551 #define EMULTYPE_TRAP_UD (1 << 1) 1552 #define EMULTYPE_SKIP (1 << 2) 1553 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1554 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1555 #define EMULTYPE_VMWARE_GP (1 << 5) 1556 #define EMULTYPE_PF (1 << 6) 1557 1558 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1559 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1560 void *insn, int insn_len); 1561 1562 void kvm_enable_efer_bits(u64); 1563 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1564 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1565 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1566 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1567 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1568 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1569 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu); 1570 int kvm_emulate_invd(struct kvm_vcpu *vcpu); 1571 int kvm_emulate_mwait(struct kvm_vcpu *vcpu); 1572 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu); 1573 int kvm_emulate_monitor(struct kvm_vcpu *vcpu); 1574 1575 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1576 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1577 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1578 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1579 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu); 1580 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1581 1582 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1583 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1584 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1585 1586 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1587 int reason, bool has_error_code, u32 error_code); 1588 1589 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu); 1590 1591 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0); 1592 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4); 1593 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1594 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1595 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1596 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1597 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1598 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1599 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1600 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1601 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1602 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu); 1603 1604 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1605 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1606 1607 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1608 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1609 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu); 1610 1611 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1612 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1613 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1614 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1615 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1616 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1617 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1618 struct x86_exception *fault); 1619 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1620 gfn_t gfn, void *data, int offset, int len, 1621 u32 access); 1622 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1623 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1624 1625 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1626 int irq_source_id, int level) 1627 { 1628 /* Logical OR for level trig interrupt */ 1629 if (level) 1630 __set_bit(irq_source_id, irq_state); 1631 else 1632 __clear_bit(irq_source_id, irq_state); 1633 1634 return !!(*irq_state); 1635 } 1636 1637 #define KVM_MMU_ROOT_CURRENT BIT(0) 1638 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1639 #define KVM_MMU_ROOTS_ALL (~0UL) 1640 1641 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1642 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1643 1644 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1645 1646 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1647 1648 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1649 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1650 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1651 ulong roots_to_free); 1652 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1653 struct x86_exception *exception); 1654 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1655 struct x86_exception *exception); 1656 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1657 struct x86_exception *exception); 1658 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1659 struct x86_exception *exception); 1660 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1661 struct x86_exception *exception); 1662 1663 bool kvm_apicv_activated(struct kvm *kvm); 1664 void kvm_apicv_init(struct kvm *kvm, bool enable); 1665 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1666 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1667 unsigned long bit); 1668 1669 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1670 1671 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1672 void *insn, int insn_len); 1673 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1674 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1675 gva_t gva, hpa_t root_hpa); 1676 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1677 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 1678 bool skip_mmu_sync); 1679 1680 void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 1681 int tdp_huge_page_level); 1682 1683 static inline u16 kvm_read_ldt(void) 1684 { 1685 u16 ldt; 1686 asm("sldt %0" : "=g"(ldt)); 1687 return ldt; 1688 } 1689 1690 static inline void kvm_load_ldt(u16 sel) 1691 { 1692 asm("lldt %0" : : "rm"(sel)); 1693 } 1694 1695 #ifdef CONFIG_X86_64 1696 static inline unsigned long read_msr(unsigned long msr) 1697 { 1698 u64 value; 1699 1700 rdmsrl(msr, value); 1701 return value; 1702 } 1703 #endif 1704 1705 static inline u32 get_rdx_init_val(void) 1706 { 1707 return 0x600; /* P6 family */ 1708 } 1709 1710 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1711 { 1712 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1713 } 1714 1715 #define TSS_IOPB_BASE_OFFSET 0x66 1716 #define TSS_BASE_SIZE 0x68 1717 #define TSS_IOPB_SIZE (65536 / 8) 1718 #define TSS_REDIRECTION_SIZE (256 / 8) 1719 #define RMODE_TSS_SIZE \ 1720 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1721 1722 enum { 1723 TASK_SWITCH_CALL = 0, 1724 TASK_SWITCH_IRET = 1, 1725 TASK_SWITCH_JMP = 2, 1726 TASK_SWITCH_GATE = 3, 1727 }; 1728 1729 #define HF_GIF_MASK (1 << 0) 1730 #define HF_NMI_MASK (1 << 3) 1731 #define HF_IRET_MASK (1 << 4) 1732 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1733 #define HF_SMM_MASK (1 << 6) 1734 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1735 1736 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1737 #define KVM_ADDRESS_SPACE_NUM 2 1738 1739 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1740 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1741 1742 asmlinkage void kvm_spurious_fault(void); 1743 1744 /* 1745 * Hardware virtualization extension instructions may fault if a 1746 * reboot turns off virtualization while processes are running. 1747 * Usually after catching the fault we just panic; during reboot 1748 * instead the instruction is ignored. 1749 */ 1750 #define __kvm_handle_fault_on_reboot(insn) \ 1751 "666: \n\t" \ 1752 insn "\n\t" \ 1753 "jmp 668f \n\t" \ 1754 "667: \n\t" \ 1755 "1: \n\t" \ 1756 ".pushsection .discard.instr_begin \n\t" \ 1757 ".long 1b - . \n\t" \ 1758 ".popsection \n\t" \ 1759 "call kvm_spurious_fault \n\t" \ 1760 "1: \n\t" \ 1761 ".pushsection .discard.instr_end \n\t" \ 1762 ".long 1b - . \n\t" \ 1763 ".popsection \n\t" \ 1764 "668: \n\t" \ 1765 _ASM_EXTABLE(666b, 667b) 1766 1767 #define KVM_ARCH_WANT_MMU_NOTIFIER 1768 1769 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1770 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1771 int kvm_cpu_has_extint(struct kvm_vcpu *v); 1772 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1773 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1774 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1775 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1776 1777 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1778 unsigned long ipi_bitmap_high, u32 min, 1779 unsigned long icr, int op_64_bit); 1780 1781 int kvm_add_user_return_msr(u32 msr); 1782 int kvm_find_user_return_msr(u32 msr); 1783 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1784 1785 static inline bool kvm_is_supported_user_return_msr(u32 msr) 1786 { 1787 return kvm_find_user_return_msr(msr) >= 0; 1788 } 1789 1790 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1791 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1792 1793 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1794 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1795 1796 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1797 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1798 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1799 unsigned long *vcpu_bitmap); 1800 1801 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1802 struct kvm_async_pf *work); 1803 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1804 struct kvm_async_pf *work); 1805 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1806 struct kvm_async_pf *work); 1807 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1808 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1809 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1810 1811 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1812 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1813 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1814 1815 int kvm_is_in_guest(void); 1816 1817 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, 1818 u32 size); 1819 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1820 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1821 1822 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1823 struct kvm_vcpu **dest_vcpu); 1824 1825 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1826 struct kvm_lapic_irq *irq); 1827 1828 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1829 { 1830 /* We can only post Fixed and LowPrio IRQs */ 1831 return (irq->delivery_mode == APIC_DM_FIXED || 1832 irq->delivery_mode == APIC_DM_LOWEST); 1833 } 1834 1835 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1836 { 1837 static_call_cond(kvm_x86_vcpu_blocking)(vcpu); 1838 } 1839 1840 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1841 { 1842 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu); 1843 } 1844 1845 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1846 1847 static inline int kvm_cpu_get_apicid(int mps_cpu) 1848 { 1849 #ifdef CONFIG_X86_LOCAL_APIC 1850 return default_cpu_present_to_apicid(mps_cpu); 1851 #else 1852 WARN_ON_ONCE(1); 1853 return BAD_APICID; 1854 #endif 1855 } 1856 1857 #define put_smstate(type, buf, offset, val) \ 1858 *(type *)((buf) + (offset) - 0x7e00) = val 1859 1860 #define GET_SMSTATE(type, buf, offset) \ 1861 (*(type *)((buf) + (offset) - 0x7e00)) 1862 1863 int kvm_cpu_dirty_log_size(void); 1864 1865 #endif /* _ASM_X86_KVM_HOST_H */ 1866