xref: /openbmc/linux/arch/x86/include/asm/kvm_host.h (revision 3e26a691)
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This header defines architecture specific interfaces, x86 version
5  *
6  * This work is licensed under the terms of the GNU GPL, version 2.  See
7  * the COPYING file in the top-level directory.
8  *
9  */
10 
11 #ifndef _ASM_X86_KVM_HOST_H
12 #define _ASM_X86_KVM_HOST_H
13 
14 #include <linux/types.h>
15 #include <linux/mm.h>
16 #include <linux/mmu_notifier.h>
17 #include <linux/tracepoint.h>
18 #include <linux/cpumask.h>
19 #include <linux/irq_work.h>
20 
21 #include <linux/kvm.h>
22 #include <linux/kvm_para.h>
23 #include <linux/kvm_types.h>
24 #include <linux/perf_event.h>
25 #include <linux/pvclock_gtod.h>
26 #include <linux/clocksource.h>
27 #include <linux/irqbypass.h>
28 #include <linux/hyperv.h>
29 
30 #include <asm/pvclock-abi.h>
31 #include <asm/desc.h>
32 #include <asm/mtrr.h>
33 #include <asm/msr-index.h>
34 #include <asm/asm.h>
35 #include <asm/kvm_page_track.h>
36 
37 #define KVM_MAX_VCPUS 255
38 #define KVM_SOFT_MAX_VCPUS 160
39 #define KVM_USER_MEM_SLOTS 509
40 /* memory slots that are not exposed to userspace */
41 #define KVM_PRIVATE_MEM_SLOTS 3
42 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
43 
44 #define KVM_PIO_PAGE_OFFSET 1
45 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
46 #define KVM_HALT_POLL_NS_DEFAULT 500000
47 
48 #define KVM_IRQCHIP_NUM_PINS  KVM_IOAPIC_NUM_PINS
49 
50 /* x86-specific vcpu->requests bit members */
51 #define KVM_REQ_MIGRATE_TIMER      8
52 #define KVM_REQ_REPORT_TPR_ACCESS  9
53 #define KVM_REQ_TRIPLE_FAULT      10
54 #define KVM_REQ_MMU_SYNC          11
55 #define KVM_REQ_CLOCK_UPDATE      12
56 #define KVM_REQ_DEACTIVATE_FPU    13
57 #define KVM_REQ_EVENT             14
58 #define KVM_REQ_APF_HALT          15
59 #define KVM_REQ_STEAL_UPDATE      16
60 #define KVM_REQ_NMI               17
61 #define KVM_REQ_PMU               18
62 #define KVM_REQ_PMI               19
63 #define KVM_REQ_SMI               20
64 #define KVM_REQ_MASTERCLOCK_UPDATE 21
65 #define KVM_REQ_MCLOCK_INPROGRESS 22
66 #define KVM_REQ_SCAN_IOAPIC       23
67 #define KVM_REQ_GLOBAL_CLOCK_UPDATE 24
68 #define KVM_REQ_APIC_PAGE_RELOAD  25
69 #define KVM_REQ_HV_CRASH          26
70 #define KVM_REQ_IOAPIC_EOI_EXIT   27
71 #define KVM_REQ_HV_RESET          28
72 #define KVM_REQ_HV_EXIT           29
73 #define KVM_REQ_HV_STIMER         30
74 
75 #define CR0_RESERVED_BITS                                               \
76 	(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
77 			  | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
78 			  | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
79 
80 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL
81 #define CR3_PCID_INVD		 BIT_64(63)
82 #define CR4_RESERVED_BITS                                               \
83 	(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
84 			  | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
85 			  | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
86 			  | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
87 			  | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP \
88 			  | X86_CR4_PKE))
89 
90 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
91 
92 
93 
94 #define INVALID_PAGE (~(hpa_t)0)
95 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
96 
97 #define UNMAPPED_GVA (~(gpa_t)0)
98 
99 /* KVM Hugepage definitions for x86 */
100 #define KVM_NR_PAGE_SIZES	3
101 #define KVM_HPAGE_GFN_SHIFT(x)	(((x) - 1) * 9)
102 #define KVM_HPAGE_SHIFT(x)	(PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
103 #define KVM_HPAGE_SIZE(x)	(1UL << KVM_HPAGE_SHIFT(x))
104 #define KVM_HPAGE_MASK(x)	(~(KVM_HPAGE_SIZE(x) - 1))
105 #define KVM_PAGES_PER_HPAGE(x)	(KVM_HPAGE_SIZE(x) / PAGE_SIZE)
106 
107 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
108 {
109 	/* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
110 	return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
111 		(base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
112 }
113 
114 #define KVM_PERMILLE_MMU_PAGES 20
115 #define KVM_MIN_ALLOC_MMU_PAGES 64
116 #define KVM_MMU_HASH_SHIFT 10
117 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
118 #define KVM_MIN_FREE_MMU_PAGES 5
119 #define KVM_REFILL_PAGES 25
120 #define KVM_MAX_CPUID_ENTRIES 80
121 #define KVM_NR_FIXED_MTRR_REGION 88
122 #define KVM_NR_VAR_MTRR 8
123 
124 #define ASYNC_PF_PER_VCPU 64
125 
126 enum kvm_reg {
127 	VCPU_REGS_RAX = 0,
128 	VCPU_REGS_RCX = 1,
129 	VCPU_REGS_RDX = 2,
130 	VCPU_REGS_RBX = 3,
131 	VCPU_REGS_RSP = 4,
132 	VCPU_REGS_RBP = 5,
133 	VCPU_REGS_RSI = 6,
134 	VCPU_REGS_RDI = 7,
135 #ifdef CONFIG_X86_64
136 	VCPU_REGS_R8 = 8,
137 	VCPU_REGS_R9 = 9,
138 	VCPU_REGS_R10 = 10,
139 	VCPU_REGS_R11 = 11,
140 	VCPU_REGS_R12 = 12,
141 	VCPU_REGS_R13 = 13,
142 	VCPU_REGS_R14 = 14,
143 	VCPU_REGS_R15 = 15,
144 #endif
145 	VCPU_REGS_RIP,
146 	NR_VCPU_REGS
147 };
148 
149 enum kvm_reg_ex {
150 	VCPU_EXREG_PDPTR = NR_VCPU_REGS,
151 	VCPU_EXREG_CR3,
152 	VCPU_EXREG_RFLAGS,
153 	VCPU_EXREG_SEGMENTS,
154 };
155 
156 enum {
157 	VCPU_SREG_ES,
158 	VCPU_SREG_CS,
159 	VCPU_SREG_SS,
160 	VCPU_SREG_DS,
161 	VCPU_SREG_FS,
162 	VCPU_SREG_GS,
163 	VCPU_SREG_TR,
164 	VCPU_SREG_LDTR,
165 };
166 
167 #include <asm/kvm_emulate.h>
168 
169 #define KVM_NR_MEM_OBJS 40
170 
171 #define KVM_NR_DB_REGS	4
172 
173 #define DR6_BD		(1 << 13)
174 #define DR6_BS		(1 << 14)
175 #define DR6_RTM		(1 << 16)
176 #define DR6_FIXED_1	0xfffe0ff0
177 #define DR6_INIT	0xffff0ff0
178 #define DR6_VOLATILE	0x0001e00f
179 
180 #define DR7_BP_EN_MASK	0x000000ff
181 #define DR7_GE		(1 << 9)
182 #define DR7_GD		(1 << 13)
183 #define DR7_FIXED_1	0x00000400
184 #define DR7_VOLATILE	0xffff2bff
185 
186 #define PFERR_PRESENT_BIT 0
187 #define PFERR_WRITE_BIT 1
188 #define PFERR_USER_BIT 2
189 #define PFERR_RSVD_BIT 3
190 #define PFERR_FETCH_BIT 4
191 #define PFERR_PK_BIT 5
192 
193 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
194 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
195 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
196 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
197 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
198 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
199 
200 /* apic attention bits */
201 #define KVM_APIC_CHECK_VAPIC	0
202 /*
203  * The following bit is set with PV-EOI, unset on EOI.
204  * We detect PV-EOI changes by guest by comparing
205  * this bit with PV-EOI in guest memory.
206  * See the implementation in apic_update_pv_eoi.
207  */
208 #define KVM_APIC_PV_EOI_PENDING	1
209 
210 struct kvm_kernel_irq_routing_entry;
211 
212 /*
213  * We don't want allocation failures within the mmu code, so we preallocate
214  * enough memory for a single page fault in a cache.
215  */
216 struct kvm_mmu_memory_cache {
217 	int nobjs;
218 	void *objects[KVM_NR_MEM_OBJS];
219 };
220 
221 /*
222  * the pages used as guest page table on soft mmu are tracked by
223  * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
224  * by indirect shadow page can not be more than 15 bits.
225  *
226  * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access,
227  * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
228  */
229 union kvm_mmu_page_role {
230 	unsigned word;
231 	struct {
232 		unsigned level:4;
233 		unsigned cr4_pae:1;
234 		unsigned quadrant:2;
235 		unsigned direct:1;
236 		unsigned access:3;
237 		unsigned invalid:1;
238 		unsigned nxe:1;
239 		unsigned cr0_wp:1;
240 		unsigned smep_andnot_wp:1;
241 		unsigned smap_andnot_wp:1;
242 		unsigned :8;
243 
244 		/*
245 		 * This is left at the top of the word so that
246 		 * kvm_memslots_for_spte_role can extract it with a
247 		 * simple shift.  While there is room, give it a whole
248 		 * byte so it is also faster to load it from memory.
249 		 */
250 		unsigned smm:8;
251 	};
252 };
253 
254 struct kvm_rmap_head {
255 	unsigned long val;
256 };
257 
258 struct kvm_mmu_page {
259 	struct list_head link;
260 	struct hlist_node hash_link;
261 
262 	/*
263 	 * The following two entries are used to key the shadow page in the
264 	 * hash table.
265 	 */
266 	gfn_t gfn;
267 	union kvm_mmu_page_role role;
268 
269 	u64 *spt;
270 	/* hold the gfn of each spte inside spt */
271 	gfn_t *gfns;
272 	bool unsync;
273 	int root_count;          /* Currently serving as active root */
274 	unsigned int unsync_children;
275 	struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
276 
277 	/* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen.  */
278 	unsigned long mmu_valid_gen;
279 
280 	DECLARE_BITMAP(unsync_child_bitmap, 512);
281 
282 #ifdef CONFIG_X86_32
283 	/*
284 	 * Used out of the mmu-lock to avoid reading spte values while an
285 	 * update is in progress; see the comments in __get_spte_lockless().
286 	 */
287 	int clear_spte_count;
288 #endif
289 
290 	/* Number of writes since the last time traversal visited this page.  */
291 	atomic_t write_flooding_count;
292 };
293 
294 struct kvm_pio_request {
295 	unsigned long count;
296 	int in;
297 	int port;
298 	int size;
299 };
300 
301 struct rsvd_bits_validate {
302 	u64 rsvd_bits_mask[2][4];
303 	u64 bad_mt_xwr;
304 };
305 
306 /*
307  * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
308  * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
309  * mode.
310  */
311 struct kvm_mmu {
312 	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
313 	unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
314 	u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
315 	int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
316 			  bool prefault);
317 	void (*inject_page_fault)(struct kvm_vcpu *vcpu,
318 				  struct x86_exception *fault);
319 	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
320 			    struct x86_exception *exception);
321 	gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
322 			       struct x86_exception *exception);
323 	int (*sync_page)(struct kvm_vcpu *vcpu,
324 			 struct kvm_mmu_page *sp);
325 	void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
326 	void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
327 			   u64 *spte, const void *pte);
328 	hpa_t root_hpa;
329 	int root_level;
330 	int shadow_root_level;
331 	union kvm_mmu_page_role base_role;
332 	bool direct_map;
333 
334 	/*
335 	 * Bitmap; bit set = permission fault
336 	 * Byte index: page fault error code [4:1]
337 	 * Bit index: pte permissions in ACC_* format
338 	 */
339 	u8 permissions[16];
340 
341 	/*
342 	* The pkru_mask indicates if protection key checks are needed.  It
343 	* consists of 16 domains indexed by page fault error code bits [4:1],
344 	* with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
345 	* Each domain has 2 bits which are ANDed with AD and WD from PKRU.
346 	*/
347 	u32 pkru_mask;
348 
349 	u64 *pae_root;
350 	u64 *lm_root;
351 
352 	/*
353 	 * check zero bits on shadow page table entries, these
354 	 * bits include not only hardware reserved bits but also
355 	 * the bits spte never used.
356 	 */
357 	struct rsvd_bits_validate shadow_zero_check;
358 
359 	struct rsvd_bits_validate guest_rsvd_check;
360 
361 	/* Can have large pages at levels 2..last_nonleaf_level-1. */
362 	u8 last_nonleaf_level;
363 
364 	bool nx;
365 
366 	u64 pdptrs[4]; /* pae */
367 };
368 
369 enum pmc_type {
370 	KVM_PMC_GP = 0,
371 	KVM_PMC_FIXED,
372 };
373 
374 struct kvm_pmc {
375 	enum pmc_type type;
376 	u8 idx;
377 	u64 counter;
378 	u64 eventsel;
379 	struct perf_event *perf_event;
380 	struct kvm_vcpu *vcpu;
381 };
382 
383 struct kvm_pmu {
384 	unsigned nr_arch_gp_counters;
385 	unsigned nr_arch_fixed_counters;
386 	unsigned available_event_types;
387 	u64 fixed_ctr_ctrl;
388 	u64 global_ctrl;
389 	u64 global_status;
390 	u64 global_ovf_ctrl;
391 	u64 counter_bitmask[2];
392 	u64 global_ctrl_mask;
393 	u64 reserved_bits;
394 	u8 version;
395 	struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
396 	struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
397 	struct irq_work irq_work;
398 	u64 reprogram_pmi;
399 };
400 
401 struct kvm_pmu_ops;
402 
403 enum {
404 	KVM_DEBUGREG_BP_ENABLED = 1,
405 	KVM_DEBUGREG_WONT_EXIT = 2,
406 	KVM_DEBUGREG_RELOAD = 4,
407 };
408 
409 struct kvm_mtrr_range {
410 	u64 base;
411 	u64 mask;
412 	struct list_head node;
413 };
414 
415 struct kvm_mtrr {
416 	struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
417 	mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
418 	u64 deftype;
419 
420 	struct list_head head;
421 };
422 
423 /* Hyper-V SynIC timer */
424 struct kvm_vcpu_hv_stimer {
425 	struct hrtimer timer;
426 	int index;
427 	u64 config;
428 	u64 count;
429 	u64 exp_time;
430 	struct hv_message msg;
431 	bool msg_pending;
432 };
433 
434 /* Hyper-V synthetic interrupt controller (SynIC)*/
435 struct kvm_vcpu_hv_synic {
436 	u64 version;
437 	u64 control;
438 	u64 msg_page;
439 	u64 evt_page;
440 	atomic64_t sint[HV_SYNIC_SINT_COUNT];
441 	atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
442 	DECLARE_BITMAP(auto_eoi_bitmap, 256);
443 	DECLARE_BITMAP(vec_bitmap, 256);
444 	bool active;
445 };
446 
447 /* Hyper-V per vcpu emulation context */
448 struct kvm_vcpu_hv {
449 	u64 hv_vapic;
450 	s64 runtime_offset;
451 	struct kvm_vcpu_hv_synic synic;
452 	struct kvm_hyperv_exit exit;
453 	struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
454 	DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
455 };
456 
457 struct kvm_vcpu_arch {
458 	/*
459 	 * rip and regs accesses must go through
460 	 * kvm_{register,rip}_{read,write} functions.
461 	 */
462 	unsigned long regs[NR_VCPU_REGS];
463 	u32 regs_avail;
464 	u32 regs_dirty;
465 
466 	unsigned long cr0;
467 	unsigned long cr0_guest_owned_bits;
468 	unsigned long cr2;
469 	unsigned long cr3;
470 	unsigned long cr4;
471 	unsigned long cr4_guest_owned_bits;
472 	unsigned long cr8;
473 	u32 hflags;
474 	u64 efer;
475 	u64 apic_base;
476 	struct kvm_lapic *apic;    /* kernel irqchip context */
477 	bool apicv_active;
478 	DECLARE_BITMAP(ioapic_handled_vectors, 256);
479 	unsigned long apic_attention;
480 	int32_t apic_arb_prio;
481 	int mp_state;
482 	u64 ia32_misc_enable_msr;
483 	u64 smbase;
484 	bool tpr_access_reporting;
485 	u64 ia32_xss;
486 
487 	/*
488 	 * Paging state of the vcpu
489 	 *
490 	 * If the vcpu runs in guest mode with two level paging this still saves
491 	 * the paging mode of the l1 guest. This context is always used to
492 	 * handle faults.
493 	 */
494 	struct kvm_mmu mmu;
495 
496 	/*
497 	 * Paging state of an L2 guest (used for nested npt)
498 	 *
499 	 * This context will save all necessary information to walk page tables
500 	 * of the an L2 guest. This context is only initialized for page table
501 	 * walking and not for faulting since we never handle l2 page faults on
502 	 * the host.
503 	 */
504 	struct kvm_mmu nested_mmu;
505 
506 	/*
507 	 * Pointer to the mmu context currently used for
508 	 * gva_to_gpa translations.
509 	 */
510 	struct kvm_mmu *walk_mmu;
511 
512 	struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
513 	struct kvm_mmu_memory_cache mmu_page_cache;
514 	struct kvm_mmu_memory_cache mmu_page_header_cache;
515 
516 	struct fpu guest_fpu;
517 	u64 xcr0;
518 	u64 guest_supported_xcr0;
519 	u32 guest_xstate_size;
520 
521 	struct kvm_pio_request pio;
522 	void *pio_data;
523 
524 	u8 event_exit_inst_len;
525 
526 	struct kvm_queued_exception {
527 		bool pending;
528 		bool has_error_code;
529 		bool reinject;
530 		u8 nr;
531 		u32 error_code;
532 	} exception;
533 
534 	struct kvm_queued_interrupt {
535 		bool pending;
536 		bool soft;
537 		u8 nr;
538 	} interrupt;
539 
540 	int halt_request; /* real mode on Intel only */
541 
542 	int cpuid_nent;
543 	struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
544 
545 	int maxphyaddr;
546 
547 	/* emulate context */
548 
549 	struct x86_emulate_ctxt emulate_ctxt;
550 	bool emulate_regs_need_sync_to_vcpu;
551 	bool emulate_regs_need_sync_from_vcpu;
552 	int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
553 
554 	gpa_t time;
555 	struct pvclock_vcpu_time_info hv_clock;
556 	unsigned int hw_tsc_khz;
557 	struct gfn_to_hva_cache pv_time;
558 	bool pv_time_enabled;
559 	/* set guest stopped flag in pvclock flags field */
560 	bool pvclock_set_guest_stopped_request;
561 
562 	struct {
563 		u64 msr_val;
564 		u64 last_steal;
565 		u64 accum_steal;
566 		struct gfn_to_hva_cache stime;
567 		struct kvm_steal_time steal;
568 	} st;
569 
570 	u64 last_guest_tsc;
571 	u64 last_host_tsc;
572 	u64 tsc_offset_adjustment;
573 	u64 this_tsc_nsec;
574 	u64 this_tsc_write;
575 	u64 this_tsc_generation;
576 	bool tsc_catchup;
577 	bool tsc_always_catchup;
578 	s8 virtual_tsc_shift;
579 	u32 virtual_tsc_mult;
580 	u32 virtual_tsc_khz;
581 	s64 ia32_tsc_adjust_msr;
582 	u64 tsc_scaling_ratio;
583 
584 	atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */
585 	unsigned nmi_pending; /* NMI queued after currently running handler */
586 	bool nmi_injected;    /* Trying to inject an NMI this entry */
587 	bool smi_pending;    /* SMI queued after currently running handler */
588 
589 	struct kvm_mtrr mtrr_state;
590 	u64 pat;
591 
592 	unsigned switch_db_regs;
593 	unsigned long db[KVM_NR_DB_REGS];
594 	unsigned long dr6;
595 	unsigned long dr7;
596 	unsigned long eff_db[KVM_NR_DB_REGS];
597 	unsigned long guest_debug_dr7;
598 
599 	u64 mcg_cap;
600 	u64 mcg_status;
601 	u64 mcg_ctl;
602 	u64 *mce_banks;
603 
604 	/* Cache MMIO info */
605 	u64 mmio_gva;
606 	unsigned access;
607 	gfn_t mmio_gfn;
608 	u64 mmio_gen;
609 
610 	struct kvm_pmu pmu;
611 
612 	/* used for guest single stepping over the given code position */
613 	unsigned long singlestep_rip;
614 
615 	struct kvm_vcpu_hv hyperv;
616 
617 	cpumask_var_t wbinvd_dirty_mask;
618 
619 	unsigned long last_retry_eip;
620 	unsigned long last_retry_addr;
621 
622 	struct {
623 		bool halted;
624 		gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
625 		struct gfn_to_hva_cache data;
626 		u64 msr_val;
627 		u32 id;
628 		bool send_user_only;
629 	} apf;
630 
631 	/* OSVW MSRs (AMD only) */
632 	struct {
633 		u64 length;
634 		u64 status;
635 	} osvw;
636 
637 	struct {
638 		u64 msr_val;
639 		struct gfn_to_hva_cache data;
640 	} pv_eoi;
641 
642 	/*
643 	 * Indicate whether the access faults on its page table in guest
644 	 * which is set when fix page fault and used to detect unhandeable
645 	 * instruction.
646 	 */
647 	bool write_fault_to_shadow_pgtable;
648 
649 	/* set at EPT violation at this point */
650 	unsigned long exit_qualification;
651 
652 	/* pv related host specific info */
653 	struct {
654 		bool pv_unhalted;
655 	} pv;
656 
657 	int pending_ioapic_eoi;
658 	int pending_external_vector;
659 };
660 
661 struct kvm_lpage_info {
662 	int disallow_lpage;
663 };
664 
665 struct kvm_arch_memory_slot {
666 	struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
667 	struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
668 	unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
669 };
670 
671 /*
672  * We use as the mode the number of bits allocated in the LDR for the
673  * logical processor ID.  It happens that these are all powers of two.
674  * This makes it is very easy to detect cases where the APICs are
675  * configured for multiple modes; in that case, we cannot use the map and
676  * hence cannot use kvm_irq_delivery_to_apic_fast either.
677  */
678 #define KVM_APIC_MODE_XAPIC_CLUSTER          4
679 #define KVM_APIC_MODE_XAPIC_FLAT             8
680 #define KVM_APIC_MODE_X2APIC                16
681 
682 struct kvm_apic_map {
683 	struct rcu_head rcu;
684 	u8 mode;
685 	struct kvm_lapic *phys_map[256];
686 	/* first index is cluster id second is cpu id in a cluster */
687 	struct kvm_lapic *logical_map[16][16];
688 };
689 
690 /* Hyper-V emulation context */
691 struct kvm_hv {
692 	u64 hv_guest_os_id;
693 	u64 hv_hypercall;
694 	u64 hv_tsc_page;
695 
696 	/* Hyper-v based guest crash (NT kernel bugcheck) parameters */
697 	u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
698 	u64 hv_crash_ctl;
699 };
700 
701 struct kvm_arch {
702 	unsigned int n_used_mmu_pages;
703 	unsigned int n_requested_mmu_pages;
704 	unsigned int n_max_mmu_pages;
705 	unsigned int indirect_shadow_pages;
706 	unsigned long mmu_valid_gen;
707 	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
708 	/*
709 	 * Hash table of struct kvm_mmu_page.
710 	 */
711 	struct list_head active_mmu_pages;
712 	struct list_head zapped_obsolete_pages;
713 	struct kvm_page_track_notifier_node mmu_sp_tracker;
714 	struct kvm_page_track_notifier_head track_notifier_head;
715 
716 	struct list_head assigned_dev_head;
717 	struct iommu_domain *iommu_domain;
718 	bool iommu_noncoherent;
719 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
720 	atomic_t noncoherent_dma_count;
721 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
722 	atomic_t assigned_device_count;
723 	struct kvm_pic *vpic;
724 	struct kvm_ioapic *vioapic;
725 	struct kvm_pit *vpit;
726 	atomic_t vapics_in_nmi_mode;
727 	struct mutex apic_map_lock;
728 	struct kvm_apic_map *apic_map;
729 
730 	unsigned int tss_addr;
731 	bool apic_access_page_done;
732 
733 	gpa_t wall_clock;
734 
735 	bool ept_identity_pagetable_done;
736 	gpa_t ept_identity_map_addr;
737 
738 	unsigned long irq_sources_bitmap;
739 	s64 kvmclock_offset;
740 	raw_spinlock_t tsc_write_lock;
741 	u64 last_tsc_nsec;
742 	u64 last_tsc_write;
743 	u32 last_tsc_khz;
744 	u64 cur_tsc_nsec;
745 	u64 cur_tsc_write;
746 	u64 cur_tsc_offset;
747 	u64 cur_tsc_generation;
748 	int nr_vcpus_matched_tsc;
749 
750 	spinlock_t pvclock_gtod_sync_lock;
751 	bool use_master_clock;
752 	u64 master_kernel_ns;
753 	cycle_t master_cycle_now;
754 	struct delayed_work kvmclock_update_work;
755 	struct delayed_work kvmclock_sync_work;
756 
757 	struct kvm_xen_hvm_config xen_hvm_config;
758 
759 	/* reads protected by irq_srcu, writes by irq_lock */
760 	struct hlist_head mask_notifier_list;
761 
762 	struct kvm_hv hyperv;
763 
764 	#ifdef CONFIG_KVM_MMU_AUDIT
765 	int audit_point;
766 	#endif
767 
768 	bool boot_vcpu_runs_old_kvmclock;
769 	u32 bsp_vcpu_id;
770 
771 	u64 disabled_quirks;
772 
773 	bool irqchip_split;
774 	u8 nr_reserved_ioapic_pins;
775 
776 	bool disabled_lapic_found;
777 };
778 
779 struct kvm_vm_stat {
780 	u32 mmu_shadow_zapped;
781 	u32 mmu_pte_write;
782 	u32 mmu_pte_updated;
783 	u32 mmu_pde_zapped;
784 	u32 mmu_flooded;
785 	u32 mmu_recycled;
786 	u32 mmu_cache_miss;
787 	u32 mmu_unsync;
788 	u32 remote_tlb_flush;
789 	u32 lpages;
790 };
791 
792 struct kvm_vcpu_stat {
793 	u32 pf_fixed;
794 	u32 pf_guest;
795 	u32 tlb_flush;
796 	u32 invlpg;
797 
798 	u32 exits;
799 	u32 io_exits;
800 	u32 mmio_exits;
801 	u32 signal_exits;
802 	u32 irq_window_exits;
803 	u32 nmi_window_exits;
804 	u32 halt_exits;
805 	u32 halt_successful_poll;
806 	u32 halt_attempted_poll;
807 	u32 halt_wakeup;
808 	u32 request_irq_exits;
809 	u32 irq_exits;
810 	u32 host_state_reload;
811 	u32 efer_reload;
812 	u32 fpu_reload;
813 	u32 insn_emulation;
814 	u32 insn_emulation_fail;
815 	u32 hypercalls;
816 	u32 irq_injections;
817 	u32 nmi_injections;
818 };
819 
820 struct x86_instruction_info;
821 
822 struct msr_data {
823 	bool host_initiated;
824 	u32 index;
825 	u64 data;
826 };
827 
828 struct kvm_lapic_irq {
829 	u32 vector;
830 	u16 delivery_mode;
831 	u16 dest_mode;
832 	bool level;
833 	u16 trig_mode;
834 	u32 shorthand;
835 	u32 dest_id;
836 	bool msi_redir_hint;
837 };
838 
839 struct kvm_x86_ops {
840 	int (*cpu_has_kvm_support)(void);          /* __init */
841 	int (*disabled_by_bios)(void);             /* __init */
842 	int (*hardware_enable)(void);
843 	void (*hardware_disable)(void);
844 	void (*check_processor_compatibility)(void *rtn);
845 	int (*hardware_setup)(void);               /* __init */
846 	void (*hardware_unsetup)(void);            /* __exit */
847 	bool (*cpu_has_accelerated_tpr)(void);
848 	bool (*cpu_has_high_real_mode_segbase)(void);
849 	void (*cpuid_update)(struct kvm_vcpu *vcpu);
850 
851 	/* Create, but do not attach this VCPU */
852 	struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
853 	void (*vcpu_free)(struct kvm_vcpu *vcpu);
854 	void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
855 
856 	void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
857 	void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
858 	void (*vcpu_put)(struct kvm_vcpu *vcpu);
859 
860 	void (*update_bp_intercept)(struct kvm_vcpu *vcpu);
861 	int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
862 	int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
863 	u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
864 	void (*get_segment)(struct kvm_vcpu *vcpu,
865 			    struct kvm_segment *var, int seg);
866 	int (*get_cpl)(struct kvm_vcpu *vcpu);
867 	void (*set_segment)(struct kvm_vcpu *vcpu,
868 			    struct kvm_segment *var, int seg);
869 	void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
870 	void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
871 	void (*decache_cr3)(struct kvm_vcpu *vcpu);
872 	void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
873 	void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
874 	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
875 	int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
876 	void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
877 	void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
878 	void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
879 	void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
880 	void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
881 	u64 (*get_dr6)(struct kvm_vcpu *vcpu);
882 	void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
883 	void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
884 	void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
885 	void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
886 	unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
887 	void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
888 	u32 (*get_pkru)(struct kvm_vcpu *vcpu);
889 	void (*fpu_activate)(struct kvm_vcpu *vcpu);
890 	void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
891 
892 	void (*tlb_flush)(struct kvm_vcpu *vcpu);
893 
894 	void (*run)(struct kvm_vcpu *vcpu);
895 	int (*handle_exit)(struct kvm_vcpu *vcpu);
896 	void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
897 	void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
898 	u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
899 	void (*patch_hypercall)(struct kvm_vcpu *vcpu,
900 				unsigned char *hypercall_addr);
901 	void (*set_irq)(struct kvm_vcpu *vcpu);
902 	void (*set_nmi)(struct kvm_vcpu *vcpu);
903 	void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
904 				bool has_error_code, u32 error_code,
905 				bool reinject);
906 	void (*cancel_injection)(struct kvm_vcpu *vcpu);
907 	int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
908 	int (*nmi_allowed)(struct kvm_vcpu *vcpu);
909 	bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
910 	void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
911 	void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
912 	void (*enable_irq_window)(struct kvm_vcpu *vcpu);
913 	void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
914 	bool (*get_enable_apicv)(void);
915 	void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
916 	void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
917 	void (*hwapic_isr_update)(struct kvm *kvm, int isr);
918 	void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
919 	void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set);
920 	void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
921 	void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
922 	void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
923 	int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
924 	int (*get_tdp_level)(void);
925 	u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
926 	int (*get_lpage_level)(void);
927 	bool (*rdtscp_supported)(void);
928 	bool (*invpcid_supported)(void);
929 	void (*adjust_tsc_offset_guest)(struct kvm_vcpu *vcpu, s64 adjustment);
930 
931 	void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
932 
933 	void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
934 
935 	bool (*has_wbinvd_exit)(void);
936 
937 	u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
938 	void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
939 
940 	u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
941 
942 	void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
943 
944 	int (*check_intercept)(struct kvm_vcpu *vcpu,
945 			       struct x86_instruction_info *info,
946 			       enum x86_intercept_stage stage);
947 	void (*handle_external_intr)(struct kvm_vcpu *vcpu);
948 	bool (*mpx_supported)(void);
949 	bool (*xsaves_supported)(void);
950 
951 	int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
952 
953 	void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
954 
955 	/*
956 	 * Arch-specific dirty logging hooks. These hooks are only supposed to
957 	 * be valid if the specific arch has hardware-accelerated dirty logging
958 	 * mechanism. Currently only for PML on VMX.
959 	 *
960 	 *  - slot_enable_log_dirty:
961 	 *	called when enabling log dirty mode for the slot.
962 	 *  - slot_disable_log_dirty:
963 	 *	called when disabling log dirty mode for the slot.
964 	 *	also called when slot is created with log dirty disabled.
965 	 *  - flush_log_dirty:
966 	 *	called before reporting dirty_bitmap to userspace.
967 	 *  - enable_log_dirty_pt_masked:
968 	 *	called when reenabling log dirty for the GFNs in the mask after
969 	 *	corresponding bits are cleared in slot->dirty_bitmap.
970 	 */
971 	void (*slot_enable_log_dirty)(struct kvm *kvm,
972 				      struct kvm_memory_slot *slot);
973 	void (*slot_disable_log_dirty)(struct kvm *kvm,
974 				       struct kvm_memory_slot *slot);
975 	void (*flush_log_dirty)(struct kvm *kvm);
976 	void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
977 					   struct kvm_memory_slot *slot,
978 					   gfn_t offset, unsigned long mask);
979 	/* pmu operations of sub-arch */
980 	const struct kvm_pmu_ops *pmu_ops;
981 
982 	/*
983 	 * Architecture specific hooks for vCPU blocking due to
984 	 * HLT instruction.
985 	 * Returns for .pre_block():
986 	 *    - 0 means continue to block the vCPU.
987 	 *    - 1 means we cannot block the vCPU since some event
988 	 *        happens during this period, such as, 'ON' bit in
989 	 *        posted-interrupts descriptor is set.
990 	 */
991 	int (*pre_block)(struct kvm_vcpu *vcpu);
992 	void (*post_block)(struct kvm_vcpu *vcpu);
993 	int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
994 			      uint32_t guest_irq, bool set);
995 };
996 
997 struct kvm_arch_async_pf {
998 	u32 token;
999 	gfn_t gfn;
1000 	unsigned long cr3;
1001 	bool direct_map;
1002 };
1003 
1004 extern struct kvm_x86_ops *kvm_x86_ops;
1005 
1006 int kvm_mmu_module_init(void);
1007 void kvm_mmu_module_exit(void);
1008 
1009 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1010 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1011 void kvm_mmu_setup(struct kvm_vcpu *vcpu);
1012 void kvm_mmu_init_vm(struct kvm *kvm);
1013 void kvm_mmu_uninit_vm(struct kvm *kvm);
1014 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
1015 		u64 dirty_mask, u64 nx_mask, u64 x_mask);
1016 
1017 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1018 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1019 				      struct kvm_memory_slot *memslot);
1020 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1021 				   const struct kvm_memory_slot *memslot);
1022 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1023 				   struct kvm_memory_slot *memslot);
1024 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
1025 					struct kvm_memory_slot *memslot);
1026 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
1027 			    struct kvm_memory_slot *memslot);
1028 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1029 				   struct kvm_memory_slot *slot,
1030 				   gfn_t gfn_offset, unsigned long mask);
1031 void kvm_mmu_zap_all(struct kvm *kvm);
1032 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots);
1033 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
1034 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
1035 
1036 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1037 
1038 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1039 			  const void *val, int bytes);
1040 
1041 struct kvm_irq_mask_notifier {
1042 	void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1043 	int irq;
1044 	struct hlist_node link;
1045 };
1046 
1047 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1048 				    struct kvm_irq_mask_notifier *kimn);
1049 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1050 				      struct kvm_irq_mask_notifier *kimn);
1051 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1052 			     bool mask);
1053 
1054 extern bool tdp_enabled;
1055 
1056 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1057 
1058 /* control of guest tsc rate supported? */
1059 extern bool kvm_has_tsc_control;
1060 /* maximum supported tsc_khz for guests */
1061 extern u32  kvm_max_guest_tsc_khz;
1062 /* number of bits of the fractional part of the TSC scaling ratio */
1063 extern u8   kvm_tsc_scaling_ratio_frac_bits;
1064 /* maximum allowed value of TSC scaling ratio */
1065 extern u64  kvm_max_tsc_scaling_ratio;
1066 
1067 enum emulation_result {
1068 	EMULATE_DONE,         /* no further processing */
1069 	EMULATE_USER_EXIT,    /* kvm_run ready for userspace exit */
1070 	EMULATE_FAIL,         /* can't emulate this instruction */
1071 };
1072 
1073 #define EMULTYPE_NO_DECODE	    (1 << 0)
1074 #define EMULTYPE_TRAP_UD	    (1 << 1)
1075 #define EMULTYPE_SKIP		    (1 << 2)
1076 #define EMULTYPE_RETRY		    (1 << 3)
1077 #define EMULTYPE_NO_REEXECUTE	    (1 << 4)
1078 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
1079 			    int emulation_type, void *insn, int insn_len);
1080 
1081 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
1082 			int emulation_type)
1083 {
1084 	return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
1085 }
1086 
1087 void kvm_enable_efer_bits(u64);
1088 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1089 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
1090 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
1091 
1092 struct x86_emulate_ctxt;
1093 
1094 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
1095 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1096 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1097 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1098 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1099 
1100 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1101 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1102 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1103 
1104 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1105 		    int reason, bool has_error_code, u32 error_code);
1106 
1107 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1108 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1109 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1110 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1111 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1112 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1113 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1114 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1115 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1116 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1117 
1118 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1119 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1120 
1121 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1122 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1123 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1124 
1125 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1126 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1127 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1128 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1129 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1130 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1131 			    gfn_t gfn, void *data, int offset, int len,
1132 			    u32 access);
1133 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1134 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1135 
1136 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1137 				       int irq_source_id, int level)
1138 {
1139 	/* Logical OR for level trig interrupt */
1140 	if (level)
1141 		__set_bit(irq_source_id, irq_state);
1142 	else
1143 		__clear_bit(irq_source_id, irq_state);
1144 
1145 	return !!(*irq_state);
1146 }
1147 
1148 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1149 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1150 
1151 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1152 
1153 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1154 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1155 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1156 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1157 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1158 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1159 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1160 			   struct x86_exception *exception);
1161 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1162 			      struct x86_exception *exception);
1163 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1164 			       struct x86_exception *exception);
1165 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1166 			       struct x86_exception *exception);
1167 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1168 				struct x86_exception *exception);
1169 
1170 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);
1171 
1172 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1173 
1174 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
1175 		       void *insn, int insn_len);
1176 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1177 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu);
1178 
1179 void kvm_enable_tdp(void);
1180 void kvm_disable_tdp(void);
1181 
1182 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1183 				  struct x86_exception *exception)
1184 {
1185 	return gpa;
1186 }
1187 
1188 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1189 {
1190 	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1191 
1192 	return (struct kvm_mmu_page *)page_private(page);
1193 }
1194 
1195 static inline u16 kvm_read_ldt(void)
1196 {
1197 	u16 ldt;
1198 	asm("sldt %0" : "=g"(ldt));
1199 	return ldt;
1200 }
1201 
1202 static inline void kvm_load_ldt(u16 sel)
1203 {
1204 	asm("lldt %0" : : "rm"(sel));
1205 }
1206 
1207 #ifdef CONFIG_X86_64
1208 static inline unsigned long read_msr(unsigned long msr)
1209 {
1210 	u64 value;
1211 
1212 	rdmsrl(msr, value);
1213 	return value;
1214 }
1215 #endif
1216 
1217 static inline u32 get_rdx_init_val(void)
1218 {
1219 	return 0x600; /* P6 family */
1220 }
1221 
1222 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1223 {
1224 	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1225 }
1226 
1227 static inline u64 get_canonical(u64 la)
1228 {
1229 	return ((int64_t)la << 16) >> 16;
1230 }
1231 
1232 static inline bool is_noncanonical_address(u64 la)
1233 {
1234 #ifdef CONFIG_X86_64
1235 	return get_canonical(la) != la;
1236 #else
1237 	return false;
1238 #endif
1239 }
1240 
1241 #define TSS_IOPB_BASE_OFFSET 0x66
1242 #define TSS_BASE_SIZE 0x68
1243 #define TSS_IOPB_SIZE (65536 / 8)
1244 #define TSS_REDIRECTION_SIZE (256 / 8)
1245 #define RMODE_TSS_SIZE							\
1246 	(TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1247 
1248 enum {
1249 	TASK_SWITCH_CALL = 0,
1250 	TASK_SWITCH_IRET = 1,
1251 	TASK_SWITCH_JMP = 2,
1252 	TASK_SWITCH_GATE = 3,
1253 };
1254 
1255 #define HF_GIF_MASK		(1 << 0)
1256 #define HF_HIF_MASK		(1 << 1)
1257 #define HF_VINTR_MASK		(1 << 2)
1258 #define HF_NMI_MASK		(1 << 3)
1259 #define HF_IRET_MASK		(1 << 4)
1260 #define HF_GUEST_MASK		(1 << 5) /* VCPU is in guest-mode */
1261 #define HF_SMM_MASK		(1 << 6)
1262 #define HF_SMM_INSIDE_NMI_MASK	(1 << 7)
1263 
1264 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1265 #define KVM_ADDRESS_SPACE_NUM 2
1266 
1267 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1268 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1269 
1270 /*
1271  * Hardware virtualization extension instructions may fault if a
1272  * reboot turns off virtualization while processes are running.
1273  * Trap the fault and ignore the instruction if that happens.
1274  */
1275 asmlinkage void kvm_spurious_fault(void);
1276 
1277 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn)	\
1278 	"666: " insn "\n\t" \
1279 	"668: \n\t"                           \
1280 	".pushsection .fixup, \"ax\" \n" \
1281 	"667: \n\t" \
1282 	cleanup_insn "\n\t"		      \
1283 	"cmpb $0, kvm_rebooting \n\t"	      \
1284 	"jne 668b \n\t"      		      \
1285 	__ASM_SIZE(push) " $666b \n\t"	      \
1286 	"call kvm_spurious_fault \n\t"	      \
1287 	".popsection \n\t" \
1288 	_ASM_EXTABLE(666b, 667b)
1289 
1290 #define __kvm_handle_fault_on_reboot(insn)		\
1291 	____kvm_handle_fault_on_reboot(insn, "")
1292 
1293 #define KVM_ARCH_WANT_MMU_NOTIFIER
1294 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
1295 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1296 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1297 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1298 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1299 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1300 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1301 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1302 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1303 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1304 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1305 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
1306 					   unsigned long address);
1307 
1308 void kvm_define_shared_msr(unsigned index, u32 msr);
1309 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1310 
1311 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
1312 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1313 
1314 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1315 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1316 
1317 void kvm_make_mclock_inprogress_request(struct kvm *kvm);
1318 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1319 
1320 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1321 				     struct kvm_async_pf *work);
1322 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1323 				 struct kvm_async_pf *work);
1324 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1325 			       struct kvm_async_pf *work);
1326 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1327 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1328 
1329 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1330 
1331 int kvm_is_in_guest(void);
1332 
1333 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1334 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1335 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1336 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1337 
1338 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1339 			     struct kvm_vcpu **dest_vcpu);
1340 
1341 void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,
1342 		     struct kvm_lapic_irq *irq);
1343 
1344 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
1345 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
1346 
1347 #endif /* _ASM_X86_KVM_HOST_H */
1348