1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 #include <linux/irq.h> 21 22 #include <linux/kvm.h> 23 #include <linux/kvm_para.h> 24 #include <linux/kvm_types.h> 25 #include <linux/perf_event.h> 26 #include <linux/pvclock_gtod.h> 27 #include <linux/clocksource.h> 28 #include <linux/irqbypass.h> 29 #include <linux/hyperv.h> 30 31 #include <asm/apic.h> 32 #include <asm/pvclock-abi.h> 33 #include <asm/desc.h> 34 #include <asm/mtrr.h> 35 #include <asm/msr-index.h> 36 #include <asm/asm.h> 37 #include <asm/kvm_page_track.h> 38 #include <asm/kvm_vcpu_regs.h> 39 #include <asm/hyperv-tlfs.h> 40 41 #define KVM_MAX_VCPUS 288 42 #define KVM_SOFT_MAX_VCPUS 240 43 #define KVM_MAX_VCPU_ID 1023 44 #define KVM_USER_MEM_SLOTS 509 45 /* memory slots that are not exposed to userspace */ 46 #define KVM_PRIVATE_MEM_SLOTS 3 47 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 48 49 #define KVM_HALT_POLL_NS_DEFAULT 200000 50 51 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 52 53 /* x86-specific vcpu->requests bit members */ 54 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 55 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 56 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 57 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 58 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 59 #define KVM_REQ_LOAD_CR3 KVM_ARCH_REQ(5) 60 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 61 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 62 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 63 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 64 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 65 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 66 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 67 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 68 #define KVM_REQ_MCLOCK_INPROGRESS \ 69 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 70 #define KVM_REQ_SCAN_IOAPIC \ 71 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 72 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 73 #define KVM_REQ_APIC_PAGE_RELOAD \ 74 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 75 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 76 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 77 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 78 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 79 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 80 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 81 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24) 82 83 #define CR0_RESERVED_BITS \ 84 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 85 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 86 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 87 88 #define CR4_RESERVED_BITS \ 89 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 90 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 91 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 92 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 93 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 94 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 95 96 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 97 98 99 100 #define INVALID_PAGE (~(hpa_t)0) 101 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 102 103 #define UNMAPPED_GVA (~(gpa_t)0) 104 105 /* KVM Hugepage definitions for x86 */ 106 enum { 107 PT_PAGE_TABLE_LEVEL = 1, 108 PT_DIRECTORY_LEVEL = 2, 109 PT_PDPE_LEVEL = 3, 110 /* set max level to the biggest one */ 111 PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL, 112 }; 113 #define KVM_NR_PAGE_SIZES (PT_MAX_HUGEPAGE_LEVEL - \ 114 PT_PAGE_TABLE_LEVEL + 1) 115 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 116 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 117 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 118 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 119 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 120 121 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 122 { 123 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 124 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 125 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 126 } 127 128 #define KVM_PERMILLE_MMU_PAGES 20 129 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 130 #define KVM_MMU_HASH_SHIFT 12 131 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 132 #define KVM_MIN_FREE_MMU_PAGES 5 133 #define KVM_REFILL_PAGES 25 134 #define KVM_MAX_CPUID_ENTRIES 80 135 #define KVM_NR_FIXED_MTRR_REGION 88 136 #define KVM_NR_VAR_MTRR 8 137 138 #define ASYNC_PF_PER_VCPU 64 139 140 enum kvm_reg { 141 VCPU_REGS_RAX = __VCPU_REGS_RAX, 142 VCPU_REGS_RCX = __VCPU_REGS_RCX, 143 VCPU_REGS_RDX = __VCPU_REGS_RDX, 144 VCPU_REGS_RBX = __VCPU_REGS_RBX, 145 VCPU_REGS_RSP = __VCPU_REGS_RSP, 146 VCPU_REGS_RBP = __VCPU_REGS_RBP, 147 VCPU_REGS_RSI = __VCPU_REGS_RSI, 148 VCPU_REGS_RDI = __VCPU_REGS_RDI, 149 #ifdef CONFIG_X86_64 150 VCPU_REGS_R8 = __VCPU_REGS_R8, 151 VCPU_REGS_R9 = __VCPU_REGS_R9, 152 VCPU_REGS_R10 = __VCPU_REGS_R10, 153 VCPU_REGS_R11 = __VCPU_REGS_R11, 154 VCPU_REGS_R12 = __VCPU_REGS_R12, 155 VCPU_REGS_R13 = __VCPU_REGS_R13, 156 VCPU_REGS_R14 = __VCPU_REGS_R14, 157 VCPU_REGS_R15 = __VCPU_REGS_R15, 158 #endif 159 VCPU_REGS_RIP, 160 NR_VCPU_REGS 161 }; 162 163 enum kvm_reg_ex { 164 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 165 VCPU_EXREG_CR3, 166 VCPU_EXREG_RFLAGS, 167 VCPU_EXREG_SEGMENTS, 168 }; 169 170 enum { 171 VCPU_SREG_ES, 172 VCPU_SREG_CS, 173 VCPU_SREG_SS, 174 VCPU_SREG_DS, 175 VCPU_SREG_FS, 176 VCPU_SREG_GS, 177 VCPU_SREG_TR, 178 VCPU_SREG_LDTR, 179 }; 180 181 #include <asm/kvm_emulate.h> 182 183 #define KVM_NR_MEM_OBJS 40 184 185 #define KVM_NR_DB_REGS 4 186 187 #define DR6_BD (1 << 13) 188 #define DR6_BS (1 << 14) 189 #define DR6_BT (1 << 15) 190 #define DR6_RTM (1 << 16) 191 #define DR6_FIXED_1 0xfffe0ff0 192 #define DR6_INIT 0xffff0ff0 193 #define DR6_VOLATILE 0x0001e00f 194 195 #define DR7_BP_EN_MASK 0x000000ff 196 #define DR7_GE (1 << 9) 197 #define DR7_GD (1 << 13) 198 #define DR7_FIXED_1 0x00000400 199 #define DR7_VOLATILE 0xffff2bff 200 201 #define PFERR_PRESENT_BIT 0 202 #define PFERR_WRITE_BIT 1 203 #define PFERR_USER_BIT 2 204 #define PFERR_RSVD_BIT 3 205 #define PFERR_FETCH_BIT 4 206 #define PFERR_PK_BIT 5 207 #define PFERR_GUEST_FINAL_BIT 32 208 #define PFERR_GUEST_PAGE_BIT 33 209 210 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 211 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 212 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 213 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 214 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 215 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 216 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 217 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 218 219 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 220 PFERR_WRITE_MASK | \ 221 PFERR_PRESENT_MASK) 222 223 /* 224 * The mask used to denote special SPTEs, which can be either MMIO SPTEs or 225 * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting 226 * with the SVE bit in EPT PTEs. 227 */ 228 #define SPTE_SPECIAL_MASK (1ULL << 62) 229 230 /* apic attention bits */ 231 #define KVM_APIC_CHECK_VAPIC 0 232 /* 233 * The following bit is set with PV-EOI, unset on EOI. 234 * We detect PV-EOI changes by guest by comparing 235 * this bit with PV-EOI in guest memory. 236 * See the implementation in apic_update_pv_eoi. 237 */ 238 #define KVM_APIC_PV_EOI_PENDING 1 239 240 struct kvm_kernel_irq_routing_entry; 241 242 /* 243 * We don't want allocation failures within the mmu code, so we preallocate 244 * enough memory for a single page fault in a cache. 245 */ 246 struct kvm_mmu_memory_cache { 247 int nobjs; 248 void *objects[KVM_NR_MEM_OBJS]; 249 }; 250 251 /* 252 * the pages used as guest page table on soft mmu are tracked by 253 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 254 * by indirect shadow page can not be more than 15 bits. 255 * 256 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 257 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 258 */ 259 union kvm_mmu_page_role { 260 u32 word; 261 struct { 262 unsigned level:4; 263 unsigned gpte_is_8_bytes:1; 264 unsigned quadrant:2; 265 unsigned direct:1; 266 unsigned access:3; 267 unsigned invalid:1; 268 unsigned nxe:1; 269 unsigned cr0_wp:1; 270 unsigned smep_andnot_wp:1; 271 unsigned smap_andnot_wp:1; 272 unsigned ad_disabled:1; 273 unsigned guest_mode:1; 274 unsigned :6; 275 276 /* 277 * This is left at the top of the word so that 278 * kvm_memslots_for_spte_role can extract it with a 279 * simple shift. While there is room, give it a whole 280 * byte so it is also faster to load it from memory. 281 */ 282 unsigned smm:8; 283 }; 284 }; 285 286 union kvm_mmu_extended_role { 287 /* 288 * This structure complements kvm_mmu_page_role caching everything needed for 289 * MMU configuration. If nothing in both these structures changed, MMU 290 * re-configuration can be skipped. @valid bit is set on first usage so we don't 291 * treat all-zero structure as valid data. 292 */ 293 u32 word; 294 struct { 295 unsigned int valid:1; 296 unsigned int execonly:1; 297 unsigned int cr0_pg:1; 298 unsigned int cr4_pse:1; 299 unsigned int cr4_pke:1; 300 unsigned int cr4_smap:1; 301 unsigned int cr4_smep:1; 302 unsigned int cr4_la57:1; 303 unsigned int maxphyaddr:6; 304 }; 305 }; 306 307 union kvm_mmu_role { 308 u64 as_u64; 309 struct { 310 union kvm_mmu_page_role base; 311 union kvm_mmu_extended_role ext; 312 }; 313 }; 314 315 struct kvm_rmap_head { 316 unsigned long val; 317 }; 318 319 struct kvm_mmu_page { 320 struct list_head link; 321 struct hlist_node hash_link; 322 bool unsync; 323 bool mmio_cached; 324 325 /* 326 * The following two entries are used to key the shadow page in the 327 * hash table. 328 */ 329 union kvm_mmu_page_role role; 330 gfn_t gfn; 331 332 u64 *spt; 333 /* hold the gfn of each spte inside spt */ 334 gfn_t *gfns; 335 int root_count; /* Currently serving as active root */ 336 unsigned int unsync_children; 337 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 338 DECLARE_BITMAP(unsync_child_bitmap, 512); 339 340 #ifdef CONFIG_X86_32 341 /* 342 * Used out of the mmu-lock to avoid reading spte values while an 343 * update is in progress; see the comments in __get_spte_lockless(). 344 */ 345 int clear_spte_count; 346 #endif 347 348 /* Number of writes since the last time traversal visited this page. */ 349 atomic_t write_flooding_count; 350 }; 351 352 struct kvm_pio_request { 353 unsigned long linear_rip; 354 unsigned long count; 355 int in; 356 int port; 357 int size; 358 }; 359 360 #define PT64_ROOT_MAX_LEVEL 5 361 362 struct rsvd_bits_validate { 363 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 364 u64 bad_mt_xwr; 365 }; 366 367 struct kvm_mmu_root_info { 368 gpa_t cr3; 369 hpa_t hpa; 370 }; 371 372 #define KVM_MMU_ROOT_INFO_INVALID \ 373 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE }) 374 375 #define KVM_MMU_NUM_PREV_ROOTS 3 376 377 /* 378 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 379 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 380 * current mmu mode. 381 */ 382 struct kvm_mmu { 383 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 384 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 385 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 386 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 387 bool prefault); 388 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 389 struct x86_exception *fault); 390 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 391 struct x86_exception *exception); 392 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 393 struct x86_exception *exception); 394 int (*sync_page)(struct kvm_vcpu *vcpu, 395 struct kvm_mmu_page *sp); 396 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 397 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 398 u64 *spte, const void *pte); 399 hpa_t root_hpa; 400 gpa_t root_cr3; 401 union kvm_mmu_role mmu_role; 402 u8 root_level; 403 u8 shadow_root_level; 404 u8 ept_ad; 405 bool direct_map; 406 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 407 408 /* 409 * Bitmap; bit set = permission fault 410 * Byte index: page fault error code [4:1] 411 * Bit index: pte permissions in ACC_* format 412 */ 413 u8 permissions[16]; 414 415 /* 416 * The pkru_mask indicates if protection key checks are needed. It 417 * consists of 16 domains indexed by page fault error code bits [4:1], 418 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 419 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 420 */ 421 u32 pkru_mask; 422 423 u64 *pae_root; 424 u64 *lm_root; 425 426 /* 427 * check zero bits on shadow page table entries, these 428 * bits include not only hardware reserved bits but also 429 * the bits spte never used. 430 */ 431 struct rsvd_bits_validate shadow_zero_check; 432 433 struct rsvd_bits_validate guest_rsvd_check; 434 435 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 436 u8 last_nonleaf_level; 437 438 bool nx; 439 440 u64 pdptrs[4]; /* pae */ 441 }; 442 443 struct kvm_tlb_range { 444 u64 start_gfn; 445 u64 pages; 446 }; 447 448 enum pmc_type { 449 KVM_PMC_GP = 0, 450 KVM_PMC_FIXED, 451 }; 452 453 struct kvm_pmc { 454 enum pmc_type type; 455 u8 idx; 456 u64 counter; 457 u64 eventsel; 458 struct perf_event *perf_event; 459 struct kvm_vcpu *vcpu; 460 }; 461 462 struct kvm_pmu { 463 unsigned nr_arch_gp_counters; 464 unsigned nr_arch_fixed_counters; 465 unsigned available_event_types; 466 u64 fixed_ctr_ctrl; 467 u64 global_ctrl; 468 u64 global_status; 469 u64 global_ovf_ctrl; 470 u64 counter_bitmask[2]; 471 u64 global_ctrl_mask; 472 u64 reserved_bits; 473 u8 version; 474 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 475 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 476 struct irq_work irq_work; 477 u64 reprogram_pmi; 478 }; 479 480 struct kvm_pmu_ops; 481 482 enum { 483 KVM_DEBUGREG_BP_ENABLED = 1, 484 KVM_DEBUGREG_WONT_EXIT = 2, 485 KVM_DEBUGREG_RELOAD = 4, 486 }; 487 488 struct kvm_mtrr_range { 489 u64 base; 490 u64 mask; 491 struct list_head node; 492 }; 493 494 struct kvm_mtrr { 495 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 496 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 497 u64 deftype; 498 499 struct list_head head; 500 }; 501 502 /* Hyper-V SynIC timer */ 503 struct kvm_vcpu_hv_stimer { 504 struct hrtimer timer; 505 int index; 506 union hv_stimer_config config; 507 u64 count; 508 u64 exp_time; 509 struct hv_message msg; 510 bool msg_pending; 511 }; 512 513 /* Hyper-V synthetic interrupt controller (SynIC)*/ 514 struct kvm_vcpu_hv_synic { 515 u64 version; 516 u64 control; 517 u64 msg_page; 518 u64 evt_page; 519 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 520 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 521 DECLARE_BITMAP(auto_eoi_bitmap, 256); 522 DECLARE_BITMAP(vec_bitmap, 256); 523 bool active; 524 bool dont_zero_synic_pages; 525 }; 526 527 /* Hyper-V per vcpu emulation context */ 528 struct kvm_vcpu_hv { 529 u32 vp_index; 530 u64 hv_vapic; 531 s64 runtime_offset; 532 struct kvm_vcpu_hv_synic synic; 533 struct kvm_hyperv_exit exit; 534 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 535 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 536 cpumask_t tlb_flush; 537 }; 538 539 struct kvm_vcpu_arch { 540 /* 541 * rip and regs accesses must go through 542 * kvm_{register,rip}_{read,write} functions. 543 */ 544 unsigned long regs[NR_VCPU_REGS]; 545 u32 regs_avail; 546 u32 regs_dirty; 547 548 unsigned long cr0; 549 unsigned long cr0_guest_owned_bits; 550 unsigned long cr2; 551 unsigned long cr3; 552 unsigned long cr4; 553 unsigned long cr4_guest_owned_bits; 554 unsigned long cr8; 555 u32 pkru; 556 u32 hflags; 557 u64 efer; 558 u64 apic_base; 559 struct kvm_lapic *apic; /* kernel irqchip context */ 560 bool apicv_active; 561 bool load_eoi_exitmap_pending; 562 DECLARE_BITMAP(ioapic_handled_vectors, 256); 563 unsigned long apic_attention; 564 int32_t apic_arb_prio; 565 int mp_state; 566 u64 ia32_misc_enable_msr; 567 u64 smbase; 568 u64 smi_count; 569 bool tpr_access_reporting; 570 u64 ia32_xss; 571 u64 microcode_version; 572 u64 arch_capabilities; 573 574 /* 575 * Paging state of the vcpu 576 * 577 * If the vcpu runs in guest mode with two level paging this still saves 578 * the paging mode of the l1 guest. This context is always used to 579 * handle faults. 580 */ 581 struct kvm_mmu *mmu; 582 583 /* Non-nested MMU for L1 */ 584 struct kvm_mmu root_mmu; 585 586 /* L1 MMU when running nested */ 587 struct kvm_mmu guest_mmu; 588 589 /* 590 * Paging state of an L2 guest (used for nested npt) 591 * 592 * This context will save all necessary information to walk page tables 593 * of the an L2 guest. This context is only initialized for page table 594 * walking and not for faulting since we never handle l2 page faults on 595 * the host. 596 */ 597 struct kvm_mmu nested_mmu; 598 599 /* 600 * Pointer to the mmu context currently used for 601 * gva_to_gpa translations. 602 */ 603 struct kvm_mmu *walk_mmu; 604 605 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 606 struct kvm_mmu_memory_cache mmu_page_cache; 607 struct kvm_mmu_memory_cache mmu_page_header_cache; 608 609 /* 610 * QEMU userspace and the guest each have their own FPU state. 611 * In vcpu_run, we switch between the user, maintained in the 612 * task_struct struct, and guest FPU contexts. While running a VCPU, 613 * the VCPU thread will have the guest FPU context. 614 * 615 * Note that while the PKRU state lives inside the fpu registers, 616 * it is switched out separately at VMENTER and VMEXIT time. The 617 * "guest_fpu" state here contains the guest FPU context, with the 618 * host PRKU bits. 619 */ 620 struct fpu *guest_fpu; 621 622 u64 xcr0; 623 u64 guest_supported_xcr0; 624 u32 guest_xstate_size; 625 626 struct kvm_pio_request pio; 627 void *pio_data; 628 629 u8 event_exit_inst_len; 630 631 struct kvm_queued_exception { 632 bool pending; 633 bool injected; 634 bool has_error_code; 635 u8 nr; 636 u32 error_code; 637 unsigned long payload; 638 bool has_payload; 639 u8 nested_apf; 640 } exception; 641 642 struct kvm_queued_interrupt { 643 bool injected; 644 bool soft; 645 u8 nr; 646 } interrupt; 647 648 int halt_request; /* real mode on Intel only */ 649 650 int cpuid_nent; 651 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 652 653 int maxphyaddr; 654 655 /* emulate context */ 656 657 struct x86_emulate_ctxt emulate_ctxt; 658 bool emulate_regs_need_sync_to_vcpu; 659 bool emulate_regs_need_sync_from_vcpu; 660 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 661 662 gpa_t time; 663 struct pvclock_vcpu_time_info hv_clock; 664 unsigned int hw_tsc_khz; 665 struct gfn_to_hva_cache pv_time; 666 bool pv_time_enabled; 667 /* set guest stopped flag in pvclock flags field */ 668 bool pvclock_set_guest_stopped_request; 669 670 struct { 671 u64 msr_val; 672 u64 last_steal; 673 struct gfn_to_hva_cache stime; 674 struct kvm_steal_time steal; 675 } st; 676 677 u64 tsc_offset; 678 u64 last_guest_tsc; 679 u64 last_host_tsc; 680 u64 tsc_offset_adjustment; 681 u64 this_tsc_nsec; 682 u64 this_tsc_write; 683 u64 this_tsc_generation; 684 bool tsc_catchup; 685 bool tsc_always_catchup; 686 s8 virtual_tsc_shift; 687 u32 virtual_tsc_mult; 688 u32 virtual_tsc_khz; 689 s64 ia32_tsc_adjust_msr; 690 u64 tsc_scaling_ratio; 691 692 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 693 unsigned nmi_pending; /* NMI queued after currently running handler */ 694 bool nmi_injected; /* Trying to inject an NMI this entry */ 695 bool smi_pending; /* SMI queued after currently running handler */ 696 697 struct kvm_mtrr mtrr_state; 698 u64 pat; 699 700 unsigned switch_db_regs; 701 unsigned long db[KVM_NR_DB_REGS]; 702 unsigned long dr6; 703 unsigned long dr7; 704 unsigned long eff_db[KVM_NR_DB_REGS]; 705 unsigned long guest_debug_dr7; 706 u64 msr_platform_info; 707 u64 msr_misc_features_enables; 708 709 u64 mcg_cap; 710 u64 mcg_status; 711 u64 mcg_ctl; 712 u64 mcg_ext_ctl; 713 u64 *mce_banks; 714 715 /* Cache MMIO info */ 716 u64 mmio_gva; 717 unsigned access; 718 gfn_t mmio_gfn; 719 u64 mmio_gen; 720 721 struct kvm_pmu pmu; 722 723 /* used for guest single stepping over the given code position */ 724 unsigned long singlestep_rip; 725 726 struct kvm_vcpu_hv hyperv; 727 728 cpumask_var_t wbinvd_dirty_mask; 729 730 unsigned long last_retry_eip; 731 unsigned long last_retry_addr; 732 733 struct { 734 bool halted; 735 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 736 struct gfn_to_hva_cache data; 737 u64 msr_val; 738 u32 id; 739 bool send_user_only; 740 u32 host_apf_reason; 741 unsigned long nested_apf_token; 742 bool delivery_as_pf_vmexit; 743 } apf; 744 745 /* OSVW MSRs (AMD only) */ 746 struct { 747 u64 length; 748 u64 status; 749 } osvw; 750 751 struct { 752 u64 msr_val; 753 struct gfn_to_hva_cache data; 754 } pv_eoi; 755 756 /* 757 * Indicate whether the access faults on its page table in guest 758 * which is set when fix page fault and used to detect unhandeable 759 * instruction. 760 */ 761 bool write_fault_to_shadow_pgtable; 762 763 /* set at EPT violation at this point */ 764 unsigned long exit_qualification; 765 766 /* pv related host specific info */ 767 struct { 768 bool pv_unhalted; 769 } pv; 770 771 int pending_ioapic_eoi; 772 int pending_external_vector; 773 774 /* GPA available */ 775 bool gpa_available; 776 gpa_t gpa_val; 777 778 /* be preempted when it's in kernel-mode(cpl=0) */ 779 bool preempted_in_kernel; 780 781 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 782 bool l1tf_flush_l1d; 783 }; 784 785 struct kvm_lpage_info { 786 int disallow_lpage; 787 }; 788 789 struct kvm_arch_memory_slot { 790 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 791 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 792 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 793 }; 794 795 /* 796 * We use as the mode the number of bits allocated in the LDR for the 797 * logical processor ID. It happens that these are all powers of two. 798 * This makes it is very easy to detect cases where the APICs are 799 * configured for multiple modes; in that case, we cannot use the map and 800 * hence cannot use kvm_irq_delivery_to_apic_fast either. 801 */ 802 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 803 #define KVM_APIC_MODE_XAPIC_FLAT 8 804 #define KVM_APIC_MODE_X2APIC 16 805 806 struct kvm_apic_map { 807 struct rcu_head rcu; 808 u8 mode; 809 u32 max_apic_id; 810 union { 811 struct kvm_lapic *xapic_flat_map[8]; 812 struct kvm_lapic *xapic_cluster_map[16][4]; 813 }; 814 struct kvm_lapic *phys_map[]; 815 }; 816 817 /* Hyper-V emulation context */ 818 struct kvm_hv { 819 struct mutex hv_lock; 820 u64 hv_guest_os_id; 821 u64 hv_hypercall; 822 u64 hv_tsc_page; 823 824 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 825 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 826 u64 hv_crash_ctl; 827 828 HV_REFERENCE_TSC_PAGE tsc_ref; 829 830 struct idr conn_to_evt; 831 832 u64 hv_reenlightenment_control; 833 u64 hv_tsc_emulation_control; 834 u64 hv_tsc_emulation_status; 835 836 /* How many vCPUs have VP index != vCPU index */ 837 atomic_t num_mismatched_vp_indexes; 838 }; 839 840 enum kvm_irqchip_mode { 841 KVM_IRQCHIP_NONE, 842 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 843 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 844 }; 845 846 struct kvm_arch { 847 unsigned long n_used_mmu_pages; 848 unsigned long n_requested_mmu_pages; 849 unsigned long n_max_mmu_pages; 850 unsigned int indirect_shadow_pages; 851 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 852 /* 853 * Hash table of struct kvm_mmu_page. 854 */ 855 struct list_head active_mmu_pages; 856 struct kvm_page_track_notifier_node mmu_sp_tracker; 857 struct kvm_page_track_notifier_head track_notifier_head; 858 859 struct list_head assigned_dev_head; 860 struct iommu_domain *iommu_domain; 861 bool iommu_noncoherent; 862 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 863 atomic_t noncoherent_dma_count; 864 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 865 atomic_t assigned_device_count; 866 struct kvm_pic *vpic; 867 struct kvm_ioapic *vioapic; 868 struct kvm_pit *vpit; 869 atomic_t vapics_in_nmi_mode; 870 struct mutex apic_map_lock; 871 struct kvm_apic_map *apic_map; 872 873 bool apic_access_page_done; 874 875 gpa_t wall_clock; 876 877 bool mwait_in_guest; 878 bool hlt_in_guest; 879 bool pause_in_guest; 880 881 unsigned long irq_sources_bitmap; 882 s64 kvmclock_offset; 883 raw_spinlock_t tsc_write_lock; 884 u64 last_tsc_nsec; 885 u64 last_tsc_write; 886 u32 last_tsc_khz; 887 u64 cur_tsc_nsec; 888 u64 cur_tsc_write; 889 u64 cur_tsc_offset; 890 u64 cur_tsc_generation; 891 int nr_vcpus_matched_tsc; 892 893 spinlock_t pvclock_gtod_sync_lock; 894 bool use_master_clock; 895 u64 master_kernel_ns; 896 u64 master_cycle_now; 897 struct delayed_work kvmclock_update_work; 898 struct delayed_work kvmclock_sync_work; 899 900 struct kvm_xen_hvm_config xen_hvm_config; 901 902 /* reads protected by irq_srcu, writes by irq_lock */ 903 struct hlist_head mask_notifier_list; 904 905 struct kvm_hv hyperv; 906 907 #ifdef CONFIG_KVM_MMU_AUDIT 908 int audit_point; 909 #endif 910 911 bool backwards_tsc_observed; 912 bool boot_vcpu_runs_old_kvmclock; 913 u32 bsp_vcpu_id; 914 915 u64 disabled_quirks; 916 917 enum kvm_irqchip_mode irqchip_mode; 918 u8 nr_reserved_ioapic_pins; 919 920 bool disabled_lapic_found; 921 922 bool x2apic_format; 923 bool x2apic_broadcast_quirk_disabled; 924 925 bool guest_can_read_msr_platform_info; 926 bool exception_payload_enabled; 927 }; 928 929 struct kvm_vm_stat { 930 ulong mmu_shadow_zapped; 931 ulong mmu_pte_write; 932 ulong mmu_pte_updated; 933 ulong mmu_pde_zapped; 934 ulong mmu_flooded; 935 ulong mmu_recycled; 936 ulong mmu_cache_miss; 937 ulong mmu_unsync; 938 ulong remote_tlb_flush; 939 ulong lpages; 940 ulong max_mmu_page_hash_collisions; 941 }; 942 943 struct kvm_vcpu_stat { 944 u64 pf_fixed; 945 u64 pf_guest; 946 u64 tlb_flush; 947 u64 invlpg; 948 949 u64 exits; 950 u64 io_exits; 951 u64 mmio_exits; 952 u64 signal_exits; 953 u64 irq_window_exits; 954 u64 nmi_window_exits; 955 u64 l1d_flush; 956 u64 halt_exits; 957 u64 halt_successful_poll; 958 u64 halt_attempted_poll; 959 u64 halt_poll_invalid; 960 u64 halt_wakeup; 961 u64 request_irq_exits; 962 u64 irq_exits; 963 u64 host_state_reload; 964 u64 fpu_reload; 965 u64 insn_emulation; 966 u64 insn_emulation_fail; 967 u64 hypercalls; 968 u64 irq_injections; 969 u64 nmi_injections; 970 u64 req_event; 971 }; 972 973 struct x86_instruction_info; 974 975 struct msr_data { 976 bool host_initiated; 977 u32 index; 978 u64 data; 979 }; 980 981 struct kvm_lapic_irq { 982 u32 vector; 983 u16 delivery_mode; 984 u16 dest_mode; 985 bool level; 986 u16 trig_mode; 987 u32 shorthand; 988 u32 dest_id; 989 bool msi_redir_hint; 990 }; 991 992 struct kvm_x86_ops { 993 int (*cpu_has_kvm_support)(void); /* __init */ 994 int (*disabled_by_bios)(void); /* __init */ 995 int (*hardware_enable)(void); 996 void (*hardware_disable)(void); 997 void (*check_processor_compatibility)(void *rtn); 998 int (*hardware_setup)(void); /* __init */ 999 void (*hardware_unsetup)(void); /* __exit */ 1000 bool (*cpu_has_accelerated_tpr)(void); 1001 bool (*has_emulated_msr)(int index); 1002 void (*cpuid_update)(struct kvm_vcpu *vcpu); 1003 1004 struct kvm *(*vm_alloc)(void); 1005 void (*vm_free)(struct kvm *); 1006 int (*vm_init)(struct kvm *kvm); 1007 void (*vm_destroy)(struct kvm *kvm); 1008 1009 /* Create, but do not attach this VCPU */ 1010 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 1011 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1012 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1013 1014 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1015 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1016 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1017 1018 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 1019 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1020 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1021 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1022 void (*get_segment)(struct kvm_vcpu *vcpu, 1023 struct kvm_segment *var, int seg); 1024 int (*get_cpl)(struct kvm_vcpu *vcpu); 1025 void (*set_segment)(struct kvm_vcpu *vcpu, 1026 struct kvm_segment *var, int seg); 1027 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1028 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 1029 void (*decache_cr3)(struct kvm_vcpu *vcpu); 1030 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 1031 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1032 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1033 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1034 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1035 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1036 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1037 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1038 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1039 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 1040 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 1041 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1042 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1043 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1044 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1045 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1046 1047 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa); 1048 int (*tlb_remote_flush)(struct kvm *kvm); 1049 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1050 struct kvm_tlb_range *range); 1051 1052 /* 1053 * Flush any TLB entries associated with the given GVA. 1054 * Does not need to flush GPA->HPA mappings. 1055 * Can potentially get non-canonical addresses through INVLPGs, which 1056 * the implementation may choose to ignore if appropriate. 1057 */ 1058 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1059 1060 void (*run)(struct kvm_vcpu *vcpu); 1061 int (*handle_exit)(struct kvm_vcpu *vcpu); 1062 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1063 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1064 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1065 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1066 unsigned char *hypercall_addr); 1067 void (*set_irq)(struct kvm_vcpu *vcpu); 1068 void (*set_nmi)(struct kvm_vcpu *vcpu); 1069 void (*queue_exception)(struct kvm_vcpu *vcpu); 1070 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1071 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 1072 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 1073 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1074 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1075 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1076 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1077 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1078 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu); 1079 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1080 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1081 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1082 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1083 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1084 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1085 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 1086 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1087 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1088 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1089 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1090 int (*get_tdp_level)(struct kvm_vcpu *vcpu); 1091 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1092 int (*get_lpage_level)(void); 1093 bool (*rdtscp_supported)(void); 1094 bool (*invpcid_supported)(void); 1095 1096 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1097 1098 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 1099 1100 bool (*has_wbinvd_exit)(void); 1101 1102 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu); 1103 /* Returns actual tsc_offset set in active VMCS */ 1104 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1105 1106 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 1107 1108 int (*check_intercept)(struct kvm_vcpu *vcpu, 1109 struct x86_instruction_info *info, 1110 enum x86_intercept_stage stage); 1111 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 1112 bool (*mpx_supported)(void); 1113 bool (*xsaves_supported)(void); 1114 bool (*umip_emulated)(void); 1115 bool (*pt_supported)(void); 1116 1117 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 1118 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1119 1120 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1121 1122 /* 1123 * Arch-specific dirty logging hooks. These hooks are only supposed to 1124 * be valid if the specific arch has hardware-accelerated dirty logging 1125 * mechanism. Currently only for PML on VMX. 1126 * 1127 * - slot_enable_log_dirty: 1128 * called when enabling log dirty mode for the slot. 1129 * - slot_disable_log_dirty: 1130 * called when disabling log dirty mode for the slot. 1131 * also called when slot is created with log dirty disabled. 1132 * - flush_log_dirty: 1133 * called before reporting dirty_bitmap to userspace. 1134 * - enable_log_dirty_pt_masked: 1135 * called when reenabling log dirty for the GFNs in the mask after 1136 * corresponding bits are cleared in slot->dirty_bitmap. 1137 */ 1138 void (*slot_enable_log_dirty)(struct kvm *kvm, 1139 struct kvm_memory_slot *slot); 1140 void (*slot_disable_log_dirty)(struct kvm *kvm, 1141 struct kvm_memory_slot *slot); 1142 void (*flush_log_dirty)(struct kvm *kvm); 1143 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1144 struct kvm_memory_slot *slot, 1145 gfn_t offset, unsigned long mask); 1146 int (*write_log_dirty)(struct kvm_vcpu *vcpu); 1147 1148 /* pmu operations of sub-arch */ 1149 const struct kvm_pmu_ops *pmu_ops; 1150 1151 /* 1152 * Architecture specific hooks for vCPU blocking due to 1153 * HLT instruction. 1154 * Returns for .pre_block(): 1155 * - 0 means continue to block the vCPU. 1156 * - 1 means we cannot block the vCPU since some event 1157 * happens during this period, such as, 'ON' bit in 1158 * posted-interrupts descriptor is set. 1159 */ 1160 int (*pre_block)(struct kvm_vcpu *vcpu); 1161 void (*post_block)(struct kvm_vcpu *vcpu); 1162 1163 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1164 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1165 1166 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1167 uint32_t guest_irq, bool set); 1168 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1169 1170 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc); 1171 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1172 1173 void (*setup_mce)(struct kvm_vcpu *vcpu); 1174 1175 int (*get_nested_state)(struct kvm_vcpu *vcpu, 1176 struct kvm_nested_state __user *user_kvm_nested_state, 1177 unsigned user_data_size); 1178 int (*set_nested_state)(struct kvm_vcpu *vcpu, 1179 struct kvm_nested_state __user *user_kvm_nested_state, 1180 struct kvm_nested_state *kvm_state); 1181 void (*get_vmcs12_pages)(struct kvm_vcpu *vcpu); 1182 1183 int (*smi_allowed)(struct kvm_vcpu *vcpu); 1184 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1185 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1186 int (*enable_smi_window)(struct kvm_vcpu *vcpu); 1187 1188 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1189 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1190 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1191 1192 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1193 1194 int (*nested_enable_evmcs)(struct kvm_vcpu *vcpu, 1195 uint16_t *vmcs_version); 1196 uint16_t (*nested_get_evmcs_version)(struct kvm_vcpu *vcpu); 1197 1198 bool (*need_emulation_on_page_fault)(struct kvm_vcpu *vcpu); 1199 }; 1200 1201 struct kvm_arch_async_pf { 1202 u32 token; 1203 gfn_t gfn; 1204 unsigned long cr3; 1205 bool direct_map; 1206 }; 1207 1208 extern struct kvm_x86_ops *kvm_x86_ops; 1209 extern struct kmem_cache *x86_fpu_cache; 1210 1211 #define __KVM_HAVE_ARCH_VM_ALLOC 1212 static inline struct kvm *kvm_arch_alloc_vm(void) 1213 { 1214 return kvm_x86_ops->vm_alloc(); 1215 } 1216 1217 static inline void kvm_arch_free_vm(struct kvm *kvm) 1218 { 1219 return kvm_x86_ops->vm_free(kvm); 1220 } 1221 1222 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1223 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1224 { 1225 if (kvm_x86_ops->tlb_remote_flush && 1226 !kvm_x86_ops->tlb_remote_flush(kvm)) 1227 return 0; 1228 else 1229 return -ENOTSUPP; 1230 } 1231 1232 int kvm_mmu_module_init(void); 1233 void kvm_mmu_module_exit(void); 1234 1235 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1236 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1237 void kvm_mmu_init_vm(struct kvm *kvm); 1238 void kvm_mmu_uninit_vm(struct kvm *kvm); 1239 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1240 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1241 u64 acc_track_mask, u64 me_mask); 1242 1243 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1244 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1245 struct kvm_memory_slot *memslot); 1246 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1247 const struct kvm_memory_slot *memslot); 1248 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1249 struct kvm_memory_slot *memslot); 1250 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1251 struct kvm_memory_slot *memslot); 1252 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1253 struct kvm_memory_slot *memslot); 1254 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1255 struct kvm_memory_slot *slot, 1256 gfn_t gfn_offset, unsigned long mask); 1257 void kvm_mmu_zap_all(struct kvm *kvm); 1258 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1259 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1260 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1261 1262 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1263 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1264 1265 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1266 const void *val, int bytes); 1267 1268 struct kvm_irq_mask_notifier { 1269 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1270 int irq; 1271 struct hlist_node link; 1272 }; 1273 1274 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1275 struct kvm_irq_mask_notifier *kimn); 1276 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1277 struct kvm_irq_mask_notifier *kimn); 1278 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1279 bool mask); 1280 1281 extern bool tdp_enabled; 1282 1283 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1284 1285 /* control of guest tsc rate supported? */ 1286 extern bool kvm_has_tsc_control; 1287 /* maximum supported tsc_khz for guests */ 1288 extern u32 kvm_max_guest_tsc_khz; 1289 /* number of bits of the fractional part of the TSC scaling ratio */ 1290 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1291 /* maximum allowed value of TSC scaling ratio */ 1292 extern u64 kvm_max_tsc_scaling_ratio; 1293 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1294 extern u64 kvm_default_tsc_scaling_ratio; 1295 1296 extern u64 kvm_mce_cap_supported; 1297 1298 enum emulation_result { 1299 EMULATE_DONE, /* no further processing */ 1300 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 1301 EMULATE_FAIL, /* can't emulate this instruction */ 1302 }; 1303 1304 #define EMULTYPE_NO_DECODE (1 << 0) 1305 #define EMULTYPE_TRAP_UD (1 << 1) 1306 #define EMULTYPE_SKIP (1 << 2) 1307 #define EMULTYPE_ALLOW_RETRY (1 << 3) 1308 #define EMULTYPE_NO_UD_ON_FAIL (1 << 4) 1309 #define EMULTYPE_VMWARE (1 << 5) 1310 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1311 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1312 void *insn, int insn_len); 1313 1314 void kvm_enable_efer_bits(u64); 1315 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1316 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1317 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1318 1319 struct x86_emulate_ctxt; 1320 1321 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1322 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1323 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1324 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1325 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1326 1327 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1328 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1329 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1330 1331 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1332 int reason, bool has_error_code, u32 error_code); 1333 1334 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1335 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1336 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1337 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1338 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1339 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1340 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1341 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1342 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1343 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1344 1345 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1346 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1347 1348 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1349 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1350 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1351 1352 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1353 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1354 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1355 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1356 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1357 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1358 gfn_t gfn, void *data, int offset, int len, 1359 u32 access); 1360 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1361 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1362 1363 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1364 int irq_source_id, int level) 1365 { 1366 /* Logical OR for level trig interrupt */ 1367 if (level) 1368 __set_bit(irq_source_id, irq_state); 1369 else 1370 __clear_bit(irq_source_id, irq_state); 1371 1372 return !!(*irq_state); 1373 } 1374 1375 #define KVM_MMU_ROOT_CURRENT BIT(0) 1376 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1377 #define KVM_MMU_ROOTS_ALL (~0UL) 1378 1379 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1380 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1381 1382 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1383 1384 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1385 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1386 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1387 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1388 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1389 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1390 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1391 ulong roots_to_free); 1392 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1393 struct x86_exception *exception); 1394 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1395 struct x86_exception *exception); 1396 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1397 struct x86_exception *exception); 1398 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1399 struct x86_exception *exception); 1400 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1401 struct x86_exception *exception); 1402 1403 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu); 1404 1405 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1406 1407 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code, 1408 void *insn, int insn_len); 1409 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1410 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1411 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush); 1412 1413 void kvm_enable_tdp(void); 1414 void kvm_disable_tdp(void); 1415 1416 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1417 struct x86_exception *exception) 1418 { 1419 return gpa; 1420 } 1421 1422 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1423 { 1424 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1425 1426 return (struct kvm_mmu_page *)page_private(page); 1427 } 1428 1429 static inline u16 kvm_read_ldt(void) 1430 { 1431 u16 ldt; 1432 asm("sldt %0" : "=g"(ldt)); 1433 return ldt; 1434 } 1435 1436 static inline void kvm_load_ldt(u16 sel) 1437 { 1438 asm("lldt %0" : : "rm"(sel)); 1439 } 1440 1441 #ifdef CONFIG_X86_64 1442 static inline unsigned long read_msr(unsigned long msr) 1443 { 1444 u64 value; 1445 1446 rdmsrl(msr, value); 1447 return value; 1448 } 1449 #endif 1450 1451 static inline u32 get_rdx_init_val(void) 1452 { 1453 return 0x600; /* P6 family */ 1454 } 1455 1456 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1457 { 1458 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1459 } 1460 1461 #define TSS_IOPB_BASE_OFFSET 0x66 1462 #define TSS_BASE_SIZE 0x68 1463 #define TSS_IOPB_SIZE (65536 / 8) 1464 #define TSS_REDIRECTION_SIZE (256 / 8) 1465 #define RMODE_TSS_SIZE \ 1466 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1467 1468 enum { 1469 TASK_SWITCH_CALL = 0, 1470 TASK_SWITCH_IRET = 1, 1471 TASK_SWITCH_JMP = 2, 1472 TASK_SWITCH_GATE = 3, 1473 }; 1474 1475 #define HF_GIF_MASK (1 << 0) 1476 #define HF_HIF_MASK (1 << 1) 1477 #define HF_VINTR_MASK (1 << 2) 1478 #define HF_NMI_MASK (1 << 3) 1479 #define HF_IRET_MASK (1 << 4) 1480 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1481 #define HF_SMM_MASK (1 << 6) 1482 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1483 1484 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1485 #define KVM_ADDRESS_SPACE_NUM 2 1486 1487 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1488 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1489 1490 /* 1491 * Hardware virtualization extension instructions may fault if a 1492 * reboot turns off virtualization while processes are running. 1493 * Trap the fault and ignore the instruction if that happens. 1494 */ 1495 asmlinkage void kvm_spurious_fault(void); 1496 1497 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1498 "666: " insn "\n\t" \ 1499 "668: \n\t" \ 1500 ".pushsection .fixup, \"ax\" \n" \ 1501 "667: \n\t" \ 1502 cleanup_insn "\n\t" \ 1503 "cmpb $0, kvm_rebooting \n\t" \ 1504 "jne 668b \n\t" \ 1505 __ASM_SIZE(push) " $666b \n\t" \ 1506 "jmp kvm_spurious_fault \n\t" \ 1507 ".popsection \n\t" \ 1508 _ASM_EXTABLE(666b, 667b) 1509 1510 #define __kvm_handle_fault_on_reboot(insn) \ 1511 ____kvm_handle_fault_on_reboot(insn, "") 1512 1513 #define KVM_ARCH_WANT_MMU_NOTIFIER 1514 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1515 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1516 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1517 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1518 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1519 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1520 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1521 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1522 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1523 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1524 1525 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1526 unsigned long ipi_bitmap_high, u32 min, 1527 unsigned long icr, int op_64_bit); 1528 1529 u64 kvm_get_arch_capabilities(void); 1530 void kvm_define_shared_msr(unsigned index, u32 msr); 1531 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1532 1533 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1534 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1535 1536 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1537 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1538 1539 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1540 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1541 1542 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1543 struct kvm_async_pf *work); 1544 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1545 struct kvm_async_pf *work); 1546 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1547 struct kvm_async_pf *work); 1548 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1549 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1550 1551 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1552 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1553 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1554 1555 int kvm_is_in_guest(void); 1556 1557 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1558 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1559 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1560 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1561 1562 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1563 struct kvm_vcpu **dest_vcpu); 1564 1565 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1566 struct kvm_lapic_irq *irq); 1567 1568 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1569 { 1570 if (kvm_x86_ops->vcpu_blocking) 1571 kvm_x86_ops->vcpu_blocking(vcpu); 1572 } 1573 1574 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1575 { 1576 if (kvm_x86_ops->vcpu_unblocking) 1577 kvm_x86_ops->vcpu_unblocking(vcpu); 1578 } 1579 1580 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1581 1582 static inline int kvm_cpu_get_apicid(int mps_cpu) 1583 { 1584 #ifdef CONFIG_X86_LOCAL_APIC 1585 return default_cpu_present_to_apicid(mps_cpu); 1586 #else 1587 WARN_ON_ONCE(1); 1588 return BAD_APICID; 1589 #endif 1590 } 1591 1592 #define put_smstate(type, buf, offset, val) \ 1593 *(type *)((buf) + (offset) - 0x7e00) = val 1594 1595 #define GET_SMSTATE(type, buf, offset) \ 1596 (*(type *)((buf) + (offset) - 0x7e00)) 1597 1598 #endif /* _ASM_X86_KVM_HOST_H */ 1599