1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 #include <linux/workqueue.h> 19 20 #include <linux/kvm.h> 21 #include <linux/kvm_para.h> 22 #include <linux/kvm_types.h> 23 #include <linux/perf_event.h> 24 #include <linux/pvclock_gtod.h> 25 #include <linux/clocksource.h> 26 #include <linux/irqbypass.h> 27 #include <linux/hyperv.h> 28 29 #include <asm/apic.h> 30 #include <asm/pvclock-abi.h> 31 #include <asm/desc.h> 32 #include <asm/mtrr.h> 33 #include <asm/msr-index.h> 34 #include <asm/asm.h> 35 #include <asm/kvm_page_track.h> 36 #include <asm/kvm_vcpu_regs.h> 37 #include <asm/hyperv-tlfs.h> 38 39 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 40 41 #define KVM_MAX_VCPUS 1024 42 43 /* 44 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs 45 * might be larger than the actual number of VCPUs because the 46 * APIC ID encodes CPU topology information. 47 * 48 * In the worst case, we'll need less than one extra bit for the 49 * Core ID, and less than one extra bit for the Package (Die) ID, 50 * so ratio of 4 should be enough. 51 */ 52 #define KVM_VCPU_ID_RATIO 4 53 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO) 54 55 /* memory slots that are not exposed to userspace */ 56 #define KVM_INTERNAL_MEM_SLOTS 3 57 58 #define KVM_HALT_POLL_NS_DEFAULT 200000 59 60 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 61 62 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 63 KVM_DIRTY_LOG_INITIALLY_SET) 64 65 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \ 66 KVM_BUS_LOCK_DETECTION_EXIT) 67 68 #define KVM_X86_NOTIFY_VMEXIT_VALID_BITS (KVM_X86_NOTIFY_VMEXIT_ENABLED | \ 69 KVM_X86_NOTIFY_VMEXIT_USER) 70 71 /* x86-specific vcpu->requests bit members */ 72 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 73 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 74 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 75 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 76 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 77 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 78 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 79 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 80 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 81 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 82 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 83 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 84 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 85 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 86 #define KVM_REQ_MCLOCK_INPROGRESS \ 87 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 88 #define KVM_REQ_SCAN_IOAPIC \ 89 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 90 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 91 #define KVM_REQ_APIC_PAGE_RELOAD \ 92 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 93 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 94 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 95 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 96 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 97 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 98 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 99 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 100 #define KVM_REQ_APICV_UPDATE \ 101 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 102 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 103 #define KVM_REQ_TLB_FLUSH_GUEST \ 104 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 105 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 106 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 107 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \ 108 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 109 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \ 110 KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 111 112 #define CR0_RESERVED_BITS \ 113 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 114 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 115 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 116 117 #define CR4_RESERVED_BITS \ 118 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 119 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 120 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 121 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 122 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 123 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 124 125 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 126 127 128 129 #define INVALID_PAGE (~(hpa_t)0) 130 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 131 132 #define INVALID_GPA (~(gpa_t)0) 133 134 /* KVM Hugepage definitions for x86 */ 135 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 136 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 137 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 138 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 139 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 140 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 141 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 142 143 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50 144 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 145 #define KVM_MMU_HASH_SHIFT 12 146 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 147 #define KVM_MIN_FREE_MMU_PAGES 5 148 #define KVM_REFILL_PAGES 25 149 #define KVM_MAX_CPUID_ENTRIES 256 150 #define KVM_NR_FIXED_MTRR_REGION 88 151 #define KVM_NR_VAR_MTRR 8 152 153 #define ASYNC_PF_PER_VCPU 64 154 155 enum kvm_reg { 156 VCPU_REGS_RAX = __VCPU_REGS_RAX, 157 VCPU_REGS_RCX = __VCPU_REGS_RCX, 158 VCPU_REGS_RDX = __VCPU_REGS_RDX, 159 VCPU_REGS_RBX = __VCPU_REGS_RBX, 160 VCPU_REGS_RSP = __VCPU_REGS_RSP, 161 VCPU_REGS_RBP = __VCPU_REGS_RBP, 162 VCPU_REGS_RSI = __VCPU_REGS_RSI, 163 VCPU_REGS_RDI = __VCPU_REGS_RDI, 164 #ifdef CONFIG_X86_64 165 VCPU_REGS_R8 = __VCPU_REGS_R8, 166 VCPU_REGS_R9 = __VCPU_REGS_R9, 167 VCPU_REGS_R10 = __VCPU_REGS_R10, 168 VCPU_REGS_R11 = __VCPU_REGS_R11, 169 VCPU_REGS_R12 = __VCPU_REGS_R12, 170 VCPU_REGS_R13 = __VCPU_REGS_R13, 171 VCPU_REGS_R14 = __VCPU_REGS_R14, 172 VCPU_REGS_R15 = __VCPU_REGS_R15, 173 #endif 174 VCPU_REGS_RIP, 175 NR_VCPU_REGS, 176 177 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 178 VCPU_EXREG_CR0, 179 VCPU_EXREG_CR3, 180 VCPU_EXREG_CR4, 181 VCPU_EXREG_RFLAGS, 182 VCPU_EXREG_SEGMENTS, 183 VCPU_EXREG_EXIT_INFO_1, 184 VCPU_EXREG_EXIT_INFO_2, 185 }; 186 187 enum { 188 VCPU_SREG_ES, 189 VCPU_SREG_CS, 190 VCPU_SREG_SS, 191 VCPU_SREG_DS, 192 VCPU_SREG_FS, 193 VCPU_SREG_GS, 194 VCPU_SREG_TR, 195 VCPU_SREG_LDTR, 196 }; 197 198 enum exit_fastpath_completion { 199 EXIT_FASTPATH_NONE, 200 EXIT_FASTPATH_REENTER_GUEST, 201 EXIT_FASTPATH_EXIT_HANDLED, 202 }; 203 typedef enum exit_fastpath_completion fastpath_t; 204 205 struct x86_emulate_ctxt; 206 struct x86_exception; 207 enum x86_intercept; 208 enum x86_intercept_stage; 209 210 #define KVM_NR_DB_REGS 4 211 212 #define DR6_BUS_LOCK (1 << 11) 213 #define DR6_BD (1 << 13) 214 #define DR6_BS (1 << 14) 215 #define DR6_BT (1 << 15) 216 #define DR6_RTM (1 << 16) 217 /* 218 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits. 219 * We can regard all the bits in DR6_FIXED_1 as active_low bits; 220 * they will never be 0 for now, but when they are defined 221 * in the future it will require no code change. 222 * 223 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6. 224 */ 225 #define DR6_ACTIVE_LOW 0xffff0ff0 226 #define DR6_VOLATILE 0x0001e80f 227 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE) 228 229 #define DR7_BP_EN_MASK 0x000000ff 230 #define DR7_GE (1 << 9) 231 #define DR7_GD (1 << 13) 232 #define DR7_FIXED_1 0x00000400 233 #define DR7_VOLATILE 0xffff2bff 234 235 #define KVM_GUESTDBG_VALID_MASK \ 236 (KVM_GUESTDBG_ENABLE | \ 237 KVM_GUESTDBG_SINGLESTEP | \ 238 KVM_GUESTDBG_USE_HW_BP | \ 239 KVM_GUESTDBG_USE_SW_BP | \ 240 KVM_GUESTDBG_INJECT_BP | \ 241 KVM_GUESTDBG_INJECT_DB | \ 242 KVM_GUESTDBG_BLOCKIRQ) 243 244 245 #define PFERR_PRESENT_BIT 0 246 #define PFERR_WRITE_BIT 1 247 #define PFERR_USER_BIT 2 248 #define PFERR_RSVD_BIT 3 249 #define PFERR_FETCH_BIT 4 250 #define PFERR_PK_BIT 5 251 #define PFERR_SGX_BIT 15 252 #define PFERR_GUEST_FINAL_BIT 32 253 #define PFERR_GUEST_PAGE_BIT 33 254 #define PFERR_IMPLICIT_ACCESS_BIT 48 255 256 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 257 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 258 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 259 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 260 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 261 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 262 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT) 263 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 264 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 265 #define PFERR_IMPLICIT_ACCESS (1ULL << PFERR_IMPLICIT_ACCESS_BIT) 266 267 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 268 PFERR_WRITE_MASK | \ 269 PFERR_PRESENT_MASK) 270 271 /* apic attention bits */ 272 #define KVM_APIC_CHECK_VAPIC 0 273 /* 274 * The following bit is set with PV-EOI, unset on EOI. 275 * We detect PV-EOI changes by guest by comparing 276 * this bit with PV-EOI in guest memory. 277 * See the implementation in apic_update_pv_eoi. 278 */ 279 #define KVM_APIC_PV_EOI_PENDING 1 280 281 struct kvm_kernel_irq_routing_entry; 282 283 /* 284 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page 285 * also includes TDP pages) to determine whether or not a page can be used in 286 * the given MMU context. This is a subset of the overall kvm_cpu_role to 287 * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating 288 * 2 bytes per gfn instead of 4 bytes per gfn. 289 * 290 * Upper-level shadow pages having gptes are tracked for write-protection via 291 * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create 292 * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise 293 * gfn_track will overflow and explosions will ensure. 294 * 295 * A unique shadow page (SP) for a gfn is created if and only if an existing SP 296 * cannot be reused. The ability to reuse a SP is tracked by its role, which 297 * incorporates various mode bits and properties of the SP. Roughly speaking, 298 * the number of unique SPs that can theoretically be created is 2^n, where n 299 * is the number of bits that are used to compute the role. 300 * 301 * But, even though there are 19 bits in the mask below, not all combinations 302 * of modes and flags are possible: 303 * 304 * - invalid shadow pages are not accounted, so the bits are effectively 18 305 * 306 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging); 307 * execonly and ad_disabled are only used for nested EPT which has 308 * has_4_byte_gpte=0. Therefore, 2 bits are always unused. 309 * 310 * - the 4 bits of level are effectively limited to the values 2/3/4/5, 311 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE 312 * paging has exactly one upper level, making level completely redundant 313 * when has_4_byte_gpte=1. 314 * 315 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if 316 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities. 317 * 318 * Therefore, the maximum number of possible upper-level shadow pages for a 319 * single gfn is a bit less than 2^13. 320 */ 321 union kvm_mmu_page_role { 322 u32 word; 323 struct { 324 unsigned level:4; 325 unsigned has_4_byte_gpte:1; 326 unsigned quadrant:2; 327 unsigned direct:1; 328 unsigned access:3; 329 unsigned invalid:1; 330 unsigned efer_nx:1; 331 unsigned cr0_wp:1; 332 unsigned smep_andnot_wp:1; 333 unsigned smap_andnot_wp:1; 334 unsigned ad_disabled:1; 335 unsigned guest_mode:1; 336 unsigned passthrough:1; 337 unsigned :5; 338 339 /* 340 * This is left at the top of the word so that 341 * kvm_memslots_for_spte_role can extract it with a 342 * simple shift. While there is room, give it a whole 343 * byte so it is also faster to load it from memory. 344 */ 345 unsigned smm:8; 346 }; 347 }; 348 349 /* 350 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties 351 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER, 352 * including on nested transitions, if nothing in the full role changes then 353 * MMU re-configuration can be skipped. @valid bit is set on first usage so we 354 * don't treat all-zero structure as valid data. 355 * 356 * The properties that are tracked in the extended role but not the page role 357 * are for things that either (a) do not affect the validity of the shadow page 358 * or (b) are indirectly reflected in the shadow page's role. For example, 359 * CR4.PKE only affects permission checks for software walks of the guest page 360 * tables (because KVM doesn't support Protection Keys with shadow paging), and 361 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level. 362 * 363 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role. 364 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and 365 * SMAP, but the MMU's permission checks for software walks need to be SMEP and 366 * SMAP aware regardless of CR0.WP. 367 */ 368 union kvm_mmu_extended_role { 369 u32 word; 370 struct { 371 unsigned int valid:1; 372 unsigned int execonly:1; 373 unsigned int cr4_pse:1; 374 unsigned int cr4_pke:1; 375 unsigned int cr4_smap:1; 376 unsigned int cr4_smep:1; 377 unsigned int cr4_la57:1; 378 unsigned int efer_lma:1; 379 }; 380 }; 381 382 union kvm_cpu_role { 383 u64 as_u64; 384 struct { 385 union kvm_mmu_page_role base; 386 union kvm_mmu_extended_role ext; 387 }; 388 }; 389 390 struct kvm_rmap_head { 391 unsigned long val; 392 }; 393 394 struct kvm_pio_request { 395 unsigned long linear_rip; 396 unsigned long count; 397 int in; 398 int port; 399 int size; 400 }; 401 402 #define PT64_ROOT_MAX_LEVEL 5 403 404 struct rsvd_bits_validate { 405 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 406 u64 bad_mt_xwr; 407 }; 408 409 struct kvm_mmu_root_info { 410 gpa_t pgd; 411 hpa_t hpa; 412 }; 413 414 #define KVM_MMU_ROOT_INFO_INVALID \ 415 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 416 417 #define KVM_MMU_NUM_PREV_ROOTS 3 418 419 #define KVM_HAVE_MMU_RWLOCK 420 421 struct kvm_mmu_page; 422 struct kvm_page_fault; 423 424 /* 425 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 426 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 427 * current mmu mode. 428 */ 429 struct kvm_mmu { 430 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 431 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 432 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault); 433 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 434 struct x86_exception *fault); 435 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 436 gpa_t gva_or_gpa, u64 access, 437 struct x86_exception *exception); 438 int (*sync_page)(struct kvm_vcpu *vcpu, 439 struct kvm_mmu_page *sp); 440 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 441 struct kvm_mmu_root_info root; 442 union kvm_cpu_role cpu_role; 443 union kvm_mmu_page_role root_role; 444 445 /* 446 * The pkru_mask indicates if protection key checks are needed. It 447 * consists of 16 domains indexed by page fault error code bits [4:1], 448 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 449 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 450 */ 451 u32 pkru_mask; 452 453 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 454 455 /* 456 * Bitmap; bit set = permission fault 457 * Byte index: page fault error code [4:1] 458 * Bit index: pte permissions in ACC_* format 459 */ 460 u8 permissions[16]; 461 462 u64 *pae_root; 463 u64 *pml4_root; 464 u64 *pml5_root; 465 466 /* 467 * check zero bits on shadow page table entries, these 468 * bits include not only hardware reserved bits but also 469 * the bits spte never used. 470 */ 471 struct rsvd_bits_validate shadow_zero_check; 472 473 struct rsvd_bits_validate guest_rsvd_check; 474 475 u64 pdptrs[4]; /* pae */ 476 }; 477 478 struct kvm_tlb_range { 479 u64 start_gfn; 480 u64 pages; 481 }; 482 483 enum pmc_type { 484 KVM_PMC_GP = 0, 485 KVM_PMC_FIXED, 486 }; 487 488 struct kvm_pmc { 489 enum pmc_type type; 490 u8 idx; 491 u64 counter; 492 u64 eventsel; 493 struct perf_event *perf_event; 494 struct kvm_vcpu *vcpu; 495 /* 496 * eventsel value for general purpose counters, 497 * ctrl value for fixed counters. 498 */ 499 u64 current_config; 500 bool is_paused; 501 bool intr; 502 }; 503 504 #define KVM_PMC_MAX_FIXED 3 505 struct kvm_pmu { 506 unsigned nr_arch_gp_counters; 507 unsigned nr_arch_fixed_counters; 508 unsigned available_event_types; 509 u64 fixed_ctr_ctrl; 510 u64 fixed_ctr_ctrl_mask; 511 u64 global_ctrl; 512 u64 global_status; 513 u64 counter_bitmask[2]; 514 u64 global_ctrl_mask; 515 u64 global_ovf_ctrl_mask; 516 u64 reserved_bits; 517 u64 raw_event_mask; 518 u8 version; 519 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 520 struct kvm_pmc fixed_counters[KVM_PMC_MAX_FIXED]; 521 struct irq_work irq_work; 522 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 523 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 524 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 525 526 u64 ds_area; 527 u64 pebs_enable; 528 u64 pebs_enable_mask; 529 u64 pebs_data_cfg; 530 u64 pebs_data_cfg_mask; 531 532 /* 533 * If a guest counter is cross-mapped to host counter with different 534 * index, its PEBS capability will be temporarily disabled. 535 * 536 * The user should make sure that this mask is updated 537 * after disabling interrupts and before perf_guest_get_msrs(); 538 */ 539 u64 host_cross_mapped_mask; 540 541 /* 542 * The gate to release perf_events not marked in 543 * pmc_in_use only once in a vcpu time slice. 544 */ 545 bool need_cleanup; 546 547 /* 548 * The total number of programmed perf_events and it helps to avoid 549 * redundant check before cleanup if guest don't use vPMU at all. 550 */ 551 u8 event_count; 552 }; 553 554 struct kvm_pmu_ops; 555 556 enum { 557 KVM_DEBUGREG_BP_ENABLED = 1, 558 KVM_DEBUGREG_WONT_EXIT = 2, 559 }; 560 561 struct kvm_mtrr_range { 562 u64 base; 563 u64 mask; 564 struct list_head node; 565 }; 566 567 struct kvm_mtrr { 568 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 569 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 570 u64 deftype; 571 572 struct list_head head; 573 }; 574 575 /* Hyper-V SynIC timer */ 576 struct kvm_vcpu_hv_stimer { 577 struct hrtimer timer; 578 int index; 579 union hv_stimer_config config; 580 u64 count; 581 u64 exp_time; 582 struct hv_message msg; 583 bool msg_pending; 584 }; 585 586 /* Hyper-V synthetic interrupt controller (SynIC)*/ 587 struct kvm_vcpu_hv_synic { 588 u64 version; 589 u64 control; 590 u64 msg_page; 591 u64 evt_page; 592 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 593 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 594 DECLARE_BITMAP(auto_eoi_bitmap, 256); 595 DECLARE_BITMAP(vec_bitmap, 256); 596 bool active; 597 bool dont_zero_synic_pages; 598 }; 599 600 /* Hyper-V per vcpu emulation context */ 601 struct kvm_vcpu_hv { 602 struct kvm_vcpu *vcpu; 603 u32 vp_index; 604 u64 hv_vapic; 605 s64 runtime_offset; 606 struct kvm_vcpu_hv_synic synic; 607 struct kvm_hyperv_exit exit; 608 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 609 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 610 bool enforce_cpuid; 611 struct { 612 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */ 613 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */ 614 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */ 615 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */ 616 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */ 617 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */ 618 u32 nested_eax; /* HYPERV_CPUID_NESTED_FEATURES.EAX */ 619 u32 nested_ebx; /* HYPERV_CPUID_NESTED_FEATURES.EBX */ 620 } cpuid_cache; 621 }; 622 623 /* Xen HVM per vcpu emulation context */ 624 struct kvm_vcpu_xen { 625 u64 hypercall_rip; 626 u32 current_runstate; 627 u8 upcall_vector; 628 struct gfn_to_pfn_cache vcpu_info_cache; 629 struct gfn_to_pfn_cache vcpu_time_info_cache; 630 struct gfn_to_pfn_cache runstate_cache; 631 u64 last_steal; 632 u64 runstate_entry_time; 633 u64 runstate_times[4]; 634 unsigned long evtchn_pending_sel; 635 u32 vcpu_id; /* The Xen / ACPI vCPU ID */ 636 u32 timer_virq; 637 u64 timer_expires; /* In guest epoch */ 638 atomic_t timer_pending; 639 struct hrtimer timer; 640 int poll_evtchn; 641 struct timer_list poll_timer; 642 }; 643 644 struct kvm_queued_exception { 645 bool pending; 646 bool injected; 647 bool has_error_code; 648 u8 vector; 649 u32 error_code; 650 unsigned long payload; 651 bool has_payload; 652 }; 653 654 struct kvm_vcpu_arch { 655 /* 656 * rip and regs accesses must go through 657 * kvm_{register,rip}_{read,write} functions. 658 */ 659 unsigned long regs[NR_VCPU_REGS]; 660 u32 regs_avail; 661 u32 regs_dirty; 662 663 unsigned long cr0; 664 unsigned long cr0_guest_owned_bits; 665 unsigned long cr2; 666 unsigned long cr3; 667 unsigned long cr4; 668 unsigned long cr4_guest_owned_bits; 669 unsigned long cr4_guest_rsvd_bits; 670 unsigned long cr8; 671 u32 host_pkru; 672 u32 pkru; 673 u32 hflags; 674 u64 efer; 675 u64 apic_base; 676 struct kvm_lapic *apic; /* kernel irqchip context */ 677 bool load_eoi_exitmap_pending; 678 DECLARE_BITMAP(ioapic_handled_vectors, 256); 679 unsigned long apic_attention; 680 int32_t apic_arb_prio; 681 int mp_state; 682 u64 ia32_misc_enable_msr; 683 u64 smbase; 684 u64 smi_count; 685 bool at_instruction_boundary; 686 bool tpr_access_reporting; 687 bool xsaves_enabled; 688 bool xfd_no_write_intercept; 689 u64 ia32_xss; 690 u64 microcode_version; 691 u64 arch_capabilities; 692 u64 perf_capabilities; 693 694 /* 695 * Paging state of the vcpu 696 * 697 * If the vcpu runs in guest mode with two level paging this still saves 698 * the paging mode of the l1 guest. This context is always used to 699 * handle faults. 700 */ 701 struct kvm_mmu *mmu; 702 703 /* Non-nested MMU for L1 */ 704 struct kvm_mmu root_mmu; 705 706 /* L1 MMU when running nested */ 707 struct kvm_mmu guest_mmu; 708 709 /* 710 * Paging state of an L2 guest (used for nested npt) 711 * 712 * This context will save all necessary information to walk page tables 713 * of an L2 guest. This context is only initialized for page table 714 * walking and not for faulting since we never handle l2 page faults on 715 * the host. 716 */ 717 struct kvm_mmu nested_mmu; 718 719 /* 720 * Pointer to the mmu context currently used for 721 * gva_to_gpa translations. 722 */ 723 struct kvm_mmu *walk_mmu; 724 725 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 726 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 727 struct kvm_mmu_memory_cache mmu_shadowed_info_cache; 728 struct kvm_mmu_memory_cache mmu_page_header_cache; 729 730 /* 731 * QEMU userspace and the guest each have their own FPU state. 732 * In vcpu_run, we switch between the user and guest FPU contexts. 733 * While running a VCPU, the VCPU thread will have the guest FPU 734 * context. 735 * 736 * Note that while the PKRU state lives inside the fpu registers, 737 * it is switched out separately at VMENTER and VMEXIT time. The 738 * "guest_fpstate" state here contains the guest FPU context, with the 739 * host PRKU bits. 740 */ 741 struct fpu_guest guest_fpu; 742 743 u64 xcr0; 744 u64 guest_supported_xcr0; 745 746 struct kvm_pio_request pio; 747 void *pio_data; 748 void *sev_pio_data; 749 unsigned sev_pio_count; 750 751 u8 event_exit_inst_len; 752 753 bool exception_from_userspace; 754 755 /* Exceptions to be injected to the guest. */ 756 struct kvm_queued_exception exception; 757 /* Exception VM-Exits to be synthesized to L1. */ 758 struct kvm_queued_exception exception_vmexit; 759 760 struct kvm_queued_interrupt { 761 bool injected; 762 bool soft; 763 u8 nr; 764 } interrupt; 765 766 int halt_request; /* real mode on Intel only */ 767 768 int cpuid_nent; 769 struct kvm_cpuid_entry2 *cpuid_entries; 770 u32 kvm_cpuid_base; 771 772 u64 reserved_gpa_bits; 773 int maxphyaddr; 774 775 /* emulate context */ 776 777 struct x86_emulate_ctxt *emulate_ctxt; 778 bool emulate_regs_need_sync_to_vcpu; 779 bool emulate_regs_need_sync_from_vcpu; 780 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 781 782 gpa_t time; 783 struct pvclock_vcpu_time_info hv_clock; 784 unsigned int hw_tsc_khz; 785 struct gfn_to_pfn_cache pv_time; 786 /* set guest stopped flag in pvclock flags field */ 787 bool pvclock_set_guest_stopped_request; 788 789 struct { 790 u8 preempted; 791 u64 msr_val; 792 u64 last_steal; 793 struct gfn_to_hva_cache cache; 794 } st; 795 796 u64 l1_tsc_offset; 797 u64 tsc_offset; /* current tsc offset */ 798 u64 last_guest_tsc; 799 u64 last_host_tsc; 800 u64 tsc_offset_adjustment; 801 u64 this_tsc_nsec; 802 u64 this_tsc_write; 803 u64 this_tsc_generation; 804 bool tsc_catchup; 805 bool tsc_always_catchup; 806 s8 virtual_tsc_shift; 807 u32 virtual_tsc_mult; 808 u32 virtual_tsc_khz; 809 s64 ia32_tsc_adjust_msr; 810 u64 msr_ia32_power_ctl; 811 u64 l1_tsc_scaling_ratio; 812 u64 tsc_scaling_ratio; /* current scaling ratio */ 813 814 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 815 unsigned nmi_pending; /* NMI queued after currently running handler */ 816 bool nmi_injected; /* Trying to inject an NMI this entry */ 817 bool smi_pending; /* SMI queued after currently running handler */ 818 u8 handling_intr_from_guest; 819 820 struct kvm_mtrr mtrr_state; 821 u64 pat; 822 823 unsigned switch_db_regs; 824 unsigned long db[KVM_NR_DB_REGS]; 825 unsigned long dr6; 826 unsigned long dr7; 827 unsigned long eff_db[KVM_NR_DB_REGS]; 828 unsigned long guest_debug_dr7; 829 u64 msr_platform_info; 830 u64 msr_misc_features_enables; 831 832 u64 mcg_cap; 833 u64 mcg_status; 834 u64 mcg_ctl; 835 u64 mcg_ext_ctl; 836 u64 *mce_banks; 837 u64 *mci_ctl2_banks; 838 839 /* Cache MMIO info */ 840 u64 mmio_gva; 841 unsigned mmio_access; 842 gfn_t mmio_gfn; 843 u64 mmio_gen; 844 845 struct kvm_pmu pmu; 846 847 /* used for guest single stepping over the given code position */ 848 unsigned long singlestep_rip; 849 850 bool hyperv_enabled; 851 struct kvm_vcpu_hv *hyperv; 852 struct kvm_vcpu_xen xen; 853 854 cpumask_var_t wbinvd_dirty_mask; 855 856 unsigned long last_retry_eip; 857 unsigned long last_retry_addr; 858 859 struct { 860 bool halted; 861 gfn_t gfns[ASYNC_PF_PER_VCPU]; 862 struct gfn_to_hva_cache data; 863 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 864 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 865 u16 vec; 866 u32 id; 867 bool send_user_only; 868 u32 host_apf_flags; 869 bool delivery_as_pf_vmexit; 870 bool pageready_pending; 871 } apf; 872 873 /* OSVW MSRs (AMD only) */ 874 struct { 875 u64 length; 876 u64 status; 877 } osvw; 878 879 struct { 880 u64 msr_val; 881 struct gfn_to_hva_cache data; 882 } pv_eoi; 883 884 u64 msr_kvm_poll_control; 885 886 /* 887 * Indicates the guest is trying to write a gfn that contains one or 888 * more of the PTEs used to translate the write itself, i.e. the access 889 * is changing its own translation in the guest page tables. KVM exits 890 * to userspace if emulation of the faulting instruction fails and this 891 * flag is set, as KVM cannot make forward progress. 892 * 893 * If emulation fails for a write to guest page tables, KVM unprotects 894 * (zaps) the shadow page for the target gfn and resumes the guest to 895 * retry the non-emulatable instruction (on hardware). Unprotecting the 896 * gfn doesn't allow forward progress for a self-changing access because 897 * doing so also zaps the translation for the gfn, i.e. retrying the 898 * instruction will hit a !PRESENT fault, which results in a new shadow 899 * page and sends KVM back to square one. 900 */ 901 bool write_fault_to_shadow_pgtable; 902 903 /* set at EPT violation at this point */ 904 unsigned long exit_qualification; 905 906 /* pv related host specific info */ 907 struct { 908 bool pv_unhalted; 909 } pv; 910 911 int pending_ioapic_eoi; 912 int pending_external_vector; 913 914 /* be preempted when it's in kernel-mode(cpl=0) */ 915 bool preempted_in_kernel; 916 917 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 918 bool l1tf_flush_l1d; 919 920 /* Host CPU on which VM-entry was most recently attempted */ 921 int last_vmentry_cpu; 922 923 /* AMD MSRC001_0015 Hardware Configuration */ 924 u64 msr_hwcr; 925 926 /* pv related cpuid info */ 927 struct { 928 /* 929 * value of the eax register in the KVM_CPUID_FEATURES CPUID 930 * leaf. 931 */ 932 u32 features; 933 934 /* 935 * indicates whether pv emulation should be disabled if features 936 * are not present in the guest's cpuid 937 */ 938 bool enforce; 939 } pv_cpuid; 940 941 /* Protected Guests */ 942 bool guest_state_protected; 943 944 /* 945 * Set when PDPTS were loaded directly by the userspace without 946 * reading the guest memory 947 */ 948 bool pdptrs_from_userspace; 949 950 #if IS_ENABLED(CONFIG_HYPERV) 951 hpa_t hv_root_tdp; 952 #endif 953 }; 954 955 struct kvm_lpage_info { 956 int disallow_lpage; 957 }; 958 959 struct kvm_arch_memory_slot { 960 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 961 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 962 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 963 }; 964 965 /* 966 * We use as the mode the number of bits allocated in the LDR for the 967 * logical processor ID. It happens that these are all powers of two. 968 * This makes it is very easy to detect cases where the APICs are 969 * configured for multiple modes; in that case, we cannot use the map and 970 * hence cannot use kvm_irq_delivery_to_apic_fast either. 971 */ 972 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 973 #define KVM_APIC_MODE_XAPIC_FLAT 8 974 #define KVM_APIC_MODE_X2APIC 16 975 976 struct kvm_apic_map { 977 struct rcu_head rcu; 978 u8 mode; 979 u32 max_apic_id; 980 union { 981 struct kvm_lapic *xapic_flat_map[8]; 982 struct kvm_lapic *xapic_cluster_map[16][4]; 983 }; 984 struct kvm_lapic *phys_map[]; 985 }; 986 987 /* Hyper-V synthetic debugger (SynDbg)*/ 988 struct kvm_hv_syndbg { 989 struct { 990 u64 control; 991 u64 status; 992 u64 send_page; 993 u64 recv_page; 994 u64 pending_page; 995 } control; 996 u64 options; 997 }; 998 999 /* Current state of Hyper-V TSC page clocksource */ 1000 enum hv_tsc_page_status { 1001 /* TSC page was not set up or disabled */ 1002 HV_TSC_PAGE_UNSET = 0, 1003 /* TSC page MSR was written by the guest, update pending */ 1004 HV_TSC_PAGE_GUEST_CHANGED, 1005 /* TSC page update was triggered from the host side */ 1006 HV_TSC_PAGE_HOST_CHANGED, 1007 /* TSC page was properly set up and is currently active */ 1008 HV_TSC_PAGE_SET, 1009 /* TSC page was set up with an inaccessible GPA */ 1010 HV_TSC_PAGE_BROKEN, 1011 }; 1012 1013 /* Hyper-V emulation context */ 1014 struct kvm_hv { 1015 struct mutex hv_lock; 1016 u64 hv_guest_os_id; 1017 u64 hv_hypercall; 1018 u64 hv_tsc_page; 1019 enum hv_tsc_page_status hv_tsc_page_status; 1020 1021 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 1022 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 1023 u64 hv_crash_ctl; 1024 1025 struct ms_hyperv_tsc_page tsc_ref; 1026 1027 struct idr conn_to_evt; 1028 1029 u64 hv_reenlightenment_control; 1030 u64 hv_tsc_emulation_control; 1031 u64 hv_tsc_emulation_status; 1032 1033 /* How many vCPUs have VP index != vCPU index */ 1034 atomic_t num_mismatched_vp_indexes; 1035 1036 /* 1037 * How many SynICs use 'AutoEOI' feature 1038 * (protected by arch.apicv_update_lock) 1039 */ 1040 unsigned int synic_auto_eoi_used; 1041 1042 struct hv_partition_assist_pg *hv_pa_pg; 1043 struct kvm_hv_syndbg hv_syndbg; 1044 }; 1045 1046 struct msr_bitmap_range { 1047 u32 flags; 1048 u32 nmsrs; 1049 u32 base; 1050 unsigned long *bitmap; 1051 }; 1052 1053 /* Xen emulation context */ 1054 struct kvm_xen { 1055 u32 xen_version; 1056 bool long_mode; 1057 u8 upcall_vector; 1058 struct gfn_to_pfn_cache shinfo_cache; 1059 struct idr evtchn_ports; 1060 unsigned long poll_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)]; 1061 }; 1062 1063 enum kvm_irqchip_mode { 1064 KVM_IRQCHIP_NONE, 1065 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 1066 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 1067 }; 1068 1069 struct kvm_x86_msr_filter { 1070 u8 count; 1071 bool default_allow:1; 1072 struct msr_bitmap_range ranges[16]; 1073 }; 1074 1075 enum kvm_apicv_inhibit { 1076 1077 /********************************************************************/ 1078 /* INHIBITs that are relevant to both Intel's APICv and AMD's AVIC. */ 1079 /********************************************************************/ 1080 1081 /* 1082 * APIC acceleration is disabled by a module parameter 1083 * and/or not supported in hardware. 1084 */ 1085 APICV_INHIBIT_REASON_DISABLE, 1086 1087 /* 1088 * APIC acceleration is inhibited because AutoEOI feature is 1089 * being used by a HyperV guest. 1090 */ 1091 APICV_INHIBIT_REASON_HYPERV, 1092 1093 /* 1094 * APIC acceleration is inhibited because the userspace didn't yet 1095 * enable the kernel/split irqchip. 1096 */ 1097 APICV_INHIBIT_REASON_ABSENT, 1098 1099 /* APIC acceleration is inhibited because KVM_GUESTDBG_BLOCKIRQ 1100 * (out of band, debug measure of blocking all interrupts on this vCPU) 1101 * was enabled, to avoid AVIC/APICv bypassing it. 1102 */ 1103 APICV_INHIBIT_REASON_BLOCKIRQ, 1104 1105 /* 1106 * For simplicity, the APIC acceleration is inhibited 1107 * first time either APIC ID or APIC base are changed by the guest 1108 * from their reset values. 1109 */ 1110 APICV_INHIBIT_REASON_APIC_ID_MODIFIED, 1111 APICV_INHIBIT_REASON_APIC_BASE_MODIFIED, 1112 1113 /******************************************************/ 1114 /* INHIBITs that are relevant only to the AMD's AVIC. */ 1115 /******************************************************/ 1116 1117 /* 1118 * AVIC is inhibited on a vCPU because it runs a nested guest. 1119 * 1120 * This is needed because unlike APICv, the peers of this vCPU 1121 * cannot use the doorbell mechanism to signal interrupts via AVIC when 1122 * a vCPU runs nested. 1123 */ 1124 APICV_INHIBIT_REASON_NESTED, 1125 1126 /* 1127 * On SVM, the wait for the IRQ window is implemented with pending vIRQ, 1128 * which cannot be injected when the AVIC is enabled, thus AVIC 1129 * is inhibited while KVM waits for IRQ window. 1130 */ 1131 APICV_INHIBIT_REASON_IRQWIN, 1132 1133 /* 1134 * PIT (i8254) 're-inject' mode, relies on EOI intercept, 1135 * which AVIC doesn't support for edge triggered interrupts. 1136 */ 1137 APICV_INHIBIT_REASON_PIT_REINJ, 1138 1139 /* 1140 * AVIC is disabled because SEV doesn't support it. 1141 */ 1142 APICV_INHIBIT_REASON_SEV, 1143 }; 1144 1145 struct kvm_arch { 1146 unsigned long n_used_mmu_pages; 1147 unsigned long n_requested_mmu_pages; 1148 unsigned long n_max_mmu_pages; 1149 unsigned int indirect_shadow_pages; 1150 u8 mmu_valid_gen; 1151 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 1152 struct list_head active_mmu_pages; 1153 struct list_head zapped_obsolete_pages; 1154 struct list_head lpage_disallowed_mmu_pages; 1155 struct kvm_page_track_notifier_node mmu_sp_tracker; 1156 struct kvm_page_track_notifier_head track_notifier_head; 1157 /* 1158 * Protects marking pages unsync during page faults, as TDP MMU page 1159 * faults only take mmu_lock for read. For simplicity, the unsync 1160 * pages lock is always taken when marking pages unsync regardless of 1161 * whether mmu_lock is held for read or write. 1162 */ 1163 spinlock_t mmu_unsync_pages_lock; 1164 1165 struct list_head assigned_dev_head; 1166 struct iommu_domain *iommu_domain; 1167 bool iommu_noncoherent; 1168 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 1169 atomic_t noncoherent_dma_count; 1170 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 1171 atomic_t assigned_device_count; 1172 struct kvm_pic *vpic; 1173 struct kvm_ioapic *vioapic; 1174 struct kvm_pit *vpit; 1175 atomic_t vapics_in_nmi_mode; 1176 struct mutex apic_map_lock; 1177 struct kvm_apic_map __rcu *apic_map; 1178 atomic_t apic_map_dirty; 1179 1180 /* Protects apic_access_memslot_enabled and apicv_inhibit_reasons */ 1181 struct rw_semaphore apicv_update_lock; 1182 1183 bool apic_access_memslot_enabled; 1184 unsigned long apicv_inhibit_reasons; 1185 1186 gpa_t wall_clock; 1187 1188 bool mwait_in_guest; 1189 bool hlt_in_guest; 1190 bool pause_in_guest; 1191 bool cstate_in_guest; 1192 1193 unsigned long irq_sources_bitmap; 1194 s64 kvmclock_offset; 1195 1196 /* 1197 * This also protects nr_vcpus_matched_tsc which is read from a 1198 * preemption-disabled region, so it must be a raw spinlock. 1199 */ 1200 raw_spinlock_t tsc_write_lock; 1201 u64 last_tsc_nsec; 1202 u64 last_tsc_write; 1203 u32 last_tsc_khz; 1204 u64 last_tsc_offset; 1205 u64 cur_tsc_nsec; 1206 u64 cur_tsc_write; 1207 u64 cur_tsc_offset; 1208 u64 cur_tsc_generation; 1209 int nr_vcpus_matched_tsc; 1210 1211 u32 default_tsc_khz; 1212 1213 seqcount_raw_spinlock_t pvclock_sc; 1214 bool use_master_clock; 1215 u64 master_kernel_ns; 1216 u64 master_cycle_now; 1217 struct delayed_work kvmclock_update_work; 1218 struct delayed_work kvmclock_sync_work; 1219 1220 struct kvm_xen_hvm_config xen_hvm_config; 1221 1222 /* reads protected by irq_srcu, writes by irq_lock */ 1223 struct hlist_head mask_notifier_list; 1224 1225 struct kvm_hv hyperv; 1226 struct kvm_xen xen; 1227 1228 bool backwards_tsc_observed; 1229 bool boot_vcpu_runs_old_kvmclock; 1230 u32 bsp_vcpu_id; 1231 1232 u64 disabled_quirks; 1233 int cpu_dirty_logging_count; 1234 1235 enum kvm_irqchip_mode irqchip_mode; 1236 u8 nr_reserved_ioapic_pins; 1237 1238 bool disabled_lapic_found; 1239 1240 bool x2apic_format; 1241 bool x2apic_broadcast_quirk_disabled; 1242 1243 bool guest_can_read_msr_platform_info; 1244 bool exception_payload_enabled; 1245 1246 bool triple_fault_event; 1247 1248 bool bus_lock_detection_enabled; 1249 bool enable_pmu; 1250 1251 u32 notify_window; 1252 u32 notify_vmexit_flags; 1253 /* 1254 * If exit_on_emulation_error is set, and the in-kernel instruction 1255 * emulator fails to emulate an instruction, allow userspace 1256 * the opportunity to look at it. 1257 */ 1258 bool exit_on_emulation_error; 1259 1260 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 1261 u32 user_space_msr_mask; 1262 struct kvm_x86_msr_filter __rcu *msr_filter; 1263 1264 u32 hypercall_exit_enabled; 1265 1266 /* Guest can access the SGX PROVISIONKEY. */ 1267 bool sgx_provisioning_allowed; 1268 1269 struct kvm_pmu_event_filter __rcu *pmu_event_filter; 1270 struct task_struct *nx_lpage_recovery_thread; 1271 1272 #ifdef CONFIG_X86_64 1273 /* 1274 * Whether the TDP MMU is enabled for this VM. This contains a 1275 * snapshot of the TDP MMU module parameter from when the VM was 1276 * created and remains unchanged for the life of the VM. If this is 1277 * true, TDP MMU handler functions will run for various MMU 1278 * operations. 1279 */ 1280 bool tdp_mmu_enabled; 1281 1282 /* 1283 * List of kvm_mmu_page structs being used as roots. 1284 * All kvm_mmu_page structs in the list should have 1285 * tdp_mmu_page set. 1286 * 1287 * For reads, this list is protected by: 1288 * the MMU lock in read mode + RCU or 1289 * the MMU lock in write mode 1290 * 1291 * For writes, this list is protected by: 1292 * the MMU lock in read mode + the tdp_mmu_pages_lock or 1293 * the MMU lock in write mode 1294 * 1295 * Roots will remain in the list until their tdp_mmu_root_count 1296 * drops to zero, at which point the thread that decremented the 1297 * count to zero should removed the root from the list and clean 1298 * it up, freeing the root after an RCU grace period. 1299 */ 1300 struct list_head tdp_mmu_roots; 1301 1302 /* 1303 * List of kvm_mmu_page structs not being used as roots. 1304 * All kvm_mmu_page structs in the list should have 1305 * tdp_mmu_page set and a tdp_mmu_root_count of 0. 1306 */ 1307 struct list_head tdp_mmu_pages; 1308 1309 /* 1310 * Protects accesses to the following fields when the MMU lock 1311 * is held in read mode: 1312 * - tdp_mmu_roots (above) 1313 * - tdp_mmu_pages (above) 1314 * - the link field of kvm_mmu_page structs used by the TDP MMU 1315 * - lpage_disallowed_mmu_pages 1316 * - the lpage_disallowed_link field of kvm_mmu_page structs used 1317 * by the TDP MMU 1318 * It is acceptable, but not necessary, to acquire this lock when 1319 * the thread holds the MMU lock in write mode. 1320 */ 1321 spinlock_t tdp_mmu_pages_lock; 1322 struct workqueue_struct *tdp_mmu_zap_wq; 1323 #endif /* CONFIG_X86_64 */ 1324 1325 /* 1326 * If set, at least one shadow root has been allocated. This flag 1327 * is used as one input when determining whether certain memslot 1328 * related allocations are necessary. 1329 */ 1330 bool shadow_root_allocated; 1331 1332 #if IS_ENABLED(CONFIG_HYPERV) 1333 hpa_t hv_root_tdp; 1334 spinlock_t hv_root_tdp_lock; 1335 #endif 1336 /* 1337 * VM-scope maximum vCPU ID. Used to determine the size of structures 1338 * that increase along with the maximum vCPU ID, in which case, using 1339 * the global KVM_MAX_VCPU_IDS may lead to significant memory waste. 1340 */ 1341 u32 max_vcpu_ids; 1342 1343 bool disable_nx_huge_pages; 1344 1345 /* 1346 * Memory caches used to allocate shadow pages when performing eager 1347 * page splitting. No need for a shadowed_info_cache since eager page 1348 * splitting only allocates direct shadow pages. 1349 * 1350 * Protected by kvm->slots_lock. 1351 */ 1352 struct kvm_mmu_memory_cache split_shadow_page_cache; 1353 struct kvm_mmu_memory_cache split_page_header_cache; 1354 1355 /* 1356 * Memory cache used to allocate pte_list_desc structs while splitting 1357 * huge pages. In the worst case, to split one huge page, 512 1358 * pte_list_desc structs are needed to add each lower level leaf sptep 1359 * to the rmap plus 1 to extend the parent_ptes rmap of the lower level 1360 * page table. 1361 * 1362 * Protected by kvm->slots_lock. 1363 */ 1364 #define SPLIT_DESC_CACHE_MIN_NR_OBJECTS (SPTE_ENT_PER_PAGE + 1) 1365 struct kvm_mmu_memory_cache split_desc_cache; 1366 }; 1367 1368 struct kvm_vm_stat { 1369 struct kvm_vm_stat_generic generic; 1370 u64 mmu_shadow_zapped; 1371 u64 mmu_pte_write; 1372 u64 mmu_pde_zapped; 1373 u64 mmu_flooded; 1374 u64 mmu_recycled; 1375 u64 mmu_cache_miss; 1376 u64 mmu_unsync; 1377 union { 1378 struct { 1379 atomic64_t pages_4k; 1380 atomic64_t pages_2m; 1381 atomic64_t pages_1g; 1382 }; 1383 atomic64_t pages[KVM_NR_PAGE_SIZES]; 1384 }; 1385 u64 nx_lpage_splits; 1386 u64 max_mmu_page_hash_collisions; 1387 u64 max_mmu_rmap_size; 1388 }; 1389 1390 struct kvm_vcpu_stat { 1391 struct kvm_vcpu_stat_generic generic; 1392 u64 pf_taken; 1393 u64 pf_fixed; 1394 u64 pf_emulate; 1395 u64 pf_spurious; 1396 u64 pf_fast; 1397 u64 pf_mmio_spte_created; 1398 u64 pf_guest; 1399 u64 tlb_flush; 1400 u64 invlpg; 1401 1402 u64 exits; 1403 u64 io_exits; 1404 u64 mmio_exits; 1405 u64 signal_exits; 1406 u64 irq_window_exits; 1407 u64 nmi_window_exits; 1408 u64 l1d_flush; 1409 u64 halt_exits; 1410 u64 request_irq_exits; 1411 u64 irq_exits; 1412 u64 host_state_reload; 1413 u64 fpu_reload; 1414 u64 insn_emulation; 1415 u64 insn_emulation_fail; 1416 u64 hypercalls; 1417 u64 irq_injections; 1418 u64 nmi_injections; 1419 u64 req_event; 1420 u64 nested_run; 1421 u64 directed_yield_attempted; 1422 u64 directed_yield_successful; 1423 u64 preemption_reported; 1424 u64 preemption_other; 1425 u64 guest_mode; 1426 u64 notify_window_exits; 1427 }; 1428 1429 struct x86_instruction_info; 1430 1431 struct msr_data { 1432 bool host_initiated; 1433 u32 index; 1434 u64 data; 1435 }; 1436 1437 struct kvm_lapic_irq { 1438 u32 vector; 1439 u16 delivery_mode; 1440 u16 dest_mode; 1441 bool level; 1442 u16 trig_mode; 1443 u32 shorthand; 1444 u32 dest_id; 1445 bool msi_redir_hint; 1446 }; 1447 1448 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1449 { 1450 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1451 } 1452 1453 struct kvm_x86_ops { 1454 const char *name; 1455 1456 int (*hardware_enable)(void); 1457 void (*hardware_disable)(void); 1458 void (*hardware_unsetup)(void); 1459 bool (*has_emulated_msr)(struct kvm *kvm, u32 index); 1460 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1461 1462 unsigned int vm_size; 1463 int (*vm_init)(struct kvm *kvm); 1464 void (*vm_destroy)(struct kvm *kvm); 1465 1466 /* Create, but do not attach this VCPU */ 1467 int (*vcpu_precreate)(struct kvm *kvm); 1468 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1469 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1470 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1471 1472 void (*prepare_switch_to_guest)(struct kvm_vcpu *vcpu); 1473 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1474 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1475 1476 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1477 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1478 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1479 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1480 void (*get_segment)(struct kvm_vcpu *vcpu, 1481 struct kvm_segment *var, int seg); 1482 int (*get_cpl)(struct kvm_vcpu *vcpu); 1483 void (*set_segment)(struct kvm_vcpu *vcpu, 1484 struct kvm_segment *var, int seg); 1485 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1486 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1487 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1488 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1489 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1490 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1491 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1492 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1493 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1494 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1495 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1496 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1497 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1498 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1499 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1500 bool (*get_if_flag)(struct kvm_vcpu *vcpu); 1501 1502 void (*flush_tlb_all)(struct kvm_vcpu *vcpu); 1503 void (*flush_tlb_current)(struct kvm_vcpu *vcpu); 1504 int (*tlb_remote_flush)(struct kvm *kvm); 1505 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1506 struct kvm_tlb_range *range); 1507 1508 /* 1509 * Flush any TLB entries associated with the given GVA. 1510 * Does not need to flush GPA->HPA mappings. 1511 * Can potentially get non-canonical addresses through INVLPGs, which 1512 * the implementation may choose to ignore if appropriate. 1513 */ 1514 void (*flush_tlb_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1515 1516 /* 1517 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1518 * does not need to flush GPA->HPA mappings. 1519 */ 1520 void (*flush_tlb_guest)(struct kvm_vcpu *vcpu); 1521 1522 int (*vcpu_pre_run)(struct kvm_vcpu *vcpu); 1523 enum exit_fastpath_completion (*vcpu_run)(struct kvm_vcpu *vcpu); 1524 int (*handle_exit)(struct kvm_vcpu *vcpu, 1525 enum exit_fastpath_completion exit_fastpath); 1526 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1527 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1528 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1529 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1530 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1531 unsigned char *hypercall_addr); 1532 void (*inject_irq)(struct kvm_vcpu *vcpu, bool reinjected); 1533 void (*inject_nmi)(struct kvm_vcpu *vcpu); 1534 void (*inject_exception)(struct kvm_vcpu *vcpu); 1535 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1536 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1537 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1538 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1539 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1540 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1541 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1542 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1543 bool (*check_apicv_inhibit_reasons)(enum kvm_apicv_inhibit reason); 1544 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1545 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1546 void (*hwapic_isr_update)(int isr); 1547 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1548 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1549 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1550 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1551 void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode, 1552 int trig_mode, int vector); 1553 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1554 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1555 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1556 u8 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1557 1558 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa, 1559 int root_level); 1560 1561 bool (*has_wbinvd_exit)(void); 1562 1563 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu); 1564 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu); 1565 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1566 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier); 1567 1568 /* 1569 * Retrieve somewhat arbitrary exit information. Intended to 1570 * be used only from within tracepoints or error paths. 1571 */ 1572 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason, 1573 u64 *info1, u64 *info2, 1574 u32 *exit_int_info, u32 *exit_int_info_err_code); 1575 1576 int (*check_intercept)(struct kvm_vcpu *vcpu, 1577 struct x86_instruction_info *info, 1578 enum x86_intercept_stage stage, 1579 struct x86_exception *exception); 1580 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1581 1582 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1583 1584 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1585 1586 /* 1587 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero 1588 * value indicates CPU dirty logging is unsupported or disabled. 1589 */ 1590 int cpu_dirty_log_size; 1591 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu); 1592 1593 const struct kvm_x86_nested_ops *nested_ops; 1594 1595 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1596 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1597 1598 int (*pi_update_irte)(struct kvm *kvm, unsigned int host_irq, 1599 uint32_t guest_irq, bool set); 1600 void (*pi_start_assignment)(struct kvm *kvm); 1601 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1602 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1603 1604 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1605 bool *expired); 1606 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1607 1608 void (*setup_mce)(struct kvm_vcpu *vcpu); 1609 1610 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1611 int (*enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1612 int (*leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1613 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1614 1615 int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp); 1616 int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1617 int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1618 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1619 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1620 void (*guest_memory_reclaimed)(struct kvm *kvm); 1621 1622 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1623 1624 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type, 1625 void *insn, int insn_len); 1626 1627 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1628 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1629 1630 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1631 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1632 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); 1633 1634 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); 1635 1636 /* 1637 * Returns vCPU specific APICv inhibit reasons 1638 */ 1639 unsigned long (*vcpu_get_apicv_inhibit_reasons)(struct kvm_vcpu *vcpu); 1640 }; 1641 1642 struct kvm_x86_nested_ops { 1643 void (*leave_nested)(struct kvm_vcpu *vcpu); 1644 bool (*is_exception_vmexit)(struct kvm_vcpu *vcpu, u8 vector, 1645 u32 error_code); 1646 int (*check_events)(struct kvm_vcpu *vcpu); 1647 bool (*has_events)(struct kvm_vcpu *vcpu); 1648 void (*triple_fault)(struct kvm_vcpu *vcpu); 1649 int (*get_state)(struct kvm_vcpu *vcpu, 1650 struct kvm_nested_state __user *user_kvm_nested_state, 1651 unsigned user_data_size); 1652 int (*set_state)(struct kvm_vcpu *vcpu, 1653 struct kvm_nested_state __user *user_kvm_nested_state, 1654 struct kvm_nested_state *kvm_state); 1655 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1656 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1657 1658 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1659 uint16_t *vmcs_version); 1660 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1661 }; 1662 1663 struct kvm_x86_init_ops { 1664 int (*cpu_has_kvm_support)(void); 1665 int (*disabled_by_bios)(void); 1666 int (*check_processor_compatibility)(void); 1667 int (*hardware_setup)(void); 1668 unsigned int (*handle_intel_pt_intr)(void); 1669 1670 struct kvm_x86_ops *runtime_ops; 1671 struct kvm_pmu_ops *pmu_ops; 1672 }; 1673 1674 struct kvm_arch_async_pf { 1675 u32 token; 1676 gfn_t gfn; 1677 unsigned long cr3; 1678 bool direct_map; 1679 }; 1680 1681 extern u32 __read_mostly kvm_nr_uret_msrs; 1682 extern u64 __read_mostly host_efer; 1683 extern bool __read_mostly allow_smaller_maxphyaddr; 1684 extern bool __read_mostly enable_apicv; 1685 extern struct kvm_x86_ops kvm_x86_ops; 1686 1687 #define KVM_X86_OP(func) \ 1688 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func)); 1689 #define KVM_X86_OP_OPTIONAL KVM_X86_OP 1690 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP 1691 #include <asm/kvm-x86-ops.h> 1692 1693 #define __KVM_HAVE_ARCH_VM_ALLOC 1694 static inline struct kvm *kvm_arch_alloc_vm(void) 1695 { 1696 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1697 } 1698 1699 #define __KVM_HAVE_ARCH_VM_FREE 1700 void kvm_arch_free_vm(struct kvm *kvm); 1701 1702 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1703 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1704 { 1705 if (kvm_x86_ops.tlb_remote_flush && 1706 !static_call(kvm_x86_tlb_remote_flush)(kvm)) 1707 return 0; 1708 else 1709 return -ENOTSUPP; 1710 } 1711 1712 #define kvm_arch_pmi_in_guest(vcpu) \ 1713 ((vcpu) && (vcpu)->arch.handling_intr_from_guest) 1714 1715 void __init kvm_mmu_x86_module_init(void); 1716 int kvm_mmu_vendor_module_init(void); 1717 void kvm_mmu_vendor_module_exit(void); 1718 1719 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1720 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1721 int kvm_mmu_init_vm(struct kvm *kvm); 1722 void kvm_mmu_uninit_vm(struct kvm *kvm); 1723 1724 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu); 1725 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1726 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1727 const struct kvm_memory_slot *memslot, 1728 int start_level); 1729 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm, 1730 const struct kvm_memory_slot *memslot, 1731 int target_level); 1732 void kvm_mmu_try_split_huge_pages(struct kvm *kvm, 1733 const struct kvm_memory_slot *memslot, 1734 u64 start, u64 end, 1735 int target_level); 1736 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1737 const struct kvm_memory_slot *memslot); 1738 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1739 const struct kvm_memory_slot *memslot); 1740 void kvm_mmu_zap_all(struct kvm *kvm); 1741 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1742 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1743 1744 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); 1745 1746 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1747 const void *val, int bytes); 1748 1749 struct kvm_irq_mask_notifier { 1750 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1751 int irq; 1752 struct hlist_node link; 1753 }; 1754 1755 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1756 struct kvm_irq_mask_notifier *kimn); 1757 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1758 struct kvm_irq_mask_notifier *kimn); 1759 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1760 bool mask); 1761 1762 extern bool tdp_enabled; 1763 1764 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1765 1766 /* 1767 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1768 * userspace I/O) to indicate that the emulation context 1769 * should be reused as is, i.e. skip initialization of 1770 * emulation context, instruction fetch and decode. 1771 * 1772 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1773 * Indicates that only select instructions (tagged with 1774 * EmulateOnUD) should be emulated (to minimize the emulator 1775 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1776 * 1777 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1778 * decode the instruction length. For use *only* by 1779 * kvm_x86_ops.skip_emulated_instruction() implementations if 1780 * EMULTYPE_COMPLETE_USER_EXIT is not set. 1781 * 1782 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1783 * retry native execution under certain conditions, 1784 * Can only be set in conjunction with EMULTYPE_PF. 1785 * 1786 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1787 * triggered by KVM's magic "force emulation" prefix, 1788 * which is opt in via module param (off by default). 1789 * Bypasses EmulateOnUD restriction despite emulating 1790 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1791 * Used to test the full emulator from userspace. 1792 * 1793 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1794 * backdoor emulation, which is opt in via module param. 1795 * VMware backdoor emulation handles select instructions 1796 * and reinjects the #GP for all other cases. 1797 * 1798 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1799 * case the CR2/GPA value pass on the stack is valid. 1800 * 1801 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility 1802 * state and inject single-step #DBs after skipping 1803 * an instruction (after completing userspace I/O). 1804 */ 1805 #define EMULTYPE_NO_DECODE (1 << 0) 1806 #define EMULTYPE_TRAP_UD (1 << 1) 1807 #define EMULTYPE_SKIP (1 << 2) 1808 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1809 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1810 #define EMULTYPE_VMWARE_GP (1 << 5) 1811 #define EMULTYPE_PF (1 << 6) 1812 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7) 1813 1814 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1815 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1816 void *insn, int insn_len); 1817 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, 1818 u64 *data, u8 ndata); 1819 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu); 1820 1821 void kvm_enable_efer_bits(u64); 1822 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1823 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1824 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1825 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1826 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1827 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1828 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu); 1829 int kvm_emulate_invd(struct kvm_vcpu *vcpu); 1830 int kvm_emulate_mwait(struct kvm_vcpu *vcpu); 1831 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu); 1832 int kvm_emulate_monitor(struct kvm_vcpu *vcpu); 1833 1834 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1835 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1836 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1837 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu); 1838 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu); 1839 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1840 1841 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1842 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1843 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1844 1845 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1846 int reason, bool has_error_code, u32 error_code); 1847 1848 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0); 1849 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4); 1850 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1851 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1852 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1853 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1854 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1855 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1856 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1857 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1858 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu); 1859 1860 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1861 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1862 1863 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1864 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1865 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu); 1866 1867 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1868 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1869 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1870 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1871 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1872 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1873 void kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1874 struct x86_exception *fault); 1875 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1876 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1877 1878 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1879 int irq_source_id, int level) 1880 { 1881 /* Logical OR for level trig interrupt */ 1882 if (level) 1883 __set_bit(irq_source_id, irq_state); 1884 else 1885 __clear_bit(irq_source_id, irq_state); 1886 1887 return !!(*irq_state); 1888 } 1889 1890 #define KVM_MMU_ROOT_CURRENT BIT(0) 1891 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1892 #define KVM_MMU_ROOTS_ALL (~0UL) 1893 1894 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1895 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1896 1897 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1898 1899 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1900 1901 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1902 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu, 1903 ulong roots_to_free); 1904 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu); 1905 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1906 struct x86_exception *exception); 1907 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1908 struct x86_exception *exception); 1909 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1910 struct x86_exception *exception); 1911 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1912 struct x86_exception *exception); 1913 1914 bool kvm_apicv_activated(struct kvm *kvm); 1915 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu); 1916 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1917 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm, 1918 enum kvm_apicv_inhibit reason, bool set); 1919 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm, 1920 enum kvm_apicv_inhibit reason, bool set); 1921 1922 static inline void kvm_set_apicv_inhibit(struct kvm *kvm, 1923 enum kvm_apicv_inhibit reason) 1924 { 1925 kvm_set_or_clear_apicv_inhibit(kvm, reason, true); 1926 } 1927 1928 static inline void kvm_clear_apicv_inhibit(struct kvm *kvm, 1929 enum kvm_apicv_inhibit reason) 1930 { 1931 kvm_set_or_clear_apicv_inhibit(kvm, reason, false); 1932 } 1933 1934 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1935 1936 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1937 void *insn, int insn_len); 1938 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1939 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1940 gva_t gva, hpa_t root_hpa); 1941 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1942 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd); 1943 1944 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level, 1945 int tdp_max_root_level, int tdp_huge_page_level); 1946 1947 static inline u16 kvm_read_ldt(void) 1948 { 1949 u16 ldt; 1950 asm("sldt %0" : "=g"(ldt)); 1951 return ldt; 1952 } 1953 1954 static inline void kvm_load_ldt(u16 sel) 1955 { 1956 asm("lldt %0" : : "rm"(sel)); 1957 } 1958 1959 #ifdef CONFIG_X86_64 1960 static inline unsigned long read_msr(unsigned long msr) 1961 { 1962 u64 value; 1963 1964 rdmsrl(msr, value); 1965 return value; 1966 } 1967 #endif 1968 1969 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1970 { 1971 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1972 } 1973 1974 #define TSS_IOPB_BASE_OFFSET 0x66 1975 #define TSS_BASE_SIZE 0x68 1976 #define TSS_IOPB_SIZE (65536 / 8) 1977 #define TSS_REDIRECTION_SIZE (256 / 8) 1978 #define RMODE_TSS_SIZE \ 1979 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1980 1981 enum { 1982 TASK_SWITCH_CALL = 0, 1983 TASK_SWITCH_IRET = 1, 1984 TASK_SWITCH_JMP = 2, 1985 TASK_SWITCH_GATE = 3, 1986 }; 1987 1988 #define HF_GIF_MASK (1 << 0) 1989 #define HF_NMI_MASK (1 << 3) 1990 #define HF_IRET_MASK (1 << 4) 1991 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1992 #define HF_SMM_MASK (1 << 6) 1993 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1994 1995 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1996 #define KVM_ADDRESS_SPACE_NUM 2 1997 1998 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1999 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 2000 2001 #define KVM_ARCH_WANT_MMU_NOTIFIER 2002 2003 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 2004 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 2005 int kvm_cpu_has_extint(struct kvm_vcpu *v); 2006 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 2007 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 2008 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 2009 2010 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 2011 unsigned long ipi_bitmap_high, u32 min, 2012 unsigned long icr, int op_64_bit); 2013 2014 int kvm_add_user_return_msr(u32 msr); 2015 int kvm_find_user_return_msr(u32 msr); 2016 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 2017 2018 static inline bool kvm_is_supported_user_return_msr(u32 msr) 2019 { 2020 return kvm_find_user_return_msr(msr) >= 0; 2021 } 2022 2023 u64 kvm_scale_tsc(u64 tsc, u64 ratio); 2024 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 2025 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier); 2026 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier); 2027 2028 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 2029 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 2030 2031 void kvm_make_scan_ioapic_request(struct kvm *kvm); 2032 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 2033 unsigned long *vcpu_bitmap); 2034 2035 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 2036 struct kvm_async_pf *work); 2037 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 2038 struct kvm_async_pf *work); 2039 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 2040 struct kvm_async_pf *work); 2041 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 2042 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 2043 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 2044 2045 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 2046 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 2047 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 2048 2049 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, 2050 u32 size); 2051 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 2052 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 2053 2054 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 2055 struct kvm_vcpu **dest_vcpu); 2056 2057 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 2058 struct kvm_lapic_irq *irq); 2059 2060 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 2061 { 2062 /* We can only post Fixed and LowPrio IRQs */ 2063 return (irq->delivery_mode == APIC_DM_FIXED || 2064 irq->delivery_mode == APIC_DM_LOWEST); 2065 } 2066 2067 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 2068 { 2069 static_call_cond(kvm_x86_vcpu_blocking)(vcpu); 2070 } 2071 2072 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 2073 { 2074 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu); 2075 } 2076 2077 static inline int kvm_cpu_get_apicid(int mps_cpu) 2078 { 2079 #ifdef CONFIG_X86_LOCAL_APIC 2080 return default_cpu_present_to_apicid(mps_cpu); 2081 #else 2082 WARN_ON_ONCE(1); 2083 return BAD_APICID; 2084 #endif 2085 } 2086 2087 #define put_smstate(type, buf, offset, val) \ 2088 *(type *)((buf) + (offset) - 0x7e00) = val 2089 2090 #define GET_SMSTATE(type, buf, offset) \ 2091 (*(type *)((buf) + (offset) - 0x7e00)) 2092 2093 int kvm_cpu_dirty_log_size(void); 2094 2095 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages); 2096 2097 #define KVM_CLOCK_VALID_FLAGS \ 2098 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC) 2099 2100 #define KVM_X86_VALID_QUIRKS \ 2101 (KVM_X86_QUIRK_LINT0_REENABLED | \ 2102 KVM_X86_QUIRK_CD_NW_CLEARED | \ 2103 KVM_X86_QUIRK_LAPIC_MMIO_HOLE | \ 2104 KVM_X86_QUIRK_OUT_7E_INC_RIP | \ 2105 KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT | \ 2106 KVM_X86_QUIRK_FIX_HYPERCALL_INSN | \ 2107 KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS) 2108 2109 #endif /* _ASM_X86_KVM_HOST_H */ 2110