1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 #include <linux/workqueue.h> 19 20 #include <linux/kvm.h> 21 #include <linux/kvm_para.h> 22 #include <linux/kvm_types.h> 23 #include <linux/perf_event.h> 24 #include <linux/pvclock_gtod.h> 25 #include <linux/clocksource.h> 26 #include <linux/irqbypass.h> 27 #include <linux/hyperv.h> 28 29 #include <asm/apic.h> 30 #include <asm/pvclock-abi.h> 31 #include <asm/desc.h> 32 #include <asm/mtrr.h> 33 #include <asm/msr-index.h> 34 #include <asm/asm.h> 35 #include <asm/kvm_page_track.h> 36 #include <asm/kvm_vcpu_regs.h> 37 #include <asm/hyperv-tlfs.h> 38 39 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 40 41 #define KVM_MAX_VCPUS 1024 42 43 /* 44 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs 45 * might be larger than the actual number of VCPUs because the 46 * APIC ID encodes CPU topology information. 47 * 48 * In the worst case, we'll need less than one extra bit for the 49 * Core ID, and less than one extra bit for the Package (Die) ID, 50 * so ratio of 4 should be enough. 51 */ 52 #define KVM_VCPU_ID_RATIO 4 53 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO) 54 55 /* memory slots that are not exposed to userspace */ 56 #define KVM_PRIVATE_MEM_SLOTS 3 57 58 #define KVM_HALT_POLL_NS_DEFAULT 200000 59 60 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 61 62 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 63 KVM_DIRTY_LOG_INITIALLY_SET) 64 65 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \ 66 KVM_BUS_LOCK_DETECTION_EXIT) 67 68 /* x86-specific vcpu->requests bit members */ 69 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 70 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 71 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 72 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 73 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 74 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 75 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 76 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 77 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 78 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 79 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 80 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 81 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 82 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 83 #define KVM_REQ_MCLOCK_INPROGRESS \ 84 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 85 #define KVM_REQ_SCAN_IOAPIC \ 86 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 87 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 88 #define KVM_REQ_APIC_PAGE_RELOAD \ 89 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 90 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 91 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 92 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 93 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 94 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 95 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 96 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 97 #define KVM_REQ_APICV_UPDATE \ 98 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 99 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 100 #define KVM_REQ_TLB_FLUSH_GUEST \ 101 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 102 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 103 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 104 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \ 105 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 106 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \ 107 KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 108 109 #define CR0_RESERVED_BITS \ 110 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 111 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 112 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 113 114 #define CR4_RESERVED_BITS \ 115 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 116 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 117 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 118 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 119 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 120 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 121 122 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 123 124 125 126 #define INVALID_PAGE (~(hpa_t)0) 127 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 128 129 #define UNMAPPED_GVA (~(gpa_t)0) 130 #define INVALID_GPA (~(gpa_t)0) 131 132 /* KVM Hugepage definitions for x86 */ 133 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 134 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 135 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 136 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 137 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 138 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 139 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 140 141 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50 142 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 143 #define KVM_MMU_HASH_SHIFT 12 144 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 145 #define KVM_MIN_FREE_MMU_PAGES 5 146 #define KVM_REFILL_PAGES 25 147 #define KVM_MAX_CPUID_ENTRIES 256 148 #define KVM_NR_FIXED_MTRR_REGION 88 149 #define KVM_NR_VAR_MTRR 8 150 151 #define ASYNC_PF_PER_VCPU 64 152 153 enum kvm_reg { 154 VCPU_REGS_RAX = __VCPU_REGS_RAX, 155 VCPU_REGS_RCX = __VCPU_REGS_RCX, 156 VCPU_REGS_RDX = __VCPU_REGS_RDX, 157 VCPU_REGS_RBX = __VCPU_REGS_RBX, 158 VCPU_REGS_RSP = __VCPU_REGS_RSP, 159 VCPU_REGS_RBP = __VCPU_REGS_RBP, 160 VCPU_REGS_RSI = __VCPU_REGS_RSI, 161 VCPU_REGS_RDI = __VCPU_REGS_RDI, 162 #ifdef CONFIG_X86_64 163 VCPU_REGS_R8 = __VCPU_REGS_R8, 164 VCPU_REGS_R9 = __VCPU_REGS_R9, 165 VCPU_REGS_R10 = __VCPU_REGS_R10, 166 VCPU_REGS_R11 = __VCPU_REGS_R11, 167 VCPU_REGS_R12 = __VCPU_REGS_R12, 168 VCPU_REGS_R13 = __VCPU_REGS_R13, 169 VCPU_REGS_R14 = __VCPU_REGS_R14, 170 VCPU_REGS_R15 = __VCPU_REGS_R15, 171 #endif 172 VCPU_REGS_RIP, 173 NR_VCPU_REGS, 174 175 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 176 VCPU_EXREG_CR0, 177 VCPU_EXREG_CR3, 178 VCPU_EXREG_CR4, 179 VCPU_EXREG_RFLAGS, 180 VCPU_EXREG_SEGMENTS, 181 VCPU_EXREG_EXIT_INFO_1, 182 VCPU_EXREG_EXIT_INFO_2, 183 }; 184 185 enum { 186 VCPU_SREG_ES, 187 VCPU_SREG_CS, 188 VCPU_SREG_SS, 189 VCPU_SREG_DS, 190 VCPU_SREG_FS, 191 VCPU_SREG_GS, 192 VCPU_SREG_TR, 193 VCPU_SREG_LDTR, 194 }; 195 196 enum exit_fastpath_completion { 197 EXIT_FASTPATH_NONE, 198 EXIT_FASTPATH_REENTER_GUEST, 199 EXIT_FASTPATH_EXIT_HANDLED, 200 }; 201 typedef enum exit_fastpath_completion fastpath_t; 202 203 struct x86_emulate_ctxt; 204 struct x86_exception; 205 enum x86_intercept; 206 enum x86_intercept_stage; 207 208 #define KVM_NR_DB_REGS 4 209 210 #define DR6_BUS_LOCK (1 << 11) 211 #define DR6_BD (1 << 13) 212 #define DR6_BS (1 << 14) 213 #define DR6_BT (1 << 15) 214 #define DR6_RTM (1 << 16) 215 /* 216 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits. 217 * We can regard all the bits in DR6_FIXED_1 as active_low bits; 218 * they will never be 0 for now, but when they are defined 219 * in the future it will require no code change. 220 * 221 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6. 222 */ 223 #define DR6_ACTIVE_LOW 0xffff0ff0 224 #define DR6_VOLATILE 0x0001e80f 225 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE) 226 227 #define DR7_BP_EN_MASK 0x000000ff 228 #define DR7_GE (1 << 9) 229 #define DR7_GD (1 << 13) 230 #define DR7_FIXED_1 0x00000400 231 #define DR7_VOLATILE 0xffff2bff 232 233 #define KVM_GUESTDBG_VALID_MASK \ 234 (KVM_GUESTDBG_ENABLE | \ 235 KVM_GUESTDBG_SINGLESTEP | \ 236 KVM_GUESTDBG_USE_HW_BP | \ 237 KVM_GUESTDBG_USE_SW_BP | \ 238 KVM_GUESTDBG_INJECT_BP | \ 239 KVM_GUESTDBG_INJECT_DB | \ 240 KVM_GUESTDBG_BLOCKIRQ) 241 242 243 #define PFERR_PRESENT_BIT 0 244 #define PFERR_WRITE_BIT 1 245 #define PFERR_USER_BIT 2 246 #define PFERR_RSVD_BIT 3 247 #define PFERR_FETCH_BIT 4 248 #define PFERR_PK_BIT 5 249 #define PFERR_SGX_BIT 15 250 #define PFERR_GUEST_FINAL_BIT 32 251 #define PFERR_GUEST_PAGE_BIT 33 252 #define PFERR_IMPLICIT_ACCESS_BIT 48 253 254 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 255 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 256 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 257 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 258 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 259 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 260 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT) 261 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 262 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 263 #define PFERR_IMPLICIT_ACCESS (1ULL << PFERR_IMPLICIT_ACCESS_BIT) 264 265 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 266 PFERR_WRITE_MASK | \ 267 PFERR_PRESENT_MASK) 268 269 /* apic attention bits */ 270 #define KVM_APIC_CHECK_VAPIC 0 271 /* 272 * The following bit is set with PV-EOI, unset on EOI. 273 * We detect PV-EOI changes by guest by comparing 274 * this bit with PV-EOI in guest memory. 275 * See the implementation in apic_update_pv_eoi. 276 */ 277 #define KVM_APIC_PV_EOI_PENDING 1 278 279 struct kvm_kernel_irq_routing_entry; 280 281 /* 282 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page 283 * also includes TDP pages) to determine whether or not a page can be used in 284 * the given MMU context. This is a subset of the overall kvm_cpu_role to 285 * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating 286 * 2 bytes per gfn instead of 4 bytes per gfn. 287 * 288 * Upper-level shadow pages having gptes are tracked for write-protection via 289 * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create 290 * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise 291 * gfn_track will overflow and explosions will ensure. 292 * 293 * A unique shadow page (SP) for a gfn is created if and only if an existing SP 294 * cannot be reused. The ability to reuse a SP is tracked by its role, which 295 * incorporates various mode bits and properties of the SP. Roughly speaking, 296 * the number of unique SPs that can theoretically be created is 2^n, where n 297 * is the number of bits that are used to compute the role. 298 * 299 * But, even though there are 19 bits in the mask below, not all combinations 300 * of modes and flags are possible: 301 * 302 * - invalid shadow pages are not accounted, so the bits are effectively 18 303 * 304 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging); 305 * execonly and ad_disabled are only used for nested EPT which has 306 * has_4_byte_gpte=0. Therefore, 2 bits are always unused. 307 * 308 * - the 4 bits of level are effectively limited to the values 2/3/4/5, 309 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE 310 * paging has exactly one upper level, making level completely redundant 311 * when has_4_byte_gpte=1. 312 * 313 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if 314 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities. 315 * 316 * Therefore, the maximum number of possible upper-level shadow pages for a 317 * single gfn is a bit less than 2^13. 318 */ 319 union kvm_mmu_page_role { 320 u32 word; 321 struct { 322 unsigned level:4; 323 unsigned has_4_byte_gpte:1; 324 unsigned quadrant:2; 325 unsigned direct:1; 326 unsigned access:3; 327 unsigned invalid:1; 328 unsigned efer_nx:1; 329 unsigned cr0_wp:1; 330 unsigned smep_andnot_wp:1; 331 unsigned smap_andnot_wp:1; 332 unsigned ad_disabled:1; 333 unsigned guest_mode:1; 334 unsigned passthrough:1; 335 unsigned :5; 336 337 /* 338 * This is left at the top of the word so that 339 * kvm_memslots_for_spte_role can extract it with a 340 * simple shift. While there is room, give it a whole 341 * byte so it is also faster to load it from memory. 342 */ 343 unsigned smm:8; 344 }; 345 }; 346 347 /* 348 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties 349 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER, 350 * including on nested transitions, if nothing in the full role changes then 351 * MMU re-configuration can be skipped. @valid bit is set on first usage so we 352 * don't treat all-zero structure as valid data. 353 * 354 * The properties that are tracked in the extended role but not the page role 355 * are for things that either (a) do not affect the validity of the shadow page 356 * or (b) are indirectly reflected in the shadow page's role. For example, 357 * CR4.PKE only affects permission checks for software walks of the guest page 358 * tables (because KVM doesn't support Protection Keys with shadow paging), and 359 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level. 360 * 361 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role. 362 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and 363 * SMAP, but the MMU's permission checks for software walks need to be SMEP and 364 * SMAP aware regardless of CR0.WP. 365 */ 366 union kvm_mmu_extended_role { 367 u32 word; 368 struct { 369 unsigned int valid:1; 370 unsigned int execonly:1; 371 unsigned int cr4_pse:1; 372 unsigned int cr4_pke:1; 373 unsigned int cr4_smap:1; 374 unsigned int cr4_smep:1; 375 unsigned int cr4_la57:1; 376 unsigned int efer_lma:1; 377 }; 378 }; 379 380 union kvm_cpu_role { 381 u64 as_u64; 382 struct { 383 union kvm_mmu_page_role base; 384 union kvm_mmu_extended_role ext; 385 }; 386 }; 387 388 struct kvm_rmap_head { 389 unsigned long val; 390 }; 391 392 struct kvm_pio_request { 393 unsigned long linear_rip; 394 unsigned long count; 395 int in; 396 int port; 397 int size; 398 }; 399 400 #define PT64_ROOT_MAX_LEVEL 5 401 402 struct rsvd_bits_validate { 403 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 404 u64 bad_mt_xwr; 405 }; 406 407 struct kvm_mmu_root_info { 408 gpa_t pgd; 409 hpa_t hpa; 410 }; 411 412 #define KVM_MMU_ROOT_INFO_INVALID \ 413 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 414 415 #define KVM_MMU_NUM_PREV_ROOTS 3 416 417 #define KVM_HAVE_MMU_RWLOCK 418 419 struct kvm_mmu_page; 420 struct kvm_page_fault; 421 422 /* 423 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 424 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 425 * current mmu mode. 426 */ 427 struct kvm_mmu { 428 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 429 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 430 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault); 431 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 432 struct x86_exception *fault); 433 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 434 gpa_t gva_or_gpa, u64 access, 435 struct x86_exception *exception); 436 int (*sync_page)(struct kvm_vcpu *vcpu, 437 struct kvm_mmu_page *sp); 438 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 439 struct kvm_mmu_root_info root; 440 union kvm_cpu_role cpu_role; 441 union kvm_mmu_page_role root_role; 442 443 /* 444 * The pkru_mask indicates if protection key checks are needed. It 445 * consists of 16 domains indexed by page fault error code bits [4:1], 446 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 447 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 448 */ 449 u32 pkru_mask; 450 451 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 452 453 /* 454 * Bitmap; bit set = permission fault 455 * Byte index: page fault error code [4:1] 456 * Bit index: pte permissions in ACC_* format 457 */ 458 u8 permissions[16]; 459 460 u64 *pae_root; 461 u64 *pml4_root; 462 u64 *pml5_root; 463 464 /* 465 * check zero bits on shadow page table entries, these 466 * bits include not only hardware reserved bits but also 467 * the bits spte never used. 468 */ 469 struct rsvd_bits_validate shadow_zero_check; 470 471 struct rsvd_bits_validate guest_rsvd_check; 472 473 u64 pdptrs[4]; /* pae */ 474 }; 475 476 struct kvm_tlb_range { 477 u64 start_gfn; 478 u64 pages; 479 }; 480 481 enum pmc_type { 482 KVM_PMC_GP = 0, 483 KVM_PMC_FIXED, 484 }; 485 486 struct kvm_pmc { 487 enum pmc_type type; 488 u8 idx; 489 u64 counter; 490 u64 eventsel; 491 struct perf_event *perf_event; 492 struct kvm_vcpu *vcpu; 493 /* 494 * eventsel value for general purpose counters, 495 * ctrl value for fixed counters. 496 */ 497 u64 current_config; 498 bool is_paused; 499 bool intr; 500 }; 501 502 #define KVM_PMC_MAX_FIXED 3 503 struct kvm_pmu { 504 unsigned nr_arch_gp_counters; 505 unsigned nr_arch_fixed_counters; 506 unsigned available_event_types; 507 u64 fixed_ctr_ctrl; 508 u64 global_ctrl; 509 u64 global_status; 510 u64 counter_bitmask[2]; 511 u64 global_ctrl_mask; 512 u64 global_ovf_ctrl_mask; 513 u64 reserved_bits; 514 u64 raw_event_mask; 515 u8 version; 516 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 517 struct kvm_pmc fixed_counters[KVM_PMC_MAX_FIXED]; 518 struct irq_work irq_work; 519 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 520 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 521 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 522 523 /* 524 * The gate to release perf_events not marked in 525 * pmc_in_use only once in a vcpu time slice. 526 */ 527 bool need_cleanup; 528 529 /* 530 * The total number of programmed perf_events and it helps to avoid 531 * redundant check before cleanup if guest don't use vPMU at all. 532 */ 533 u8 event_count; 534 }; 535 536 struct kvm_pmu_ops; 537 538 enum { 539 KVM_DEBUGREG_BP_ENABLED = 1, 540 KVM_DEBUGREG_WONT_EXIT = 2, 541 }; 542 543 struct kvm_mtrr_range { 544 u64 base; 545 u64 mask; 546 struct list_head node; 547 }; 548 549 struct kvm_mtrr { 550 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 551 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 552 u64 deftype; 553 554 struct list_head head; 555 }; 556 557 /* Hyper-V SynIC timer */ 558 struct kvm_vcpu_hv_stimer { 559 struct hrtimer timer; 560 int index; 561 union hv_stimer_config config; 562 u64 count; 563 u64 exp_time; 564 struct hv_message msg; 565 bool msg_pending; 566 }; 567 568 /* Hyper-V synthetic interrupt controller (SynIC)*/ 569 struct kvm_vcpu_hv_synic { 570 u64 version; 571 u64 control; 572 u64 msg_page; 573 u64 evt_page; 574 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 575 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 576 DECLARE_BITMAP(auto_eoi_bitmap, 256); 577 DECLARE_BITMAP(vec_bitmap, 256); 578 bool active; 579 bool dont_zero_synic_pages; 580 }; 581 582 /* Hyper-V per vcpu emulation context */ 583 struct kvm_vcpu_hv { 584 struct kvm_vcpu *vcpu; 585 u32 vp_index; 586 u64 hv_vapic; 587 s64 runtime_offset; 588 struct kvm_vcpu_hv_synic synic; 589 struct kvm_hyperv_exit exit; 590 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 591 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 592 bool enforce_cpuid; 593 struct { 594 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */ 595 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */ 596 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */ 597 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */ 598 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */ 599 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */ 600 } cpuid_cache; 601 }; 602 603 /* Xen HVM per vcpu emulation context */ 604 struct kvm_vcpu_xen { 605 u64 hypercall_rip; 606 u32 current_runstate; 607 u8 upcall_vector; 608 struct gfn_to_pfn_cache vcpu_info_cache; 609 struct gfn_to_pfn_cache vcpu_time_info_cache; 610 struct gfn_to_pfn_cache runstate_cache; 611 u64 last_steal; 612 u64 runstate_entry_time; 613 u64 runstate_times[4]; 614 unsigned long evtchn_pending_sel; 615 u32 vcpu_id; /* The Xen / ACPI vCPU ID */ 616 u32 timer_virq; 617 u64 timer_expires; /* In guest epoch */ 618 atomic_t timer_pending; 619 struct hrtimer timer; 620 int poll_evtchn; 621 struct timer_list poll_timer; 622 }; 623 624 struct kvm_vcpu_arch { 625 /* 626 * rip and regs accesses must go through 627 * kvm_{register,rip}_{read,write} functions. 628 */ 629 unsigned long regs[NR_VCPU_REGS]; 630 u32 regs_avail; 631 u32 regs_dirty; 632 633 unsigned long cr0; 634 unsigned long cr0_guest_owned_bits; 635 unsigned long cr2; 636 unsigned long cr3; 637 unsigned long cr4; 638 unsigned long cr4_guest_owned_bits; 639 unsigned long cr4_guest_rsvd_bits; 640 unsigned long cr8; 641 u32 host_pkru; 642 u32 pkru; 643 u32 hflags; 644 u64 efer; 645 u64 apic_base; 646 struct kvm_lapic *apic; /* kernel irqchip context */ 647 bool apicv_active; 648 bool load_eoi_exitmap_pending; 649 DECLARE_BITMAP(ioapic_handled_vectors, 256); 650 unsigned long apic_attention; 651 int32_t apic_arb_prio; 652 int mp_state; 653 u64 ia32_misc_enable_msr; 654 u64 smbase; 655 u64 smi_count; 656 bool tpr_access_reporting; 657 bool xsaves_enabled; 658 bool xfd_no_write_intercept; 659 u64 ia32_xss; 660 u64 microcode_version; 661 u64 arch_capabilities; 662 u64 perf_capabilities; 663 664 /* 665 * Paging state of the vcpu 666 * 667 * If the vcpu runs in guest mode with two level paging this still saves 668 * the paging mode of the l1 guest. This context is always used to 669 * handle faults. 670 */ 671 struct kvm_mmu *mmu; 672 673 /* Non-nested MMU for L1 */ 674 struct kvm_mmu root_mmu; 675 676 /* L1 MMU when running nested */ 677 struct kvm_mmu guest_mmu; 678 679 /* 680 * Paging state of an L2 guest (used for nested npt) 681 * 682 * This context will save all necessary information to walk page tables 683 * of an L2 guest. This context is only initialized for page table 684 * walking and not for faulting since we never handle l2 page faults on 685 * the host. 686 */ 687 struct kvm_mmu nested_mmu; 688 689 /* 690 * Pointer to the mmu context currently used for 691 * gva_to_gpa translations. 692 */ 693 struct kvm_mmu *walk_mmu; 694 695 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 696 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 697 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 698 struct kvm_mmu_memory_cache mmu_page_header_cache; 699 700 /* 701 * QEMU userspace and the guest each have their own FPU state. 702 * In vcpu_run, we switch between the user and guest FPU contexts. 703 * While running a VCPU, the VCPU thread will have the guest FPU 704 * context. 705 * 706 * Note that while the PKRU state lives inside the fpu registers, 707 * it is switched out separately at VMENTER and VMEXIT time. The 708 * "guest_fpstate" state here contains the guest FPU context, with the 709 * host PRKU bits. 710 */ 711 struct fpu_guest guest_fpu; 712 713 u64 xcr0; 714 715 struct kvm_pio_request pio; 716 void *pio_data; 717 void *sev_pio_data; 718 unsigned sev_pio_count; 719 720 u8 event_exit_inst_len; 721 722 struct kvm_queued_exception { 723 bool pending; 724 bool injected; 725 bool has_error_code; 726 u8 nr; 727 u32 error_code; 728 unsigned long payload; 729 bool has_payload; 730 u8 nested_apf; 731 } exception; 732 733 struct kvm_queued_interrupt { 734 bool injected; 735 bool soft; 736 u8 nr; 737 } interrupt; 738 739 int halt_request; /* real mode on Intel only */ 740 741 int cpuid_nent; 742 struct kvm_cpuid_entry2 *cpuid_entries; 743 u32 kvm_cpuid_base; 744 745 u64 reserved_gpa_bits; 746 int maxphyaddr; 747 748 /* emulate context */ 749 750 struct x86_emulate_ctxt *emulate_ctxt; 751 bool emulate_regs_need_sync_to_vcpu; 752 bool emulate_regs_need_sync_from_vcpu; 753 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 754 755 gpa_t time; 756 struct pvclock_vcpu_time_info hv_clock; 757 unsigned int hw_tsc_khz; 758 struct gfn_to_pfn_cache pv_time; 759 /* set guest stopped flag in pvclock flags field */ 760 bool pvclock_set_guest_stopped_request; 761 762 struct { 763 u8 preempted; 764 u64 msr_val; 765 u64 last_steal; 766 struct gfn_to_hva_cache cache; 767 } st; 768 769 u64 l1_tsc_offset; 770 u64 tsc_offset; /* current tsc offset */ 771 u64 last_guest_tsc; 772 u64 last_host_tsc; 773 u64 tsc_offset_adjustment; 774 u64 this_tsc_nsec; 775 u64 this_tsc_write; 776 u64 this_tsc_generation; 777 bool tsc_catchup; 778 bool tsc_always_catchup; 779 s8 virtual_tsc_shift; 780 u32 virtual_tsc_mult; 781 u32 virtual_tsc_khz; 782 s64 ia32_tsc_adjust_msr; 783 u64 msr_ia32_power_ctl; 784 u64 l1_tsc_scaling_ratio; 785 u64 tsc_scaling_ratio; /* current scaling ratio */ 786 787 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 788 unsigned nmi_pending; /* NMI queued after currently running handler */ 789 bool nmi_injected; /* Trying to inject an NMI this entry */ 790 bool smi_pending; /* SMI queued after currently running handler */ 791 u8 handling_intr_from_guest; 792 793 struct kvm_mtrr mtrr_state; 794 u64 pat; 795 796 unsigned switch_db_regs; 797 unsigned long db[KVM_NR_DB_REGS]; 798 unsigned long dr6; 799 unsigned long dr7; 800 unsigned long eff_db[KVM_NR_DB_REGS]; 801 unsigned long guest_debug_dr7; 802 u64 msr_platform_info; 803 u64 msr_misc_features_enables; 804 805 u64 mcg_cap; 806 u64 mcg_status; 807 u64 mcg_ctl; 808 u64 mcg_ext_ctl; 809 u64 *mce_banks; 810 811 /* Cache MMIO info */ 812 u64 mmio_gva; 813 unsigned mmio_access; 814 gfn_t mmio_gfn; 815 u64 mmio_gen; 816 817 struct kvm_pmu pmu; 818 819 /* used for guest single stepping over the given code position */ 820 unsigned long singlestep_rip; 821 822 bool hyperv_enabled; 823 struct kvm_vcpu_hv *hyperv; 824 struct kvm_vcpu_xen xen; 825 826 cpumask_var_t wbinvd_dirty_mask; 827 828 unsigned long last_retry_eip; 829 unsigned long last_retry_addr; 830 831 struct { 832 bool halted; 833 gfn_t gfns[ASYNC_PF_PER_VCPU]; 834 struct gfn_to_hva_cache data; 835 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 836 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 837 u16 vec; 838 u32 id; 839 bool send_user_only; 840 u32 host_apf_flags; 841 unsigned long nested_apf_token; 842 bool delivery_as_pf_vmexit; 843 bool pageready_pending; 844 } apf; 845 846 /* OSVW MSRs (AMD only) */ 847 struct { 848 u64 length; 849 u64 status; 850 } osvw; 851 852 struct { 853 u64 msr_val; 854 struct gfn_to_hva_cache data; 855 } pv_eoi; 856 857 u64 msr_kvm_poll_control; 858 859 /* 860 * Indicates the guest is trying to write a gfn that contains one or 861 * more of the PTEs used to translate the write itself, i.e. the access 862 * is changing its own translation in the guest page tables. KVM exits 863 * to userspace if emulation of the faulting instruction fails and this 864 * flag is set, as KVM cannot make forward progress. 865 * 866 * If emulation fails for a write to guest page tables, KVM unprotects 867 * (zaps) the shadow page for the target gfn and resumes the guest to 868 * retry the non-emulatable instruction (on hardware). Unprotecting the 869 * gfn doesn't allow forward progress for a self-changing access because 870 * doing so also zaps the translation for the gfn, i.e. retrying the 871 * instruction will hit a !PRESENT fault, which results in a new shadow 872 * page and sends KVM back to square one. 873 */ 874 bool write_fault_to_shadow_pgtable; 875 876 /* set at EPT violation at this point */ 877 unsigned long exit_qualification; 878 879 /* pv related host specific info */ 880 struct { 881 bool pv_unhalted; 882 } pv; 883 884 int pending_ioapic_eoi; 885 int pending_external_vector; 886 887 /* be preempted when it's in kernel-mode(cpl=0) */ 888 bool preempted_in_kernel; 889 890 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 891 bool l1tf_flush_l1d; 892 893 /* Host CPU on which VM-entry was most recently attempted */ 894 int last_vmentry_cpu; 895 896 /* AMD MSRC001_0015 Hardware Configuration */ 897 u64 msr_hwcr; 898 899 /* pv related cpuid info */ 900 struct { 901 /* 902 * value of the eax register in the KVM_CPUID_FEATURES CPUID 903 * leaf. 904 */ 905 u32 features; 906 907 /* 908 * indicates whether pv emulation should be disabled if features 909 * are not present in the guest's cpuid 910 */ 911 bool enforce; 912 } pv_cpuid; 913 914 /* Protected Guests */ 915 bool guest_state_protected; 916 917 /* 918 * Set when PDPTS were loaded directly by the userspace without 919 * reading the guest memory 920 */ 921 bool pdptrs_from_userspace; 922 923 #if IS_ENABLED(CONFIG_HYPERV) 924 hpa_t hv_root_tdp; 925 #endif 926 }; 927 928 struct kvm_lpage_info { 929 int disallow_lpage; 930 }; 931 932 struct kvm_arch_memory_slot { 933 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 934 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 935 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 936 }; 937 938 /* 939 * We use as the mode the number of bits allocated in the LDR for the 940 * logical processor ID. It happens that these are all powers of two. 941 * This makes it is very easy to detect cases where the APICs are 942 * configured for multiple modes; in that case, we cannot use the map and 943 * hence cannot use kvm_irq_delivery_to_apic_fast either. 944 */ 945 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 946 #define KVM_APIC_MODE_XAPIC_FLAT 8 947 #define KVM_APIC_MODE_X2APIC 16 948 949 struct kvm_apic_map { 950 struct rcu_head rcu; 951 u8 mode; 952 u32 max_apic_id; 953 union { 954 struct kvm_lapic *xapic_flat_map[8]; 955 struct kvm_lapic *xapic_cluster_map[16][4]; 956 }; 957 struct kvm_lapic *phys_map[]; 958 }; 959 960 /* Hyper-V synthetic debugger (SynDbg)*/ 961 struct kvm_hv_syndbg { 962 struct { 963 u64 control; 964 u64 status; 965 u64 send_page; 966 u64 recv_page; 967 u64 pending_page; 968 } control; 969 u64 options; 970 }; 971 972 /* Current state of Hyper-V TSC page clocksource */ 973 enum hv_tsc_page_status { 974 /* TSC page was not set up or disabled */ 975 HV_TSC_PAGE_UNSET = 0, 976 /* TSC page MSR was written by the guest, update pending */ 977 HV_TSC_PAGE_GUEST_CHANGED, 978 /* TSC page update was triggered from the host side */ 979 HV_TSC_PAGE_HOST_CHANGED, 980 /* TSC page was properly set up and is currently active */ 981 HV_TSC_PAGE_SET, 982 /* TSC page was set up with an inaccessible GPA */ 983 HV_TSC_PAGE_BROKEN, 984 }; 985 986 /* Hyper-V emulation context */ 987 struct kvm_hv { 988 struct mutex hv_lock; 989 u64 hv_guest_os_id; 990 u64 hv_hypercall; 991 u64 hv_tsc_page; 992 enum hv_tsc_page_status hv_tsc_page_status; 993 994 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 995 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 996 u64 hv_crash_ctl; 997 998 struct ms_hyperv_tsc_page tsc_ref; 999 1000 struct idr conn_to_evt; 1001 1002 u64 hv_reenlightenment_control; 1003 u64 hv_tsc_emulation_control; 1004 u64 hv_tsc_emulation_status; 1005 1006 /* How many vCPUs have VP index != vCPU index */ 1007 atomic_t num_mismatched_vp_indexes; 1008 1009 /* 1010 * How many SynICs use 'AutoEOI' feature 1011 * (protected by arch.apicv_update_lock) 1012 */ 1013 unsigned int synic_auto_eoi_used; 1014 1015 struct hv_partition_assist_pg *hv_pa_pg; 1016 struct kvm_hv_syndbg hv_syndbg; 1017 }; 1018 1019 struct msr_bitmap_range { 1020 u32 flags; 1021 u32 nmsrs; 1022 u32 base; 1023 unsigned long *bitmap; 1024 }; 1025 1026 /* Xen emulation context */ 1027 struct kvm_xen { 1028 u32 xen_version; 1029 bool long_mode; 1030 u8 upcall_vector; 1031 struct gfn_to_pfn_cache shinfo_cache; 1032 struct idr evtchn_ports; 1033 unsigned long poll_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)]; 1034 }; 1035 1036 enum kvm_irqchip_mode { 1037 KVM_IRQCHIP_NONE, 1038 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 1039 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 1040 }; 1041 1042 struct kvm_x86_msr_filter { 1043 u8 count; 1044 bool default_allow:1; 1045 struct msr_bitmap_range ranges[16]; 1046 }; 1047 1048 enum kvm_apicv_inhibit { 1049 APICV_INHIBIT_REASON_DISABLE, 1050 APICV_INHIBIT_REASON_HYPERV, 1051 APICV_INHIBIT_REASON_NESTED, 1052 APICV_INHIBIT_REASON_IRQWIN, 1053 APICV_INHIBIT_REASON_PIT_REINJ, 1054 APICV_INHIBIT_REASON_X2APIC, 1055 APICV_INHIBIT_REASON_BLOCKIRQ, 1056 APICV_INHIBIT_REASON_ABSENT, 1057 APICV_INHIBIT_REASON_SEV, 1058 }; 1059 1060 struct kvm_arch { 1061 unsigned long n_used_mmu_pages; 1062 unsigned long n_requested_mmu_pages; 1063 unsigned long n_max_mmu_pages; 1064 unsigned int indirect_shadow_pages; 1065 u8 mmu_valid_gen; 1066 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 1067 struct list_head active_mmu_pages; 1068 struct list_head zapped_obsolete_pages; 1069 struct list_head lpage_disallowed_mmu_pages; 1070 struct kvm_page_track_notifier_node mmu_sp_tracker; 1071 struct kvm_page_track_notifier_head track_notifier_head; 1072 /* 1073 * Protects marking pages unsync during page faults, as TDP MMU page 1074 * faults only take mmu_lock for read. For simplicity, the unsync 1075 * pages lock is always taken when marking pages unsync regardless of 1076 * whether mmu_lock is held for read or write. 1077 */ 1078 spinlock_t mmu_unsync_pages_lock; 1079 1080 struct list_head assigned_dev_head; 1081 struct iommu_domain *iommu_domain; 1082 bool iommu_noncoherent; 1083 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 1084 atomic_t noncoherent_dma_count; 1085 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 1086 atomic_t assigned_device_count; 1087 struct kvm_pic *vpic; 1088 struct kvm_ioapic *vioapic; 1089 struct kvm_pit *vpit; 1090 atomic_t vapics_in_nmi_mode; 1091 struct mutex apic_map_lock; 1092 struct kvm_apic_map __rcu *apic_map; 1093 atomic_t apic_map_dirty; 1094 1095 /* Protects apic_access_memslot_enabled and apicv_inhibit_reasons */ 1096 struct rw_semaphore apicv_update_lock; 1097 1098 bool apic_access_memslot_enabled; 1099 unsigned long apicv_inhibit_reasons; 1100 1101 gpa_t wall_clock; 1102 1103 bool mwait_in_guest; 1104 bool hlt_in_guest; 1105 bool pause_in_guest; 1106 bool cstate_in_guest; 1107 1108 unsigned long irq_sources_bitmap; 1109 s64 kvmclock_offset; 1110 1111 /* 1112 * This also protects nr_vcpus_matched_tsc which is read from a 1113 * preemption-disabled region, so it must be a raw spinlock. 1114 */ 1115 raw_spinlock_t tsc_write_lock; 1116 u64 last_tsc_nsec; 1117 u64 last_tsc_write; 1118 u32 last_tsc_khz; 1119 u64 last_tsc_offset; 1120 u64 cur_tsc_nsec; 1121 u64 cur_tsc_write; 1122 u64 cur_tsc_offset; 1123 u64 cur_tsc_generation; 1124 int nr_vcpus_matched_tsc; 1125 1126 u32 default_tsc_khz; 1127 1128 seqcount_raw_spinlock_t pvclock_sc; 1129 bool use_master_clock; 1130 u64 master_kernel_ns; 1131 u64 master_cycle_now; 1132 struct delayed_work kvmclock_update_work; 1133 struct delayed_work kvmclock_sync_work; 1134 1135 struct kvm_xen_hvm_config xen_hvm_config; 1136 1137 /* reads protected by irq_srcu, writes by irq_lock */ 1138 struct hlist_head mask_notifier_list; 1139 1140 struct kvm_hv hyperv; 1141 struct kvm_xen xen; 1142 1143 bool backwards_tsc_observed; 1144 bool boot_vcpu_runs_old_kvmclock; 1145 u32 bsp_vcpu_id; 1146 1147 u64 disabled_quirks; 1148 int cpu_dirty_logging_count; 1149 1150 enum kvm_irqchip_mode irqchip_mode; 1151 u8 nr_reserved_ioapic_pins; 1152 1153 bool disabled_lapic_found; 1154 1155 bool x2apic_format; 1156 bool x2apic_broadcast_quirk_disabled; 1157 1158 bool guest_can_read_msr_platform_info; 1159 bool exception_payload_enabled; 1160 1161 bool bus_lock_detection_enabled; 1162 bool enable_pmu; 1163 /* 1164 * If exit_on_emulation_error is set, and the in-kernel instruction 1165 * emulator fails to emulate an instruction, allow userspace 1166 * the opportunity to look at it. 1167 */ 1168 bool exit_on_emulation_error; 1169 1170 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 1171 u32 user_space_msr_mask; 1172 struct kvm_x86_msr_filter __rcu *msr_filter; 1173 1174 u32 hypercall_exit_enabled; 1175 1176 /* Guest can access the SGX PROVISIONKEY. */ 1177 bool sgx_provisioning_allowed; 1178 1179 struct kvm_pmu_event_filter __rcu *pmu_event_filter; 1180 struct task_struct *nx_lpage_recovery_thread; 1181 1182 #ifdef CONFIG_X86_64 1183 /* 1184 * Whether the TDP MMU is enabled for this VM. This contains a 1185 * snapshot of the TDP MMU module parameter from when the VM was 1186 * created and remains unchanged for the life of the VM. If this is 1187 * true, TDP MMU handler functions will run for various MMU 1188 * operations. 1189 */ 1190 bool tdp_mmu_enabled; 1191 1192 /* 1193 * List of struct kvm_mmu_pages being used as roots. 1194 * All struct kvm_mmu_pages in the list should have 1195 * tdp_mmu_page set. 1196 * 1197 * For reads, this list is protected by: 1198 * the MMU lock in read mode + RCU or 1199 * the MMU lock in write mode 1200 * 1201 * For writes, this list is protected by: 1202 * the MMU lock in read mode + the tdp_mmu_pages_lock or 1203 * the MMU lock in write mode 1204 * 1205 * Roots will remain in the list until their tdp_mmu_root_count 1206 * drops to zero, at which point the thread that decremented the 1207 * count to zero should removed the root from the list and clean 1208 * it up, freeing the root after an RCU grace period. 1209 */ 1210 struct list_head tdp_mmu_roots; 1211 1212 /* 1213 * List of struct kvmp_mmu_pages not being used as roots. 1214 * All struct kvm_mmu_pages in the list should have 1215 * tdp_mmu_page set and a tdp_mmu_root_count of 0. 1216 */ 1217 struct list_head tdp_mmu_pages; 1218 1219 /* 1220 * Protects accesses to the following fields when the MMU lock 1221 * is held in read mode: 1222 * - tdp_mmu_roots (above) 1223 * - tdp_mmu_pages (above) 1224 * - the link field of struct kvm_mmu_pages used by the TDP MMU 1225 * - lpage_disallowed_mmu_pages 1226 * - the lpage_disallowed_link field of struct kvm_mmu_pages used 1227 * by the TDP MMU 1228 * It is acceptable, but not necessary, to acquire this lock when 1229 * the thread holds the MMU lock in write mode. 1230 */ 1231 spinlock_t tdp_mmu_pages_lock; 1232 struct workqueue_struct *tdp_mmu_zap_wq; 1233 #endif /* CONFIG_X86_64 */ 1234 1235 /* 1236 * If set, at least one shadow root has been allocated. This flag 1237 * is used as one input when determining whether certain memslot 1238 * related allocations are necessary. 1239 */ 1240 bool shadow_root_allocated; 1241 1242 #if IS_ENABLED(CONFIG_HYPERV) 1243 hpa_t hv_root_tdp; 1244 spinlock_t hv_root_tdp_lock; 1245 #endif 1246 }; 1247 1248 struct kvm_vm_stat { 1249 struct kvm_vm_stat_generic generic; 1250 u64 mmu_shadow_zapped; 1251 u64 mmu_pte_write; 1252 u64 mmu_pde_zapped; 1253 u64 mmu_flooded; 1254 u64 mmu_recycled; 1255 u64 mmu_cache_miss; 1256 u64 mmu_unsync; 1257 union { 1258 struct { 1259 atomic64_t pages_4k; 1260 atomic64_t pages_2m; 1261 atomic64_t pages_1g; 1262 }; 1263 atomic64_t pages[KVM_NR_PAGE_SIZES]; 1264 }; 1265 u64 nx_lpage_splits; 1266 u64 max_mmu_page_hash_collisions; 1267 u64 max_mmu_rmap_size; 1268 }; 1269 1270 struct kvm_vcpu_stat { 1271 struct kvm_vcpu_stat_generic generic; 1272 u64 pf_taken; 1273 u64 pf_fixed; 1274 u64 pf_emulate; 1275 u64 pf_spurious; 1276 u64 pf_fast; 1277 u64 pf_mmio_spte_created; 1278 u64 pf_guest; 1279 u64 tlb_flush; 1280 u64 invlpg; 1281 1282 u64 exits; 1283 u64 io_exits; 1284 u64 mmio_exits; 1285 u64 signal_exits; 1286 u64 irq_window_exits; 1287 u64 nmi_window_exits; 1288 u64 l1d_flush; 1289 u64 halt_exits; 1290 u64 request_irq_exits; 1291 u64 irq_exits; 1292 u64 host_state_reload; 1293 u64 fpu_reload; 1294 u64 insn_emulation; 1295 u64 insn_emulation_fail; 1296 u64 hypercalls; 1297 u64 irq_injections; 1298 u64 nmi_injections; 1299 u64 req_event; 1300 u64 nested_run; 1301 u64 directed_yield_attempted; 1302 u64 directed_yield_successful; 1303 u64 guest_mode; 1304 }; 1305 1306 struct x86_instruction_info; 1307 1308 struct msr_data { 1309 bool host_initiated; 1310 u32 index; 1311 u64 data; 1312 }; 1313 1314 struct kvm_lapic_irq { 1315 u32 vector; 1316 u16 delivery_mode; 1317 u16 dest_mode; 1318 bool level; 1319 u16 trig_mode; 1320 u32 shorthand; 1321 u32 dest_id; 1322 bool msi_redir_hint; 1323 }; 1324 1325 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1326 { 1327 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1328 } 1329 1330 struct kvm_x86_ops { 1331 const char *name; 1332 1333 int (*hardware_enable)(void); 1334 void (*hardware_disable)(void); 1335 void (*hardware_unsetup)(void); 1336 bool (*has_emulated_msr)(struct kvm *kvm, u32 index); 1337 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1338 1339 unsigned int vm_size; 1340 int (*vm_init)(struct kvm *kvm); 1341 void (*vm_destroy)(struct kvm *kvm); 1342 1343 /* Create, but do not attach this VCPU */ 1344 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1345 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1346 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1347 1348 void (*prepare_switch_to_guest)(struct kvm_vcpu *vcpu); 1349 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1350 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1351 1352 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1353 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1354 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1355 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1356 void (*get_segment)(struct kvm_vcpu *vcpu, 1357 struct kvm_segment *var, int seg); 1358 int (*get_cpl)(struct kvm_vcpu *vcpu); 1359 void (*set_segment)(struct kvm_vcpu *vcpu, 1360 struct kvm_segment *var, int seg); 1361 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1362 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1363 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1364 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1365 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1366 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1367 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1368 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1369 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1370 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1371 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1372 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1373 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1374 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1375 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1376 bool (*get_if_flag)(struct kvm_vcpu *vcpu); 1377 1378 void (*flush_tlb_all)(struct kvm_vcpu *vcpu); 1379 void (*flush_tlb_current)(struct kvm_vcpu *vcpu); 1380 int (*tlb_remote_flush)(struct kvm *kvm); 1381 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1382 struct kvm_tlb_range *range); 1383 1384 /* 1385 * Flush any TLB entries associated with the given GVA. 1386 * Does not need to flush GPA->HPA mappings. 1387 * Can potentially get non-canonical addresses through INVLPGs, which 1388 * the implementation may choose to ignore if appropriate. 1389 */ 1390 void (*flush_tlb_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1391 1392 /* 1393 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1394 * does not need to flush GPA->HPA mappings. 1395 */ 1396 void (*flush_tlb_guest)(struct kvm_vcpu *vcpu); 1397 1398 int (*vcpu_pre_run)(struct kvm_vcpu *vcpu); 1399 enum exit_fastpath_completion (*vcpu_run)(struct kvm_vcpu *vcpu); 1400 int (*handle_exit)(struct kvm_vcpu *vcpu, 1401 enum exit_fastpath_completion exit_fastpath); 1402 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1403 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1404 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1405 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1406 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1407 unsigned char *hypercall_addr); 1408 void (*inject_irq)(struct kvm_vcpu *vcpu); 1409 void (*inject_nmi)(struct kvm_vcpu *vcpu); 1410 void (*queue_exception)(struct kvm_vcpu *vcpu); 1411 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1412 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1413 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1414 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1415 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1416 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1417 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1418 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1419 bool (*check_apicv_inhibit_reasons)(enum kvm_apicv_inhibit reason); 1420 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1421 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1422 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1423 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1424 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1425 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1426 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1427 void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode, 1428 int trig_mode, int vector); 1429 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1430 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1431 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1432 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1433 1434 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa, 1435 int root_level); 1436 1437 bool (*has_wbinvd_exit)(void); 1438 1439 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu); 1440 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu); 1441 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1442 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier); 1443 1444 /* 1445 * Retrieve somewhat arbitrary exit information. Intended to 1446 * be used only from within tracepoints or error paths. 1447 */ 1448 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason, 1449 u64 *info1, u64 *info2, 1450 u32 *exit_int_info, u32 *exit_int_info_err_code); 1451 1452 int (*check_intercept)(struct kvm_vcpu *vcpu, 1453 struct x86_instruction_info *info, 1454 enum x86_intercept_stage stage, 1455 struct x86_exception *exception); 1456 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1457 1458 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1459 1460 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1461 1462 /* 1463 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero 1464 * value indicates CPU dirty logging is unsupported or disabled. 1465 */ 1466 int cpu_dirty_log_size; 1467 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu); 1468 1469 const struct kvm_x86_nested_ops *nested_ops; 1470 1471 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1472 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1473 1474 int (*pi_update_irte)(struct kvm *kvm, unsigned int host_irq, 1475 uint32_t guest_irq, bool set); 1476 void (*pi_start_assignment)(struct kvm *kvm); 1477 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1478 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1479 1480 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1481 bool *expired); 1482 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1483 1484 void (*setup_mce)(struct kvm_vcpu *vcpu); 1485 1486 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1487 int (*enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1488 int (*leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1489 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1490 1491 int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp); 1492 int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1493 int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1494 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1495 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1496 void (*guest_memory_reclaimed)(struct kvm *kvm); 1497 1498 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1499 1500 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type, 1501 void *insn, int insn_len); 1502 1503 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1504 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1505 1506 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1507 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1508 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); 1509 1510 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); 1511 1512 /* 1513 * Returns vCPU specific APICv inhibit reasons 1514 */ 1515 unsigned long (*vcpu_get_apicv_inhibit_reasons)(struct kvm_vcpu *vcpu); 1516 }; 1517 1518 struct kvm_x86_nested_ops { 1519 void (*leave_nested)(struct kvm_vcpu *vcpu); 1520 int (*check_events)(struct kvm_vcpu *vcpu); 1521 bool (*handle_page_fault_workaround)(struct kvm_vcpu *vcpu, 1522 struct x86_exception *fault); 1523 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1524 void (*triple_fault)(struct kvm_vcpu *vcpu); 1525 int (*get_state)(struct kvm_vcpu *vcpu, 1526 struct kvm_nested_state __user *user_kvm_nested_state, 1527 unsigned user_data_size); 1528 int (*set_state)(struct kvm_vcpu *vcpu, 1529 struct kvm_nested_state __user *user_kvm_nested_state, 1530 struct kvm_nested_state *kvm_state); 1531 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1532 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1533 1534 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1535 uint16_t *vmcs_version); 1536 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1537 }; 1538 1539 struct kvm_x86_init_ops { 1540 int (*cpu_has_kvm_support)(void); 1541 int (*disabled_by_bios)(void); 1542 int (*check_processor_compatibility)(void); 1543 int (*hardware_setup)(void); 1544 unsigned int (*handle_intel_pt_intr)(void); 1545 1546 struct kvm_x86_ops *runtime_ops; 1547 struct kvm_pmu_ops *pmu_ops; 1548 }; 1549 1550 struct kvm_arch_async_pf { 1551 u32 token; 1552 gfn_t gfn; 1553 unsigned long cr3; 1554 bool direct_map; 1555 }; 1556 1557 extern u32 __read_mostly kvm_nr_uret_msrs; 1558 extern u64 __read_mostly host_efer; 1559 extern bool __read_mostly allow_smaller_maxphyaddr; 1560 extern bool __read_mostly enable_apicv; 1561 extern struct kvm_x86_ops kvm_x86_ops; 1562 1563 #define KVM_X86_OP(func) \ 1564 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func)); 1565 #define KVM_X86_OP_OPTIONAL KVM_X86_OP 1566 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP 1567 #include <asm/kvm-x86-ops.h> 1568 1569 #define __KVM_HAVE_ARCH_VM_ALLOC 1570 static inline struct kvm *kvm_arch_alloc_vm(void) 1571 { 1572 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1573 } 1574 1575 #define __KVM_HAVE_ARCH_VM_FREE 1576 void kvm_arch_free_vm(struct kvm *kvm); 1577 1578 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1579 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1580 { 1581 if (kvm_x86_ops.tlb_remote_flush && 1582 !static_call(kvm_x86_tlb_remote_flush)(kvm)) 1583 return 0; 1584 else 1585 return -ENOTSUPP; 1586 } 1587 1588 #define kvm_arch_pmi_in_guest(vcpu) \ 1589 ((vcpu) && (vcpu)->arch.handling_intr_from_guest) 1590 1591 void kvm_mmu_x86_module_init(void); 1592 int kvm_mmu_vendor_module_init(void); 1593 void kvm_mmu_vendor_module_exit(void); 1594 1595 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1596 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1597 int kvm_mmu_init_vm(struct kvm *kvm); 1598 void kvm_mmu_uninit_vm(struct kvm *kvm); 1599 1600 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu); 1601 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1602 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1603 const struct kvm_memory_slot *memslot, 1604 int start_level); 1605 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm, 1606 const struct kvm_memory_slot *memslot, 1607 int target_level); 1608 void kvm_mmu_try_split_huge_pages(struct kvm *kvm, 1609 const struct kvm_memory_slot *memslot, 1610 u64 start, u64 end, 1611 int target_level); 1612 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1613 const struct kvm_memory_slot *memslot); 1614 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1615 const struct kvm_memory_slot *memslot); 1616 void kvm_mmu_zap_all(struct kvm *kvm); 1617 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1618 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1619 1620 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); 1621 1622 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1623 const void *val, int bytes); 1624 1625 struct kvm_irq_mask_notifier { 1626 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1627 int irq; 1628 struct hlist_node link; 1629 }; 1630 1631 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1632 struct kvm_irq_mask_notifier *kimn); 1633 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1634 struct kvm_irq_mask_notifier *kimn); 1635 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1636 bool mask); 1637 1638 extern bool tdp_enabled; 1639 1640 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1641 1642 /* control of guest tsc rate supported? */ 1643 extern bool kvm_has_tsc_control; 1644 /* maximum supported tsc_khz for guests */ 1645 extern u32 kvm_max_guest_tsc_khz; 1646 /* number of bits of the fractional part of the TSC scaling ratio */ 1647 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1648 /* maximum allowed value of TSC scaling ratio */ 1649 extern u64 kvm_max_tsc_scaling_ratio; 1650 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1651 extern u64 kvm_default_tsc_scaling_ratio; 1652 /* bus lock detection supported? */ 1653 extern bool kvm_has_bus_lock_exit; 1654 1655 extern u64 kvm_mce_cap_supported; 1656 1657 /* 1658 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1659 * userspace I/O) to indicate that the emulation context 1660 * should be reused as is, i.e. skip initialization of 1661 * emulation context, instruction fetch and decode. 1662 * 1663 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1664 * Indicates that only select instructions (tagged with 1665 * EmulateOnUD) should be emulated (to minimize the emulator 1666 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1667 * 1668 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1669 * decode the instruction length. For use *only* by 1670 * kvm_x86_ops.skip_emulated_instruction() implementations if 1671 * EMULTYPE_COMPLETE_USER_EXIT is not set. 1672 * 1673 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1674 * retry native execution under certain conditions, 1675 * Can only be set in conjunction with EMULTYPE_PF. 1676 * 1677 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1678 * triggered by KVM's magic "force emulation" prefix, 1679 * which is opt in via module param (off by default). 1680 * Bypasses EmulateOnUD restriction despite emulating 1681 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1682 * Used to test the full emulator from userspace. 1683 * 1684 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1685 * backdoor emulation, which is opt in via module param. 1686 * VMware backdoor emulation handles select instructions 1687 * and reinjects the #GP for all other cases. 1688 * 1689 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1690 * case the CR2/GPA value pass on the stack is valid. 1691 * 1692 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility 1693 * state and inject single-step #DBs after skipping 1694 * an instruction (after completing userspace I/O). 1695 */ 1696 #define EMULTYPE_NO_DECODE (1 << 0) 1697 #define EMULTYPE_TRAP_UD (1 << 1) 1698 #define EMULTYPE_SKIP (1 << 2) 1699 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1700 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1701 #define EMULTYPE_VMWARE_GP (1 << 5) 1702 #define EMULTYPE_PF (1 << 6) 1703 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7) 1704 1705 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1706 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1707 void *insn, int insn_len); 1708 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, 1709 u64 *data, u8 ndata); 1710 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu); 1711 1712 void kvm_enable_efer_bits(u64); 1713 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1714 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1715 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1716 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1717 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1718 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1719 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu); 1720 int kvm_emulate_invd(struct kvm_vcpu *vcpu); 1721 int kvm_emulate_mwait(struct kvm_vcpu *vcpu); 1722 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu); 1723 int kvm_emulate_monitor(struct kvm_vcpu *vcpu); 1724 1725 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1726 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1727 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1728 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu); 1729 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu); 1730 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1731 1732 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1733 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1734 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1735 1736 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1737 int reason, bool has_error_code, u32 error_code); 1738 1739 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0); 1740 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4); 1741 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1742 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1743 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1744 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1745 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1746 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1747 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1748 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1749 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu); 1750 1751 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1752 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1753 1754 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1755 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1756 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu); 1757 1758 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1759 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1760 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1761 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1762 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1763 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1764 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1765 struct x86_exception *fault); 1766 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1767 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1768 1769 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1770 int irq_source_id, int level) 1771 { 1772 /* Logical OR for level trig interrupt */ 1773 if (level) 1774 __set_bit(irq_source_id, irq_state); 1775 else 1776 __clear_bit(irq_source_id, irq_state); 1777 1778 return !!(*irq_state); 1779 } 1780 1781 #define KVM_MMU_ROOT_CURRENT BIT(0) 1782 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1783 #define KVM_MMU_ROOTS_ALL (~0UL) 1784 1785 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1786 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1787 1788 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1789 1790 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1791 1792 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1793 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu, 1794 ulong roots_to_free); 1795 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu); 1796 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1797 struct x86_exception *exception); 1798 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1799 struct x86_exception *exception); 1800 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1801 struct x86_exception *exception); 1802 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1803 struct x86_exception *exception); 1804 1805 bool kvm_apicv_activated(struct kvm *kvm); 1806 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu); 1807 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1808 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm, 1809 enum kvm_apicv_inhibit reason, bool set); 1810 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm, 1811 enum kvm_apicv_inhibit reason, bool set); 1812 1813 static inline void kvm_set_apicv_inhibit(struct kvm *kvm, 1814 enum kvm_apicv_inhibit reason) 1815 { 1816 kvm_set_or_clear_apicv_inhibit(kvm, reason, true); 1817 } 1818 1819 static inline void kvm_clear_apicv_inhibit(struct kvm *kvm, 1820 enum kvm_apicv_inhibit reason) 1821 { 1822 kvm_set_or_clear_apicv_inhibit(kvm, reason, false); 1823 } 1824 1825 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1826 1827 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1828 void *insn, int insn_len); 1829 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1830 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1831 gva_t gva, hpa_t root_hpa); 1832 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1833 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd); 1834 1835 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level, 1836 int tdp_max_root_level, int tdp_huge_page_level); 1837 1838 static inline u16 kvm_read_ldt(void) 1839 { 1840 u16 ldt; 1841 asm("sldt %0" : "=g"(ldt)); 1842 return ldt; 1843 } 1844 1845 static inline void kvm_load_ldt(u16 sel) 1846 { 1847 asm("lldt %0" : : "rm"(sel)); 1848 } 1849 1850 #ifdef CONFIG_X86_64 1851 static inline unsigned long read_msr(unsigned long msr) 1852 { 1853 u64 value; 1854 1855 rdmsrl(msr, value); 1856 return value; 1857 } 1858 #endif 1859 1860 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1861 { 1862 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1863 } 1864 1865 #define TSS_IOPB_BASE_OFFSET 0x66 1866 #define TSS_BASE_SIZE 0x68 1867 #define TSS_IOPB_SIZE (65536 / 8) 1868 #define TSS_REDIRECTION_SIZE (256 / 8) 1869 #define RMODE_TSS_SIZE \ 1870 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1871 1872 enum { 1873 TASK_SWITCH_CALL = 0, 1874 TASK_SWITCH_IRET = 1, 1875 TASK_SWITCH_JMP = 2, 1876 TASK_SWITCH_GATE = 3, 1877 }; 1878 1879 #define HF_GIF_MASK (1 << 0) 1880 #define HF_NMI_MASK (1 << 3) 1881 #define HF_IRET_MASK (1 << 4) 1882 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1883 #define HF_SMM_MASK (1 << 6) 1884 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1885 1886 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1887 #define KVM_ADDRESS_SPACE_NUM 2 1888 1889 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1890 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1891 1892 #define KVM_ARCH_WANT_MMU_NOTIFIER 1893 1894 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1895 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1896 int kvm_cpu_has_extint(struct kvm_vcpu *v); 1897 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1898 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1899 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1900 1901 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1902 unsigned long ipi_bitmap_high, u32 min, 1903 unsigned long icr, int op_64_bit); 1904 1905 int kvm_add_user_return_msr(u32 msr); 1906 int kvm_find_user_return_msr(u32 msr); 1907 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1908 1909 static inline bool kvm_is_supported_user_return_msr(u32 msr) 1910 { 1911 return kvm_find_user_return_msr(msr) >= 0; 1912 } 1913 1914 u64 kvm_scale_tsc(u64 tsc, u64 ratio); 1915 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1916 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier); 1917 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier); 1918 1919 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1920 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1921 1922 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1923 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1924 unsigned long *vcpu_bitmap); 1925 1926 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1927 struct kvm_async_pf *work); 1928 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1929 struct kvm_async_pf *work); 1930 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1931 struct kvm_async_pf *work); 1932 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1933 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1934 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1935 1936 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1937 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1938 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1939 1940 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, 1941 u32 size); 1942 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1943 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1944 1945 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1946 struct kvm_vcpu **dest_vcpu); 1947 1948 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1949 struct kvm_lapic_irq *irq); 1950 1951 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1952 { 1953 /* We can only post Fixed and LowPrio IRQs */ 1954 return (irq->delivery_mode == APIC_DM_FIXED || 1955 irq->delivery_mode == APIC_DM_LOWEST); 1956 } 1957 1958 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1959 { 1960 static_call_cond(kvm_x86_vcpu_blocking)(vcpu); 1961 } 1962 1963 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1964 { 1965 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu); 1966 } 1967 1968 static inline int kvm_cpu_get_apicid(int mps_cpu) 1969 { 1970 #ifdef CONFIG_X86_LOCAL_APIC 1971 return default_cpu_present_to_apicid(mps_cpu); 1972 #else 1973 WARN_ON_ONCE(1); 1974 return BAD_APICID; 1975 #endif 1976 } 1977 1978 #define put_smstate(type, buf, offset, val) \ 1979 *(type *)((buf) + (offset) - 0x7e00) = val 1980 1981 #define GET_SMSTATE(type, buf, offset) \ 1982 (*(type *)((buf) + (offset) - 0x7e00)) 1983 1984 int kvm_cpu_dirty_log_size(void); 1985 1986 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages); 1987 1988 #define KVM_CLOCK_VALID_FLAGS \ 1989 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC) 1990 1991 #define KVM_X86_VALID_QUIRKS \ 1992 (KVM_X86_QUIRK_LINT0_REENABLED | \ 1993 KVM_X86_QUIRK_CD_NW_CLEARED | \ 1994 KVM_X86_QUIRK_LAPIC_MMIO_HOLE | \ 1995 KVM_X86_QUIRK_OUT_7E_INC_RIP | \ 1996 KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT | \ 1997 KVM_X86_QUIRK_FIX_HYPERCALL_INSN) 1998 1999 #endif /* _ASM_X86_KVM_HOST_H */ 2000