1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 21 #include <linux/kvm.h> 22 #include <linux/kvm_para.h> 23 #include <linux/kvm_types.h> 24 #include <linux/perf_event.h> 25 #include <linux/pvclock_gtod.h> 26 #include <linux/clocksource.h> 27 #include <linux/irqbypass.h> 28 #include <linux/hyperv.h> 29 30 #include <asm/apic.h> 31 #include <asm/pvclock-abi.h> 32 #include <asm/desc.h> 33 #include <asm/mtrr.h> 34 #include <asm/msr-index.h> 35 #include <asm/asm.h> 36 #include <asm/kvm_page_track.h> 37 #include <asm/hyperv-tlfs.h> 38 39 #define KVM_MAX_VCPUS 288 40 #define KVM_SOFT_MAX_VCPUS 240 41 #define KVM_MAX_VCPU_ID 1023 42 #define KVM_USER_MEM_SLOTS 509 43 /* memory slots that are not exposed to userspace */ 44 #define KVM_PRIVATE_MEM_SLOTS 3 45 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 46 47 #define KVM_HALT_POLL_NS_DEFAULT 200000 48 49 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 50 51 /* x86-specific vcpu->requests bit members */ 52 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 53 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 54 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 55 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 56 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 57 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 58 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 59 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 60 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 61 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 62 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 63 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 64 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 65 #define KVM_REQ_MCLOCK_INPROGRESS \ 66 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 67 #define KVM_REQ_SCAN_IOAPIC \ 68 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 69 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 70 #define KVM_REQ_APIC_PAGE_RELOAD \ 71 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 72 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 73 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 74 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 75 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 76 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 77 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 78 79 #define CR0_RESERVED_BITS \ 80 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 81 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 82 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 83 84 #define CR3_PCID_INVD BIT_64(63) 85 #define CR4_RESERVED_BITS \ 86 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 87 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 88 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 89 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 90 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 91 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 92 93 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 94 95 96 97 #define INVALID_PAGE (~(hpa_t)0) 98 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 99 100 #define UNMAPPED_GVA (~(gpa_t)0) 101 102 /* KVM Hugepage definitions for x86 */ 103 #define KVM_NR_PAGE_SIZES 3 104 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 105 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 106 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 107 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 108 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 109 110 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 111 { 112 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 113 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 114 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 115 } 116 117 #define KVM_PERMILLE_MMU_PAGES 20 118 #define KVM_MIN_ALLOC_MMU_PAGES 64 119 #define KVM_MMU_HASH_SHIFT 12 120 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 121 #define KVM_MIN_FREE_MMU_PAGES 5 122 #define KVM_REFILL_PAGES 25 123 #define KVM_MAX_CPUID_ENTRIES 80 124 #define KVM_NR_FIXED_MTRR_REGION 88 125 #define KVM_NR_VAR_MTRR 8 126 127 #define ASYNC_PF_PER_VCPU 64 128 129 enum kvm_reg { 130 VCPU_REGS_RAX = 0, 131 VCPU_REGS_RCX = 1, 132 VCPU_REGS_RDX = 2, 133 VCPU_REGS_RBX = 3, 134 VCPU_REGS_RSP = 4, 135 VCPU_REGS_RBP = 5, 136 VCPU_REGS_RSI = 6, 137 VCPU_REGS_RDI = 7, 138 #ifdef CONFIG_X86_64 139 VCPU_REGS_R8 = 8, 140 VCPU_REGS_R9 = 9, 141 VCPU_REGS_R10 = 10, 142 VCPU_REGS_R11 = 11, 143 VCPU_REGS_R12 = 12, 144 VCPU_REGS_R13 = 13, 145 VCPU_REGS_R14 = 14, 146 VCPU_REGS_R15 = 15, 147 #endif 148 VCPU_REGS_RIP, 149 NR_VCPU_REGS 150 }; 151 152 enum kvm_reg_ex { 153 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 154 VCPU_EXREG_CR3, 155 VCPU_EXREG_RFLAGS, 156 VCPU_EXREG_SEGMENTS, 157 }; 158 159 enum { 160 VCPU_SREG_ES, 161 VCPU_SREG_CS, 162 VCPU_SREG_SS, 163 VCPU_SREG_DS, 164 VCPU_SREG_FS, 165 VCPU_SREG_GS, 166 VCPU_SREG_TR, 167 VCPU_SREG_LDTR, 168 }; 169 170 #include <asm/kvm_emulate.h> 171 172 #define KVM_NR_MEM_OBJS 40 173 174 #define KVM_NR_DB_REGS 4 175 176 #define DR6_BD (1 << 13) 177 #define DR6_BS (1 << 14) 178 #define DR6_RTM (1 << 16) 179 #define DR6_FIXED_1 0xfffe0ff0 180 #define DR6_INIT 0xffff0ff0 181 #define DR6_VOLATILE 0x0001e00f 182 183 #define DR7_BP_EN_MASK 0x000000ff 184 #define DR7_GE (1 << 9) 185 #define DR7_GD (1 << 13) 186 #define DR7_FIXED_1 0x00000400 187 #define DR7_VOLATILE 0xffff2bff 188 189 #define PFERR_PRESENT_BIT 0 190 #define PFERR_WRITE_BIT 1 191 #define PFERR_USER_BIT 2 192 #define PFERR_RSVD_BIT 3 193 #define PFERR_FETCH_BIT 4 194 #define PFERR_PK_BIT 5 195 #define PFERR_GUEST_FINAL_BIT 32 196 #define PFERR_GUEST_PAGE_BIT 33 197 198 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 199 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 200 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 201 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 202 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 203 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 204 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 205 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 206 207 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 208 PFERR_WRITE_MASK | \ 209 PFERR_PRESENT_MASK) 210 211 /* 212 * The mask used to denote special SPTEs, which can be either MMIO SPTEs or 213 * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting 214 * with the SVE bit in EPT PTEs. 215 */ 216 #define SPTE_SPECIAL_MASK (1ULL << 62) 217 218 /* apic attention bits */ 219 #define KVM_APIC_CHECK_VAPIC 0 220 /* 221 * The following bit is set with PV-EOI, unset on EOI. 222 * We detect PV-EOI changes by guest by comparing 223 * this bit with PV-EOI in guest memory. 224 * See the implementation in apic_update_pv_eoi. 225 */ 226 #define KVM_APIC_PV_EOI_PENDING 1 227 228 struct kvm_kernel_irq_routing_entry; 229 230 /* 231 * We don't want allocation failures within the mmu code, so we preallocate 232 * enough memory for a single page fault in a cache. 233 */ 234 struct kvm_mmu_memory_cache { 235 int nobjs; 236 void *objects[KVM_NR_MEM_OBJS]; 237 }; 238 239 /* 240 * the pages used as guest page table on soft mmu are tracked by 241 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 242 * by indirect shadow page can not be more than 15 bits. 243 * 244 * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access, 245 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 246 */ 247 union kvm_mmu_page_role { 248 unsigned word; 249 struct { 250 unsigned level:4; 251 unsigned cr4_pae:1; 252 unsigned quadrant:2; 253 unsigned direct:1; 254 unsigned access:3; 255 unsigned invalid:1; 256 unsigned nxe:1; 257 unsigned cr0_wp:1; 258 unsigned smep_andnot_wp:1; 259 unsigned smap_andnot_wp:1; 260 unsigned ad_disabled:1; 261 unsigned :7; 262 263 /* 264 * This is left at the top of the word so that 265 * kvm_memslots_for_spte_role can extract it with a 266 * simple shift. While there is room, give it a whole 267 * byte so it is also faster to load it from memory. 268 */ 269 unsigned smm:8; 270 }; 271 }; 272 273 struct kvm_rmap_head { 274 unsigned long val; 275 }; 276 277 struct kvm_mmu_page { 278 struct list_head link; 279 struct hlist_node hash_link; 280 281 /* 282 * The following two entries are used to key the shadow page in the 283 * hash table. 284 */ 285 gfn_t gfn; 286 union kvm_mmu_page_role role; 287 288 u64 *spt; 289 /* hold the gfn of each spte inside spt */ 290 gfn_t *gfns; 291 bool unsync; 292 int root_count; /* Currently serving as active root */ 293 unsigned int unsync_children; 294 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 295 296 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 297 unsigned long mmu_valid_gen; 298 299 DECLARE_BITMAP(unsync_child_bitmap, 512); 300 301 #ifdef CONFIG_X86_32 302 /* 303 * Used out of the mmu-lock to avoid reading spte values while an 304 * update is in progress; see the comments in __get_spte_lockless(). 305 */ 306 int clear_spte_count; 307 #endif 308 309 /* Number of writes since the last time traversal visited this page. */ 310 atomic_t write_flooding_count; 311 }; 312 313 struct kvm_pio_request { 314 unsigned long count; 315 int in; 316 int port; 317 int size; 318 }; 319 320 #define PT64_ROOT_MAX_LEVEL 5 321 322 struct rsvd_bits_validate { 323 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 324 u64 bad_mt_xwr; 325 }; 326 327 /* 328 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 329 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 330 * current mmu mode. 331 */ 332 struct kvm_mmu { 333 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 334 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 335 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 336 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 337 bool prefault); 338 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 339 struct x86_exception *fault); 340 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 341 struct x86_exception *exception); 342 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 343 struct x86_exception *exception); 344 int (*sync_page)(struct kvm_vcpu *vcpu, 345 struct kvm_mmu_page *sp); 346 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 347 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 348 u64 *spte, const void *pte); 349 hpa_t root_hpa; 350 union kvm_mmu_page_role base_role; 351 u8 root_level; 352 u8 shadow_root_level; 353 u8 ept_ad; 354 bool direct_map; 355 356 /* 357 * Bitmap; bit set = permission fault 358 * Byte index: page fault error code [4:1] 359 * Bit index: pte permissions in ACC_* format 360 */ 361 u8 permissions[16]; 362 363 /* 364 * The pkru_mask indicates if protection key checks are needed. It 365 * consists of 16 domains indexed by page fault error code bits [4:1], 366 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 367 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 368 */ 369 u32 pkru_mask; 370 371 u64 *pae_root; 372 u64 *lm_root; 373 374 /* 375 * check zero bits on shadow page table entries, these 376 * bits include not only hardware reserved bits but also 377 * the bits spte never used. 378 */ 379 struct rsvd_bits_validate shadow_zero_check; 380 381 struct rsvd_bits_validate guest_rsvd_check; 382 383 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 384 u8 last_nonleaf_level; 385 386 bool nx; 387 388 u64 pdptrs[4]; /* pae */ 389 }; 390 391 enum pmc_type { 392 KVM_PMC_GP = 0, 393 KVM_PMC_FIXED, 394 }; 395 396 struct kvm_pmc { 397 enum pmc_type type; 398 u8 idx; 399 u64 counter; 400 u64 eventsel; 401 struct perf_event *perf_event; 402 struct kvm_vcpu *vcpu; 403 }; 404 405 struct kvm_pmu { 406 unsigned nr_arch_gp_counters; 407 unsigned nr_arch_fixed_counters; 408 unsigned available_event_types; 409 u64 fixed_ctr_ctrl; 410 u64 global_ctrl; 411 u64 global_status; 412 u64 global_ovf_ctrl; 413 u64 counter_bitmask[2]; 414 u64 global_ctrl_mask; 415 u64 reserved_bits; 416 u8 version; 417 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 418 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 419 struct irq_work irq_work; 420 u64 reprogram_pmi; 421 }; 422 423 struct kvm_pmu_ops; 424 425 enum { 426 KVM_DEBUGREG_BP_ENABLED = 1, 427 KVM_DEBUGREG_WONT_EXIT = 2, 428 KVM_DEBUGREG_RELOAD = 4, 429 }; 430 431 struct kvm_mtrr_range { 432 u64 base; 433 u64 mask; 434 struct list_head node; 435 }; 436 437 struct kvm_mtrr { 438 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 439 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 440 u64 deftype; 441 442 struct list_head head; 443 }; 444 445 /* Hyper-V SynIC timer */ 446 struct kvm_vcpu_hv_stimer { 447 struct hrtimer timer; 448 int index; 449 u64 config; 450 u64 count; 451 u64 exp_time; 452 struct hv_message msg; 453 bool msg_pending; 454 }; 455 456 /* Hyper-V synthetic interrupt controller (SynIC)*/ 457 struct kvm_vcpu_hv_synic { 458 u64 version; 459 u64 control; 460 u64 msg_page; 461 u64 evt_page; 462 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 463 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 464 DECLARE_BITMAP(auto_eoi_bitmap, 256); 465 DECLARE_BITMAP(vec_bitmap, 256); 466 bool active; 467 bool dont_zero_synic_pages; 468 }; 469 470 /* Hyper-V per vcpu emulation context */ 471 struct kvm_vcpu_hv { 472 u32 vp_index; 473 u64 hv_vapic; 474 s64 runtime_offset; 475 struct kvm_vcpu_hv_synic synic; 476 struct kvm_hyperv_exit exit; 477 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 478 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 479 }; 480 481 struct kvm_vcpu_arch { 482 /* 483 * rip and regs accesses must go through 484 * kvm_{register,rip}_{read,write} functions. 485 */ 486 unsigned long regs[NR_VCPU_REGS]; 487 u32 regs_avail; 488 u32 regs_dirty; 489 490 unsigned long cr0; 491 unsigned long cr0_guest_owned_bits; 492 unsigned long cr2; 493 unsigned long cr3; 494 unsigned long cr4; 495 unsigned long cr4_guest_owned_bits; 496 unsigned long cr8; 497 u32 pkru; 498 u32 hflags; 499 u64 efer; 500 u64 apic_base; 501 struct kvm_lapic *apic; /* kernel irqchip context */ 502 bool apicv_active; 503 bool load_eoi_exitmap_pending; 504 DECLARE_BITMAP(ioapic_handled_vectors, 256); 505 unsigned long apic_attention; 506 int32_t apic_arb_prio; 507 int mp_state; 508 u64 ia32_misc_enable_msr; 509 u64 smbase; 510 u64 smi_count; 511 bool tpr_access_reporting; 512 u64 ia32_xss; 513 u64 microcode_version; 514 515 /* 516 * Paging state of the vcpu 517 * 518 * If the vcpu runs in guest mode with two level paging this still saves 519 * the paging mode of the l1 guest. This context is always used to 520 * handle faults. 521 */ 522 struct kvm_mmu mmu; 523 524 /* 525 * Paging state of an L2 guest (used for nested npt) 526 * 527 * This context will save all necessary information to walk page tables 528 * of the an L2 guest. This context is only initialized for page table 529 * walking and not for faulting since we never handle l2 page faults on 530 * the host. 531 */ 532 struct kvm_mmu nested_mmu; 533 534 /* 535 * Pointer to the mmu context currently used for 536 * gva_to_gpa translations. 537 */ 538 struct kvm_mmu *walk_mmu; 539 540 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 541 struct kvm_mmu_memory_cache mmu_page_cache; 542 struct kvm_mmu_memory_cache mmu_page_header_cache; 543 544 /* 545 * QEMU userspace and the guest each have their own FPU state. 546 * In vcpu_run, we switch between the user and guest FPU contexts. 547 * While running a VCPU, the VCPU thread will have the guest FPU 548 * context. 549 * 550 * Note that while the PKRU state lives inside the fpu registers, 551 * it is switched out separately at VMENTER and VMEXIT time. The 552 * "guest_fpu" state here contains the guest FPU context, with the 553 * host PRKU bits. 554 */ 555 struct fpu user_fpu; 556 struct fpu guest_fpu; 557 558 u64 xcr0; 559 u64 guest_supported_xcr0; 560 u32 guest_xstate_size; 561 562 struct kvm_pio_request pio; 563 void *pio_data; 564 565 u8 event_exit_inst_len; 566 567 struct kvm_queued_exception { 568 bool pending; 569 bool injected; 570 bool has_error_code; 571 u8 nr; 572 u32 error_code; 573 u8 nested_apf; 574 } exception; 575 576 struct kvm_queued_interrupt { 577 bool injected; 578 bool soft; 579 u8 nr; 580 } interrupt; 581 582 int halt_request; /* real mode on Intel only */ 583 584 int cpuid_nent; 585 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 586 587 int maxphyaddr; 588 589 /* emulate context */ 590 591 struct x86_emulate_ctxt emulate_ctxt; 592 bool emulate_regs_need_sync_to_vcpu; 593 bool emulate_regs_need_sync_from_vcpu; 594 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 595 596 gpa_t time; 597 struct pvclock_vcpu_time_info hv_clock; 598 unsigned int hw_tsc_khz; 599 struct gfn_to_hva_cache pv_time; 600 bool pv_time_enabled; 601 /* set guest stopped flag in pvclock flags field */ 602 bool pvclock_set_guest_stopped_request; 603 604 struct { 605 u64 msr_val; 606 u64 last_steal; 607 struct gfn_to_hva_cache stime; 608 struct kvm_steal_time steal; 609 } st; 610 611 u64 tsc_offset; 612 u64 last_guest_tsc; 613 u64 last_host_tsc; 614 u64 tsc_offset_adjustment; 615 u64 this_tsc_nsec; 616 u64 this_tsc_write; 617 u64 this_tsc_generation; 618 bool tsc_catchup; 619 bool tsc_always_catchup; 620 s8 virtual_tsc_shift; 621 u32 virtual_tsc_mult; 622 u32 virtual_tsc_khz; 623 s64 ia32_tsc_adjust_msr; 624 u64 tsc_scaling_ratio; 625 626 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 627 unsigned nmi_pending; /* NMI queued after currently running handler */ 628 bool nmi_injected; /* Trying to inject an NMI this entry */ 629 bool smi_pending; /* SMI queued after currently running handler */ 630 631 struct kvm_mtrr mtrr_state; 632 u64 pat; 633 634 unsigned switch_db_regs; 635 unsigned long db[KVM_NR_DB_REGS]; 636 unsigned long dr6; 637 unsigned long dr7; 638 unsigned long eff_db[KVM_NR_DB_REGS]; 639 unsigned long guest_debug_dr7; 640 u64 msr_platform_info; 641 u64 msr_misc_features_enables; 642 643 u64 mcg_cap; 644 u64 mcg_status; 645 u64 mcg_ctl; 646 u64 mcg_ext_ctl; 647 u64 *mce_banks; 648 649 /* Cache MMIO info */ 650 u64 mmio_gva; 651 unsigned access; 652 gfn_t mmio_gfn; 653 u64 mmio_gen; 654 655 struct kvm_pmu pmu; 656 657 /* used for guest single stepping over the given code position */ 658 unsigned long singlestep_rip; 659 660 struct kvm_vcpu_hv hyperv; 661 662 cpumask_var_t wbinvd_dirty_mask; 663 664 unsigned long last_retry_eip; 665 unsigned long last_retry_addr; 666 667 struct { 668 bool halted; 669 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 670 struct gfn_to_hva_cache data; 671 u64 msr_val; 672 u32 id; 673 bool send_user_only; 674 u32 host_apf_reason; 675 unsigned long nested_apf_token; 676 bool delivery_as_pf_vmexit; 677 } apf; 678 679 /* OSVW MSRs (AMD only) */ 680 struct { 681 u64 length; 682 u64 status; 683 } osvw; 684 685 struct { 686 u64 msr_val; 687 struct gfn_to_hva_cache data; 688 } pv_eoi; 689 690 /* 691 * Indicate whether the access faults on its page table in guest 692 * which is set when fix page fault and used to detect unhandeable 693 * instruction. 694 */ 695 bool write_fault_to_shadow_pgtable; 696 697 /* set at EPT violation at this point */ 698 unsigned long exit_qualification; 699 700 /* pv related host specific info */ 701 struct { 702 bool pv_unhalted; 703 } pv; 704 705 int pending_ioapic_eoi; 706 int pending_external_vector; 707 708 /* GPA available */ 709 bool gpa_available; 710 gpa_t gpa_val; 711 712 /* be preempted when it's in kernel-mode(cpl=0) */ 713 bool preempted_in_kernel; 714 }; 715 716 struct kvm_lpage_info { 717 int disallow_lpage; 718 }; 719 720 struct kvm_arch_memory_slot { 721 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 722 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 723 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 724 }; 725 726 /* 727 * We use as the mode the number of bits allocated in the LDR for the 728 * logical processor ID. It happens that these are all powers of two. 729 * This makes it is very easy to detect cases where the APICs are 730 * configured for multiple modes; in that case, we cannot use the map and 731 * hence cannot use kvm_irq_delivery_to_apic_fast either. 732 */ 733 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 734 #define KVM_APIC_MODE_XAPIC_FLAT 8 735 #define KVM_APIC_MODE_X2APIC 16 736 737 struct kvm_apic_map { 738 struct rcu_head rcu; 739 u8 mode; 740 u32 max_apic_id; 741 union { 742 struct kvm_lapic *xapic_flat_map[8]; 743 struct kvm_lapic *xapic_cluster_map[16][4]; 744 }; 745 struct kvm_lapic *phys_map[]; 746 }; 747 748 /* Hyper-V emulation context */ 749 struct kvm_hv { 750 struct mutex hv_lock; 751 u64 hv_guest_os_id; 752 u64 hv_hypercall; 753 u64 hv_tsc_page; 754 755 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 756 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 757 u64 hv_crash_ctl; 758 759 HV_REFERENCE_TSC_PAGE tsc_ref; 760 761 struct idr conn_to_evt; 762 763 u64 hv_reenlightenment_control; 764 u64 hv_tsc_emulation_control; 765 u64 hv_tsc_emulation_status; 766 }; 767 768 enum kvm_irqchip_mode { 769 KVM_IRQCHIP_NONE, 770 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 771 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 772 }; 773 774 struct kvm_arch { 775 unsigned int n_used_mmu_pages; 776 unsigned int n_requested_mmu_pages; 777 unsigned int n_max_mmu_pages; 778 unsigned int indirect_shadow_pages; 779 unsigned long mmu_valid_gen; 780 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 781 /* 782 * Hash table of struct kvm_mmu_page. 783 */ 784 struct list_head active_mmu_pages; 785 struct list_head zapped_obsolete_pages; 786 struct kvm_page_track_notifier_node mmu_sp_tracker; 787 struct kvm_page_track_notifier_head track_notifier_head; 788 789 struct list_head assigned_dev_head; 790 struct iommu_domain *iommu_domain; 791 bool iommu_noncoherent; 792 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 793 atomic_t noncoherent_dma_count; 794 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 795 atomic_t assigned_device_count; 796 struct kvm_pic *vpic; 797 struct kvm_ioapic *vioapic; 798 struct kvm_pit *vpit; 799 atomic_t vapics_in_nmi_mode; 800 struct mutex apic_map_lock; 801 struct kvm_apic_map *apic_map; 802 803 bool apic_access_page_done; 804 805 gpa_t wall_clock; 806 807 bool mwait_in_guest; 808 bool hlt_in_guest; 809 bool pause_in_guest; 810 811 unsigned long irq_sources_bitmap; 812 s64 kvmclock_offset; 813 raw_spinlock_t tsc_write_lock; 814 u64 last_tsc_nsec; 815 u64 last_tsc_write; 816 u32 last_tsc_khz; 817 u64 cur_tsc_nsec; 818 u64 cur_tsc_write; 819 u64 cur_tsc_offset; 820 u64 cur_tsc_generation; 821 int nr_vcpus_matched_tsc; 822 823 spinlock_t pvclock_gtod_sync_lock; 824 bool use_master_clock; 825 u64 master_kernel_ns; 826 u64 master_cycle_now; 827 struct delayed_work kvmclock_update_work; 828 struct delayed_work kvmclock_sync_work; 829 830 struct kvm_xen_hvm_config xen_hvm_config; 831 832 /* reads protected by irq_srcu, writes by irq_lock */ 833 struct hlist_head mask_notifier_list; 834 835 struct kvm_hv hyperv; 836 837 #ifdef CONFIG_KVM_MMU_AUDIT 838 int audit_point; 839 #endif 840 841 bool backwards_tsc_observed; 842 bool boot_vcpu_runs_old_kvmclock; 843 u32 bsp_vcpu_id; 844 845 u64 disabled_quirks; 846 847 enum kvm_irqchip_mode irqchip_mode; 848 u8 nr_reserved_ioapic_pins; 849 850 bool disabled_lapic_found; 851 852 bool x2apic_format; 853 bool x2apic_broadcast_quirk_disabled; 854 }; 855 856 struct kvm_vm_stat { 857 ulong mmu_shadow_zapped; 858 ulong mmu_pte_write; 859 ulong mmu_pte_updated; 860 ulong mmu_pde_zapped; 861 ulong mmu_flooded; 862 ulong mmu_recycled; 863 ulong mmu_cache_miss; 864 ulong mmu_unsync; 865 ulong remote_tlb_flush; 866 ulong lpages; 867 ulong max_mmu_page_hash_collisions; 868 }; 869 870 struct kvm_vcpu_stat { 871 u64 pf_fixed; 872 u64 pf_guest; 873 u64 tlb_flush; 874 u64 invlpg; 875 876 u64 exits; 877 u64 io_exits; 878 u64 mmio_exits; 879 u64 signal_exits; 880 u64 irq_window_exits; 881 u64 nmi_window_exits; 882 u64 halt_exits; 883 u64 halt_successful_poll; 884 u64 halt_attempted_poll; 885 u64 halt_poll_invalid; 886 u64 halt_wakeup; 887 u64 request_irq_exits; 888 u64 irq_exits; 889 u64 host_state_reload; 890 u64 fpu_reload; 891 u64 insn_emulation; 892 u64 insn_emulation_fail; 893 u64 hypercalls; 894 u64 irq_injections; 895 u64 nmi_injections; 896 u64 req_event; 897 }; 898 899 struct x86_instruction_info; 900 901 struct msr_data { 902 bool host_initiated; 903 u32 index; 904 u64 data; 905 }; 906 907 struct kvm_lapic_irq { 908 u32 vector; 909 u16 delivery_mode; 910 u16 dest_mode; 911 bool level; 912 u16 trig_mode; 913 u32 shorthand; 914 u32 dest_id; 915 bool msi_redir_hint; 916 }; 917 918 struct kvm_x86_ops { 919 int (*cpu_has_kvm_support)(void); /* __init */ 920 int (*disabled_by_bios)(void); /* __init */ 921 int (*hardware_enable)(void); 922 void (*hardware_disable)(void); 923 void (*check_processor_compatibility)(void *rtn); 924 int (*hardware_setup)(void); /* __init */ 925 void (*hardware_unsetup)(void); /* __exit */ 926 bool (*cpu_has_accelerated_tpr)(void); 927 bool (*cpu_has_high_real_mode_segbase)(void); 928 void (*cpuid_update)(struct kvm_vcpu *vcpu); 929 930 struct kvm *(*vm_alloc)(void); 931 void (*vm_free)(struct kvm *); 932 int (*vm_init)(struct kvm *kvm); 933 void (*vm_destroy)(struct kvm *kvm); 934 935 /* Create, but do not attach this VCPU */ 936 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 937 void (*vcpu_free)(struct kvm_vcpu *vcpu); 938 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 939 940 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 941 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 942 void (*vcpu_put)(struct kvm_vcpu *vcpu); 943 944 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 945 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 946 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 947 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 948 void (*get_segment)(struct kvm_vcpu *vcpu, 949 struct kvm_segment *var, int seg); 950 int (*get_cpl)(struct kvm_vcpu *vcpu); 951 void (*set_segment)(struct kvm_vcpu *vcpu, 952 struct kvm_segment *var, int seg); 953 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 954 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 955 void (*decache_cr3)(struct kvm_vcpu *vcpu); 956 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 957 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 958 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 959 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 960 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 961 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 962 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 963 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 964 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 965 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 966 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 967 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 968 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 969 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 970 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 971 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 972 973 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa); 974 975 void (*run)(struct kvm_vcpu *vcpu); 976 int (*handle_exit)(struct kvm_vcpu *vcpu); 977 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 978 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 979 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 980 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 981 unsigned char *hypercall_addr); 982 void (*set_irq)(struct kvm_vcpu *vcpu); 983 void (*set_nmi)(struct kvm_vcpu *vcpu); 984 void (*queue_exception)(struct kvm_vcpu *vcpu); 985 void (*cancel_injection)(struct kvm_vcpu *vcpu); 986 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 987 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 988 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 989 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 990 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 991 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 992 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 993 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu); 994 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 995 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 996 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 997 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 998 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set); 999 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 1000 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1001 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1002 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1003 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1004 int (*get_tdp_level)(struct kvm_vcpu *vcpu); 1005 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1006 int (*get_lpage_level)(void); 1007 bool (*rdtscp_supported)(void); 1008 bool (*invpcid_supported)(void); 1009 1010 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1011 1012 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 1013 1014 bool (*has_wbinvd_exit)(void); 1015 1016 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1017 1018 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 1019 1020 int (*check_intercept)(struct kvm_vcpu *vcpu, 1021 struct x86_instruction_info *info, 1022 enum x86_intercept_stage stage); 1023 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 1024 bool (*mpx_supported)(void); 1025 bool (*xsaves_supported)(void); 1026 bool (*umip_emulated)(void); 1027 1028 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 1029 1030 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1031 1032 /* 1033 * Arch-specific dirty logging hooks. These hooks are only supposed to 1034 * be valid if the specific arch has hardware-accelerated dirty logging 1035 * mechanism. Currently only for PML on VMX. 1036 * 1037 * - slot_enable_log_dirty: 1038 * called when enabling log dirty mode for the slot. 1039 * - slot_disable_log_dirty: 1040 * called when disabling log dirty mode for the slot. 1041 * also called when slot is created with log dirty disabled. 1042 * - flush_log_dirty: 1043 * called before reporting dirty_bitmap to userspace. 1044 * - enable_log_dirty_pt_masked: 1045 * called when reenabling log dirty for the GFNs in the mask after 1046 * corresponding bits are cleared in slot->dirty_bitmap. 1047 */ 1048 void (*slot_enable_log_dirty)(struct kvm *kvm, 1049 struct kvm_memory_slot *slot); 1050 void (*slot_disable_log_dirty)(struct kvm *kvm, 1051 struct kvm_memory_slot *slot); 1052 void (*flush_log_dirty)(struct kvm *kvm); 1053 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1054 struct kvm_memory_slot *slot, 1055 gfn_t offset, unsigned long mask); 1056 int (*write_log_dirty)(struct kvm_vcpu *vcpu); 1057 1058 /* pmu operations of sub-arch */ 1059 const struct kvm_pmu_ops *pmu_ops; 1060 1061 /* 1062 * Architecture specific hooks for vCPU blocking due to 1063 * HLT instruction. 1064 * Returns for .pre_block(): 1065 * - 0 means continue to block the vCPU. 1066 * - 1 means we cannot block the vCPU since some event 1067 * happens during this period, such as, 'ON' bit in 1068 * posted-interrupts descriptor is set. 1069 */ 1070 int (*pre_block)(struct kvm_vcpu *vcpu); 1071 void (*post_block)(struct kvm_vcpu *vcpu); 1072 1073 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1074 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1075 1076 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1077 uint32_t guest_irq, bool set); 1078 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1079 1080 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc); 1081 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1082 1083 void (*setup_mce)(struct kvm_vcpu *vcpu); 1084 1085 int (*smi_allowed)(struct kvm_vcpu *vcpu); 1086 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1087 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, u64 smbase); 1088 int (*enable_smi_window)(struct kvm_vcpu *vcpu); 1089 1090 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1091 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1092 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1093 1094 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1095 }; 1096 1097 struct kvm_arch_async_pf { 1098 u32 token; 1099 gfn_t gfn; 1100 unsigned long cr3; 1101 bool direct_map; 1102 }; 1103 1104 extern struct kvm_x86_ops *kvm_x86_ops; 1105 1106 #define __KVM_HAVE_ARCH_VM_ALLOC 1107 static inline struct kvm *kvm_arch_alloc_vm(void) 1108 { 1109 return kvm_x86_ops->vm_alloc(); 1110 } 1111 1112 static inline void kvm_arch_free_vm(struct kvm *kvm) 1113 { 1114 return kvm_x86_ops->vm_free(kvm); 1115 } 1116 1117 int kvm_mmu_module_init(void); 1118 void kvm_mmu_module_exit(void); 1119 1120 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1121 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1122 void kvm_mmu_setup(struct kvm_vcpu *vcpu); 1123 void kvm_mmu_init_vm(struct kvm *kvm); 1124 void kvm_mmu_uninit_vm(struct kvm *kvm); 1125 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1126 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1127 u64 acc_track_mask, u64 me_mask); 1128 1129 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1130 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1131 struct kvm_memory_slot *memslot); 1132 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1133 const struct kvm_memory_slot *memslot); 1134 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1135 struct kvm_memory_slot *memslot); 1136 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1137 struct kvm_memory_slot *memslot); 1138 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1139 struct kvm_memory_slot *memslot); 1140 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1141 struct kvm_memory_slot *slot, 1142 gfn_t gfn_offset, unsigned long mask); 1143 void kvm_mmu_zap_all(struct kvm *kvm); 1144 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots); 1145 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 1146 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 1147 1148 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1149 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1150 1151 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1152 const void *val, int bytes); 1153 1154 struct kvm_irq_mask_notifier { 1155 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1156 int irq; 1157 struct hlist_node link; 1158 }; 1159 1160 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1161 struct kvm_irq_mask_notifier *kimn); 1162 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1163 struct kvm_irq_mask_notifier *kimn); 1164 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1165 bool mask); 1166 1167 extern bool tdp_enabled; 1168 1169 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1170 1171 /* control of guest tsc rate supported? */ 1172 extern bool kvm_has_tsc_control; 1173 /* maximum supported tsc_khz for guests */ 1174 extern u32 kvm_max_guest_tsc_khz; 1175 /* number of bits of the fractional part of the TSC scaling ratio */ 1176 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1177 /* maximum allowed value of TSC scaling ratio */ 1178 extern u64 kvm_max_tsc_scaling_ratio; 1179 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1180 extern u64 kvm_default_tsc_scaling_ratio; 1181 1182 extern u64 kvm_mce_cap_supported; 1183 1184 enum emulation_result { 1185 EMULATE_DONE, /* no further processing */ 1186 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 1187 EMULATE_FAIL, /* can't emulate this instruction */ 1188 }; 1189 1190 #define EMULTYPE_NO_DECODE (1 << 0) 1191 #define EMULTYPE_TRAP_UD (1 << 1) 1192 #define EMULTYPE_SKIP (1 << 2) 1193 #define EMULTYPE_RETRY (1 << 3) 1194 #define EMULTYPE_NO_REEXECUTE (1 << 4) 1195 #define EMULTYPE_NO_UD_ON_FAIL (1 << 5) 1196 #define EMULTYPE_VMWARE (1 << 6) 1197 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 1198 int emulation_type, void *insn, int insn_len); 1199 1200 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 1201 int emulation_type) 1202 { 1203 return x86_emulate_instruction(vcpu, 0, 1204 emulation_type | EMULTYPE_NO_REEXECUTE, NULL, 0); 1205 } 1206 1207 void kvm_enable_efer_bits(u64); 1208 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1209 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1210 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1211 1212 struct x86_emulate_ctxt; 1213 1214 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1215 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1216 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1217 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1218 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1219 1220 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1221 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1222 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1223 1224 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1225 int reason, bool has_error_code, u32 error_code); 1226 1227 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1228 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1229 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1230 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1231 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1232 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1233 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1234 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1235 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1236 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1237 1238 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1239 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1240 1241 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1242 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1243 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1244 1245 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1246 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1247 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1248 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1249 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1250 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1251 gfn_t gfn, void *data, int offset, int len, 1252 u32 access); 1253 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1254 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1255 1256 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1257 int irq_source_id, int level) 1258 { 1259 /* Logical OR for level trig interrupt */ 1260 if (level) 1261 __set_bit(irq_source_id, irq_state); 1262 else 1263 __clear_bit(irq_source_id, irq_state); 1264 1265 return !!(*irq_state); 1266 } 1267 1268 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1269 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1270 1271 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1272 1273 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1274 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1275 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1276 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1277 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1278 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1279 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1280 struct x86_exception *exception); 1281 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1282 struct x86_exception *exception); 1283 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1284 struct x86_exception *exception); 1285 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1286 struct x86_exception *exception); 1287 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1288 struct x86_exception *exception); 1289 1290 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu); 1291 1292 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1293 1294 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code, 1295 void *insn, int insn_len); 1296 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1297 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu); 1298 1299 void kvm_enable_tdp(void); 1300 void kvm_disable_tdp(void); 1301 1302 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1303 struct x86_exception *exception) 1304 { 1305 return gpa; 1306 } 1307 1308 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1309 { 1310 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1311 1312 return (struct kvm_mmu_page *)page_private(page); 1313 } 1314 1315 static inline u16 kvm_read_ldt(void) 1316 { 1317 u16 ldt; 1318 asm("sldt %0" : "=g"(ldt)); 1319 return ldt; 1320 } 1321 1322 static inline void kvm_load_ldt(u16 sel) 1323 { 1324 asm("lldt %0" : : "rm"(sel)); 1325 } 1326 1327 #ifdef CONFIG_X86_64 1328 static inline unsigned long read_msr(unsigned long msr) 1329 { 1330 u64 value; 1331 1332 rdmsrl(msr, value); 1333 return value; 1334 } 1335 #endif 1336 1337 static inline u32 get_rdx_init_val(void) 1338 { 1339 return 0x600; /* P6 family */ 1340 } 1341 1342 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1343 { 1344 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1345 } 1346 1347 #define TSS_IOPB_BASE_OFFSET 0x66 1348 #define TSS_BASE_SIZE 0x68 1349 #define TSS_IOPB_SIZE (65536 / 8) 1350 #define TSS_REDIRECTION_SIZE (256 / 8) 1351 #define RMODE_TSS_SIZE \ 1352 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1353 1354 enum { 1355 TASK_SWITCH_CALL = 0, 1356 TASK_SWITCH_IRET = 1, 1357 TASK_SWITCH_JMP = 2, 1358 TASK_SWITCH_GATE = 3, 1359 }; 1360 1361 #define HF_GIF_MASK (1 << 0) 1362 #define HF_HIF_MASK (1 << 1) 1363 #define HF_VINTR_MASK (1 << 2) 1364 #define HF_NMI_MASK (1 << 3) 1365 #define HF_IRET_MASK (1 << 4) 1366 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1367 #define HF_SMM_MASK (1 << 6) 1368 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1369 1370 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1371 #define KVM_ADDRESS_SPACE_NUM 2 1372 1373 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1374 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1375 1376 /* 1377 * Hardware virtualization extension instructions may fault if a 1378 * reboot turns off virtualization while processes are running. 1379 * Trap the fault and ignore the instruction if that happens. 1380 */ 1381 asmlinkage void kvm_spurious_fault(void); 1382 1383 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1384 "666: " insn "\n\t" \ 1385 "668: \n\t" \ 1386 ".pushsection .fixup, \"ax\" \n" \ 1387 "667: \n\t" \ 1388 cleanup_insn "\n\t" \ 1389 "cmpb $0, kvm_rebooting \n\t" \ 1390 "jne 668b \n\t" \ 1391 __ASM_SIZE(push) " $666b \n\t" \ 1392 "call kvm_spurious_fault \n\t" \ 1393 ".popsection \n\t" \ 1394 _ASM_EXTABLE(666b, 667b) 1395 1396 #define __kvm_handle_fault_on_reboot(insn) \ 1397 ____kvm_handle_fault_on_reboot(insn, "") 1398 1399 #define KVM_ARCH_WANT_MMU_NOTIFIER 1400 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1401 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1402 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1403 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1404 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1405 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1406 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1407 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1408 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1409 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1410 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1411 1412 void kvm_define_shared_msr(unsigned index, u32 msr); 1413 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1414 1415 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1416 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1417 1418 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1419 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1420 1421 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1422 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1423 1424 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1425 struct kvm_async_pf *work); 1426 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1427 struct kvm_async_pf *work); 1428 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1429 struct kvm_async_pf *work); 1430 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1431 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1432 1433 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1434 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1435 1436 int kvm_is_in_guest(void); 1437 1438 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1439 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1440 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1441 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1442 1443 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1444 struct kvm_vcpu **dest_vcpu); 1445 1446 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1447 struct kvm_lapic_irq *irq); 1448 1449 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1450 { 1451 if (kvm_x86_ops->vcpu_blocking) 1452 kvm_x86_ops->vcpu_blocking(vcpu); 1453 } 1454 1455 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1456 { 1457 if (kvm_x86_ops->vcpu_unblocking) 1458 kvm_x86_ops->vcpu_unblocking(vcpu); 1459 } 1460 1461 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1462 1463 static inline int kvm_cpu_get_apicid(int mps_cpu) 1464 { 1465 #ifdef CONFIG_X86_LOCAL_APIC 1466 return default_cpu_present_to_apicid(mps_cpu); 1467 #else 1468 WARN_ON_ONCE(1); 1469 return BAD_APICID; 1470 #endif 1471 } 1472 1473 #define put_smstate(type, buf, offset, val) \ 1474 *(type *)((buf) + (offset) - 0x7e00) = val 1475 1476 #endif /* _ASM_X86_KVM_HOST_H */ 1477