1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 #include <linux/workqueue.h> 19 20 #include <linux/kvm.h> 21 #include <linux/kvm_para.h> 22 #include <linux/kvm_types.h> 23 #include <linux/perf_event.h> 24 #include <linux/pvclock_gtod.h> 25 #include <linux/clocksource.h> 26 #include <linux/irqbypass.h> 27 #include <linux/hyperv.h> 28 29 #include <asm/apic.h> 30 #include <asm/pvclock-abi.h> 31 #include <asm/desc.h> 32 #include <asm/mtrr.h> 33 #include <asm/msr-index.h> 34 #include <asm/asm.h> 35 #include <asm/kvm_page_track.h> 36 #include <asm/kvm_vcpu_regs.h> 37 #include <asm/hyperv-tlfs.h> 38 39 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 40 41 #define KVM_MAX_VCPUS 1024 42 43 /* 44 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs 45 * might be larger than the actual number of VCPUs because the 46 * APIC ID encodes CPU topology information. 47 * 48 * In the worst case, we'll need less than one extra bit for the 49 * Core ID, and less than one extra bit for the Package (Die) ID, 50 * so ratio of 4 should be enough. 51 */ 52 #define KVM_VCPU_ID_RATIO 4 53 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO) 54 55 /* memory slots that are not exposed to userspace */ 56 #define KVM_PRIVATE_MEM_SLOTS 3 57 58 #define KVM_HALT_POLL_NS_DEFAULT 200000 59 60 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 61 62 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 63 KVM_DIRTY_LOG_INITIALLY_SET) 64 65 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \ 66 KVM_BUS_LOCK_DETECTION_EXIT) 67 68 /* x86-specific vcpu->requests bit members */ 69 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 70 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 71 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 72 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 73 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 74 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 75 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 76 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 77 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 78 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 79 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 80 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 81 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 82 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 83 #define KVM_REQ_MCLOCK_INPROGRESS \ 84 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 85 #define KVM_REQ_SCAN_IOAPIC \ 86 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 87 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 88 #define KVM_REQ_APIC_PAGE_RELOAD \ 89 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 90 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 91 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 92 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 93 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 94 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 95 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 96 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 97 #define KVM_REQ_APICV_UPDATE \ 98 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 99 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 100 #define KVM_REQ_TLB_FLUSH_GUEST \ 101 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 102 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 103 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 104 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \ 105 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 106 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \ 107 KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 108 109 #define CR0_RESERVED_BITS \ 110 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 111 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 112 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 113 114 #define CR4_RESERVED_BITS \ 115 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 116 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 117 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 118 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 119 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 120 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 121 122 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 123 124 125 126 #define INVALID_PAGE (~(hpa_t)0) 127 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 128 129 #define UNMAPPED_GVA (~(gpa_t)0) 130 #define INVALID_GPA (~(gpa_t)0) 131 132 /* KVM Hugepage definitions for x86 */ 133 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 134 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 135 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 136 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 137 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 138 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 139 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 140 141 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50 142 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 143 #define KVM_MMU_HASH_SHIFT 12 144 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 145 #define KVM_MIN_FREE_MMU_PAGES 5 146 #define KVM_REFILL_PAGES 25 147 #define KVM_MAX_CPUID_ENTRIES 256 148 #define KVM_NR_FIXED_MTRR_REGION 88 149 #define KVM_NR_VAR_MTRR 8 150 151 #define ASYNC_PF_PER_VCPU 64 152 153 enum kvm_reg { 154 VCPU_REGS_RAX = __VCPU_REGS_RAX, 155 VCPU_REGS_RCX = __VCPU_REGS_RCX, 156 VCPU_REGS_RDX = __VCPU_REGS_RDX, 157 VCPU_REGS_RBX = __VCPU_REGS_RBX, 158 VCPU_REGS_RSP = __VCPU_REGS_RSP, 159 VCPU_REGS_RBP = __VCPU_REGS_RBP, 160 VCPU_REGS_RSI = __VCPU_REGS_RSI, 161 VCPU_REGS_RDI = __VCPU_REGS_RDI, 162 #ifdef CONFIG_X86_64 163 VCPU_REGS_R8 = __VCPU_REGS_R8, 164 VCPU_REGS_R9 = __VCPU_REGS_R9, 165 VCPU_REGS_R10 = __VCPU_REGS_R10, 166 VCPU_REGS_R11 = __VCPU_REGS_R11, 167 VCPU_REGS_R12 = __VCPU_REGS_R12, 168 VCPU_REGS_R13 = __VCPU_REGS_R13, 169 VCPU_REGS_R14 = __VCPU_REGS_R14, 170 VCPU_REGS_R15 = __VCPU_REGS_R15, 171 #endif 172 VCPU_REGS_RIP, 173 NR_VCPU_REGS, 174 175 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 176 VCPU_EXREG_CR0, 177 VCPU_EXREG_CR3, 178 VCPU_EXREG_CR4, 179 VCPU_EXREG_RFLAGS, 180 VCPU_EXREG_SEGMENTS, 181 VCPU_EXREG_EXIT_INFO_1, 182 VCPU_EXREG_EXIT_INFO_2, 183 }; 184 185 enum { 186 VCPU_SREG_ES, 187 VCPU_SREG_CS, 188 VCPU_SREG_SS, 189 VCPU_SREG_DS, 190 VCPU_SREG_FS, 191 VCPU_SREG_GS, 192 VCPU_SREG_TR, 193 VCPU_SREG_LDTR, 194 }; 195 196 enum exit_fastpath_completion { 197 EXIT_FASTPATH_NONE, 198 EXIT_FASTPATH_REENTER_GUEST, 199 EXIT_FASTPATH_EXIT_HANDLED, 200 }; 201 typedef enum exit_fastpath_completion fastpath_t; 202 203 struct x86_emulate_ctxt; 204 struct x86_exception; 205 enum x86_intercept; 206 enum x86_intercept_stage; 207 208 #define KVM_NR_DB_REGS 4 209 210 #define DR6_BUS_LOCK (1 << 11) 211 #define DR6_BD (1 << 13) 212 #define DR6_BS (1 << 14) 213 #define DR6_BT (1 << 15) 214 #define DR6_RTM (1 << 16) 215 /* 216 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits. 217 * We can regard all the bits in DR6_FIXED_1 as active_low bits; 218 * they will never be 0 for now, but when they are defined 219 * in the future it will require no code change. 220 * 221 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6. 222 */ 223 #define DR6_ACTIVE_LOW 0xffff0ff0 224 #define DR6_VOLATILE 0x0001e80f 225 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE) 226 227 #define DR7_BP_EN_MASK 0x000000ff 228 #define DR7_GE (1 << 9) 229 #define DR7_GD (1 << 13) 230 #define DR7_FIXED_1 0x00000400 231 #define DR7_VOLATILE 0xffff2bff 232 233 #define KVM_GUESTDBG_VALID_MASK \ 234 (KVM_GUESTDBG_ENABLE | \ 235 KVM_GUESTDBG_SINGLESTEP | \ 236 KVM_GUESTDBG_USE_HW_BP | \ 237 KVM_GUESTDBG_USE_SW_BP | \ 238 KVM_GUESTDBG_INJECT_BP | \ 239 KVM_GUESTDBG_INJECT_DB | \ 240 KVM_GUESTDBG_BLOCKIRQ) 241 242 243 #define PFERR_PRESENT_BIT 0 244 #define PFERR_WRITE_BIT 1 245 #define PFERR_USER_BIT 2 246 #define PFERR_RSVD_BIT 3 247 #define PFERR_FETCH_BIT 4 248 #define PFERR_PK_BIT 5 249 #define PFERR_SGX_BIT 15 250 #define PFERR_GUEST_FINAL_BIT 32 251 #define PFERR_GUEST_PAGE_BIT 33 252 253 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 254 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 255 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 256 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 257 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 258 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 259 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT) 260 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 261 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 262 263 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 264 PFERR_WRITE_MASK | \ 265 PFERR_PRESENT_MASK) 266 267 /* apic attention bits */ 268 #define KVM_APIC_CHECK_VAPIC 0 269 /* 270 * The following bit is set with PV-EOI, unset on EOI. 271 * We detect PV-EOI changes by guest by comparing 272 * this bit with PV-EOI in guest memory. 273 * See the implementation in apic_update_pv_eoi. 274 */ 275 #define KVM_APIC_PV_EOI_PENDING 1 276 277 struct kvm_kernel_irq_routing_entry; 278 279 /* 280 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page 281 * also includes TDP pages) to determine whether or not a page can be used in 282 * the given MMU context. This is a subset of the overall kvm_mmu_role to 283 * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating 284 * 2 bytes per gfn instead of 4 bytes per gfn. 285 * 286 * Indirect upper-level shadow pages are tracked for write-protection via 287 * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create 288 * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise 289 * gfn_track will overflow and explosions will ensure. 290 * 291 * A unique shadow page (SP) for a gfn is created if and only if an existing SP 292 * cannot be reused. The ability to reuse a SP is tracked by its role, which 293 * incorporates various mode bits and properties of the SP. Roughly speaking, 294 * the number of unique SPs that can theoretically be created is 2^n, where n 295 * is the number of bits that are used to compute the role. 296 * 297 * But, even though there are 19 bits in the mask below, not all combinations 298 * of modes and flags are possible: 299 * 300 * - invalid shadow pages are not accounted, so the bits are effectively 18 301 * 302 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging); 303 * execonly and ad_disabled are only used for nested EPT which has 304 * has_4_byte_gpte=0. Therefore, 2 bits are always unused. 305 * 306 * - the 4 bits of level are effectively limited to the values 2/3/4/5, 307 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE 308 * paging has exactly one upper level, making level completely redundant 309 * when has_4_byte_gpte=1. 310 * 311 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if 312 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities. 313 * 314 * Therefore, the maximum number of possible upper-level shadow pages for a 315 * single gfn is a bit less than 2^13. 316 */ 317 union kvm_mmu_page_role { 318 u32 word; 319 struct { 320 unsigned level:4; 321 unsigned has_4_byte_gpte:1; 322 unsigned quadrant:2; 323 unsigned direct:1; 324 unsigned access:3; 325 unsigned invalid:1; 326 unsigned efer_nx:1; 327 unsigned cr0_wp:1; 328 unsigned smep_andnot_wp:1; 329 unsigned smap_andnot_wp:1; 330 unsigned ad_disabled:1; 331 unsigned guest_mode:1; 332 unsigned :6; 333 334 /* 335 * This is left at the top of the word so that 336 * kvm_memslots_for_spte_role can extract it with a 337 * simple shift. While there is room, give it a whole 338 * byte so it is also faster to load it from memory. 339 */ 340 unsigned smm:8; 341 }; 342 }; 343 344 /* 345 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties 346 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER, 347 * including on nested transitions, if nothing in the full role changes then 348 * MMU re-configuration can be skipped. @valid bit is set on first usage so we 349 * don't treat all-zero structure as valid data. 350 * 351 * The properties that are tracked in the extended role but not the page role 352 * are for things that either (a) do not affect the validity of the shadow page 353 * or (b) are indirectly reflected in the shadow page's role. For example, 354 * CR4.PKE only affects permission checks for software walks of the guest page 355 * tables (because KVM doesn't support Protection Keys with shadow paging), and 356 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level. 357 * 358 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role. 359 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and 360 * SMAP, but the MMU's permission checks for software walks need to be SMEP and 361 * SMAP aware regardless of CR0.WP. 362 */ 363 union kvm_mmu_extended_role { 364 u32 word; 365 struct { 366 unsigned int valid:1; 367 unsigned int execonly:1; 368 unsigned int cr0_pg:1; 369 unsigned int cr4_pae:1; 370 unsigned int cr4_pse:1; 371 unsigned int cr4_pke:1; 372 unsigned int cr4_smap:1; 373 unsigned int cr4_smep:1; 374 unsigned int cr4_la57:1; 375 unsigned int efer_lma:1; 376 }; 377 }; 378 379 union kvm_mmu_role { 380 u64 as_u64; 381 struct { 382 union kvm_mmu_page_role base; 383 union kvm_mmu_extended_role ext; 384 }; 385 }; 386 387 struct kvm_rmap_head { 388 unsigned long val; 389 }; 390 391 struct kvm_pio_request { 392 unsigned long linear_rip; 393 unsigned long count; 394 int in; 395 int port; 396 int size; 397 }; 398 399 #define PT64_ROOT_MAX_LEVEL 5 400 401 struct rsvd_bits_validate { 402 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 403 u64 bad_mt_xwr; 404 }; 405 406 struct kvm_mmu_root_info { 407 gpa_t pgd; 408 hpa_t hpa; 409 }; 410 411 #define KVM_MMU_ROOT_INFO_INVALID \ 412 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 413 414 #define KVM_MMU_NUM_PREV_ROOTS 3 415 416 #define KVM_HAVE_MMU_RWLOCK 417 418 struct kvm_mmu_page; 419 struct kvm_page_fault; 420 421 /* 422 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 423 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 424 * current mmu mode. 425 */ 426 struct kvm_mmu { 427 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 428 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 429 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault); 430 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 431 struct x86_exception *fault); 432 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 433 gpa_t gva_or_gpa, u32 access, 434 struct x86_exception *exception); 435 int (*sync_page)(struct kvm_vcpu *vcpu, 436 struct kvm_mmu_page *sp); 437 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 438 struct kvm_mmu_root_info root; 439 union kvm_mmu_role mmu_role; 440 u8 root_level; 441 u8 shadow_root_level; 442 u8 ept_ad; 443 bool direct_map; 444 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 445 446 /* 447 * Bitmap; bit set = permission fault 448 * Byte index: page fault error code [4:1] 449 * Bit index: pte permissions in ACC_* format 450 */ 451 u8 permissions[16]; 452 453 /* 454 * The pkru_mask indicates if protection key checks are needed. It 455 * consists of 16 domains indexed by page fault error code bits [4:1], 456 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 457 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 458 */ 459 u32 pkru_mask; 460 461 u64 *pae_root; 462 u64 *pml4_root; 463 u64 *pml5_root; 464 465 /* 466 * check zero bits on shadow page table entries, these 467 * bits include not only hardware reserved bits but also 468 * the bits spte never used. 469 */ 470 struct rsvd_bits_validate shadow_zero_check; 471 472 struct rsvd_bits_validate guest_rsvd_check; 473 474 u64 pdptrs[4]; /* pae */ 475 }; 476 477 struct kvm_tlb_range { 478 u64 start_gfn; 479 u64 pages; 480 }; 481 482 enum pmc_type { 483 KVM_PMC_GP = 0, 484 KVM_PMC_FIXED, 485 }; 486 487 struct kvm_pmc { 488 enum pmc_type type; 489 u8 idx; 490 u64 counter; 491 u64 eventsel; 492 struct perf_event *perf_event; 493 struct kvm_vcpu *vcpu; 494 /* 495 * eventsel value for general purpose counters, 496 * ctrl value for fixed counters. 497 */ 498 u64 current_config; 499 bool is_paused; 500 bool intr; 501 }; 502 503 #define KVM_PMC_MAX_FIXED 3 504 struct kvm_pmu { 505 unsigned nr_arch_gp_counters; 506 unsigned nr_arch_fixed_counters; 507 unsigned available_event_types; 508 u64 fixed_ctr_ctrl; 509 u64 global_ctrl; 510 u64 global_status; 511 u64 counter_bitmask[2]; 512 u64 global_ctrl_mask; 513 u64 global_ovf_ctrl_mask; 514 u64 reserved_bits; 515 u8 version; 516 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 517 struct kvm_pmc fixed_counters[KVM_PMC_MAX_FIXED]; 518 struct irq_work irq_work; 519 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 520 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 521 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 522 523 /* 524 * The gate to release perf_events not marked in 525 * pmc_in_use only once in a vcpu time slice. 526 */ 527 bool need_cleanup; 528 529 /* 530 * The total number of programmed perf_events and it helps to avoid 531 * redundant check before cleanup if guest don't use vPMU at all. 532 */ 533 u8 event_count; 534 }; 535 536 struct kvm_pmu_ops; 537 538 enum { 539 KVM_DEBUGREG_BP_ENABLED = 1, 540 KVM_DEBUGREG_WONT_EXIT = 2, 541 }; 542 543 struct kvm_mtrr_range { 544 u64 base; 545 u64 mask; 546 struct list_head node; 547 }; 548 549 struct kvm_mtrr { 550 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 551 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 552 u64 deftype; 553 554 struct list_head head; 555 }; 556 557 /* Hyper-V SynIC timer */ 558 struct kvm_vcpu_hv_stimer { 559 struct hrtimer timer; 560 int index; 561 union hv_stimer_config config; 562 u64 count; 563 u64 exp_time; 564 struct hv_message msg; 565 bool msg_pending; 566 }; 567 568 /* Hyper-V synthetic interrupt controller (SynIC)*/ 569 struct kvm_vcpu_hv_synic { 570 u64 version; 571 u64 control; 572 u64 msg_page; 573 u64 evt_page; 574 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 575 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 576 DECLARE_BITMAP(auto_eoi_bitmap, 256); 577 DECLARE_BITMAP(vec_bitmap, 256); 578 bool active; 579 bool dont_zero_synic_pages; 580 }; 581 582 /* Hyper-V per vcpu emulation context */ 583 struct kvm_vcpu_hv { 584 struct kvm_vcpu *vcpu; 585 u32 vp_index; 586 u64 hv_vapic; 587 s64 runtime_offset; 588 struct kvm_vcpu_hv_synic synic; 589 struct kvm_hyperv_exit exit; 590 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 591 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 592 bool enforce_cpuid; 593 struct { 594 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */ 595 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */ 596 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */ 597 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */ 598 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */ 599 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */ 600 } cpuid_cache; 601 }; 602 603 /* Xen HVM per vcpu emulation context */ 604 struct kvm_vcpu_xen { 605 u64 hypercall_rip; 606 u32 current_runstate; 607 bool vcpu_info_set; 608 bool vcpu_time_info_set; 609 bool runstate_set; 610 struct gfn_to_hva_cache vcpu_info_cache; 611 struct gfn_to_hva_cache vcpu_time_info_cache; 612 struct gfn_to_hva_cache runstate_cache; 613 u64 last_steal; 614 u64 runstate_entry_time; 615 u64 runstate_times[4]; 616 unsigned long evtchn_pending_sel; 617 }; 618 619 struct kvm_vcpu_arch { 620 /* 621 * rip and regs accesses must go through 622 * kvm_{register,rip}_{read,write} functions. 623 */ 624 unsigned long regs[NR_VCPU_REGS]; 625 u32 regs_avail; 626 u32 regs_dirty; 627 628 unsigned long cr0; 629 unsigned long cr0_guest_owned_bits; 630 unsigned long cr2; 631 unsigned long cr3; 632 unsigned long cr4; 633 unsigned long cr4_guest_owned_bits; 634 unsigned long cr4_guest_rsvd_bits; 635 unsigned long cr8; 636 u32 host_pkru; 637 u32 pkru; 638 u32 hflags; 639 u64 efer; 640 u64 apic_base; 641 struct kvm_lapic *apic; /* kernel irqchip context */ 642 bool apicv_active; 643 bool load_eoi_exitmap_pending; 644 DECLARE_BITMAP(ioapic_handled_vectors, 256); 645 unsigned long apic_attention; 646 int32_t apic_arb_prio; 647 int mp_state; 648 u64 ia32_misc_enable_msr; 649 u64 smbase; 650 u64 smi_count; 651 bool tpr_access_reporting; 652 bool xsaves_enabled; 653 bool xfd_no_write_intercept; 654 u64 ia32_xss; 655 u64 microcode_version; 656 u64 arch_capabilities; 657 u64 perf_capabilities; 658 659 /* 660 * Paging state of the vcpu 661 * 662 * If the vcpu runs in guest mode with two level paging this still saves 663 * the paging mode of the l1 guest. This context is always used to 664 * handle faults. 665 */ 666 struct kvm_mmu *mmu; 667 668 /* Non-nested MMU for L1 */ 669 struct kvm_mmu root_mmu; 670 671 /* L1 MMU when running nested */ 672 struct kvm_mmu guest_mmu; 673 674 /* 675 * Paging state of an L2 guest (used for nested npt) 676 * 677 * This context will save all necessary information to walk page tables 678 * of an L2 guest. This context is only initialized for page table 679 * walking and not for faulting since we never handle l2 page faults on 680 * the host. 681 */ 682 struct kvm_mmu nested_mmu; 683 684 /* 685 * Pointer to the mmu context currently used for 686 * gva_to_gpa translations. 687 */ 688 struct kvm_mmu *walk_mmu; 689 690 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 691 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 692 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 693 struct kvm_mmu_memory_cache mmu_page_header_cache; 694 695 /* 696 * QEMU userspace and the guest each have their own FPU state. 697 * In vcpu_run, we switch between the user and guest FPU contexts. 698 * While running a VCPU, the VCPU thread will have the guest FPU 699 * context. 700 * 701 * Note that while the PKRU state lives inside the fpu registers, 702 * it is switched out separately at VMENTER and VMEXIT time. The 703 * "guest_fpstate" state here contains the guest FPU context, with the 704 * host PRKU bits. 705 */ 706 struct fpu_guest guest_fpu; 707 708 u64 xcr0; 709 710 struct kvm_pio_request pio; 711 void *pio_data; 712 void *sev_pio_data; 713 unsigned sev_pio_count; 714 715 u8 event_exit_inst_len; 716 717 struct kvm_queued_exception { 718 bool pending; 719 bool injected; 720 bool has_error_code; 721 u8 nr; 722 u32 error_code; 723 unsigned long payload; 724 bool has_payload; 725 u8 nested_apf; 726 } exception; 727 728 struct kvm_queued_interrupt { 729 bool injected; 730 bool soft; 731 u8 nr; 732 } interrupt; 733 734 int halt_request; /* real mode on Intel only */ 735 736 int cpuid_nent; 737 struct kvm_cpuid_entry2 *cpuid_entries; 738 u32 kvm_cpuid_base; 739 740 u64 reserved_gpa_bits; 741 int maxphyaddr; 742 743 /* emulate context */ 744 745 struct x86_emulate_ctxt *emulate_ctxt; 746 bool emulate_regs_need_sync_to_vcpu; 747 bool emulate_regs_need_sync_from_vcpu; 748 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 749 750 gpa_t time; 751 struct pvclock_vcpu_time_info hv_clock; 752 unsigned int hw_tsc_khz; 753 struct gfn_to_hva_cache pv_time; 754 bool pv_time_enabled; 755 /* set guest stopped flag in pvclock flags field */ 756 bool pvclock_set_guest_stopped_request; 757 758 struct { 759 u8 preempted; 760 u64 msr_val; 761 u64 last_steal; 762 struct gfn_to_hva_cache cache; 763 } st; 764 765 u64 l1_tsc_offset; 766 u64 tsc_offset; /* current tsc offset */ 767 u64 last_guest_tsc; 768 u64 last_host_tsc; 769 u64 tsc_offset_adjustment; 770 u64 this_tsc_nsec; 771 u64 this_tsc_write; 772 u64 this_tsc_generation; 773 bool tsc_catchup; 774 bool tsc_always_catchup; 775 s8 virtual_tsc_shift; 776 u32 virtual_tsc_mult; 777 u32 virtual_tsc_khz; 778 s64 ia32_tsc_adjust_msr; 779 u64 msr_ia32_power_ctl; 780 u64 l1_tsc_scaling_ratio; 781 u64 tsc_scaling_ratio; /* current scaling ratio */ 782 783 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 784 unsigned nmi_pending; /* NMI queued after currently running handler */ 785 bool nmi_injected; /* Trying to inject an NMI this entry */ 786 bool smi_pending; /* SMI queued after currently running handler */ 787 u8 handling_intr_from_guest; 788 789 struct kvm_mtrr mtrr_state; 790 u64 pat; 791 792 unsigned switch_db_regs; 793 unsigned long db[KVM_NR_DB_REGS]; 794 unsigned long dr6; 795 unsigned long dr7; 796 unsigned long eff_db[KVM_NR_DB_REGS]; 797 unsigned long guest_debug_dr7; 798 u64 msr_platform_info; 799 u64 msr_misc_features_enables; 800 801 u64 mcg_cap; 802 u64 mcg_status; 803 u64 mcg_ctl; 804 u64 mcg_ext_ctl; 805 u64 *mce_banks; 806 807 /* Cache MMIO info */ 808 u64 mmio_gva; 809 unsigned mmio_access; 810 gfn_t mmio_gfn; 811 u64 mmio_gen; 812 813 struct kvm_pmu pmu; 814 815 /* used for guest single stepping over the given code position */ 816 unsigned long singlestep_rip; 817 818 bool hyperv_enabled; 819 struct kvm_vcpu_hv *hyperv; 820 struct kvm_vcpu_xen xen; 821 822 cpumask_var_t wbinvd_dirty_mask; 823 824 unsigned long last_retry_eip; 825 unsigned long last_retry_addr; 826 827 struct { 828 bool halted; 829 gfn_t gfns[ASYNC_PF_PER_VCPU]; 830 struct gfn_to_hva_cache data; 831 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 832 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 833 u16 vec; 834 u32 id; 835 bool send_user_only; 836 u32 host_apf_flags; 837 unsigned long nested_apf_token; 838 bool delivery_as_pf_vmexit; 839 bool pageready_pending; 840 } apf; 841 842 /* OSVW MSRs (AMD only) */ 843 struct { 844 u64 length; 845 u64 status; 846 } osvw; 847 848 struct { 849 u64 msr_val; 850 struct gfn_to_hva_cache data; 851 } pv_eoi; 852 853 u64 msr_kvm_poll_control; 854 855 /* 856 * Indicates the guest is trying to write a gfn that contains one or 857 * more of the PTEs used to translate the write itself, i.e. the access 858 * is changing its own translation in the guest page tables. KVM exits 859 * to userspace if emulation of the faulting instruction fails and this 860 * flag is set, as KVM cannot make forward progress. 861 * 862 * If emulation fails for a write to guest page tables, KVM unprotects 863 * (zaps) the shadow page for the target gfn and resumes the guest to 864 * retry the non-emulatable instruction (on hardware). Unprotecting the 865 * gfn doesn't allow forward progress for a self-changing access because 866 * doing so also zaps the translation for the gfn, i.e. retrying the 867 * instruction will hit a !PRESENT fault, which results in a new shadow 868 * page and sends KVM back to square one. 869 */ 870 bool write_fault_to_shadow_pgtable; 871 872 /* set at EPT violation at this point */ 873 unsigned long exit_qualification; 874 875 /* pv related host specific info */ 876 struct { 877 bool pv_unhalted; 878 } pv; 879 880 int pending_ioapic_eoi; 881 int pending_external_vector; 882 883 /* be preempted when it's in kernel-mode(cpl=0) */ 884 bool preempted_in_kernel; 885 886 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 887 bool l1tf_flush_l1d; 888 889 /* Host CPU on which VM-entry was most recently attempted */ 890 int last_vmentry_cpu; 891 892 /* AMD MSRC001_0015 Hardware Configuration */ 893 u64 msr_hwcr; 894 895 /* pv related cpuid info */ 896 struct { 897 /* 898 * value of the eax register in the KVM_CPUID_FEATURES CPUID 899 * leaf. 900 */ 901 u32 features; 902 903 /* 904 * indicates whether pv emulation should be disabled if features 905 * are not present in the guest's cpuid 906 */ 907 bool enforce; 908 } pv_cpuid; 909 910 /* Protected Guests */ 911 bool guest_state_protected; 912 913 /* 914 * Set when PDPTS were loaded directly by the userspace without 915 * reading the guest memory 916 */ 917 bool pdptrs_from_userspace; 918 919 #if IS_ENABLED(CONFIG_HYPERV) 920 hpa_t hv_root_tdp; 921 #endif 922 }; 923 924 struct kvm_lpage_info { 925 int disallow_lpage; 926 }; 927 928 struct kvm_arch_memory_slot { 929 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 930 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 931 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 932 }; 933 934 /* 935 * We use as the mode the number of bits allocated in the LDR for the 936 * logical processor ID. It happens that these are all powers of two. 937 * This makes it is very easy to detect cases where the APICs are 938 * configured for multiple modes; in that case, we cannot use the map and 939 * hence cannot use kvm_irq_delivery_to_apic_fast either. 940 */ 941 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 942 #define KVM_APIC_MODE_XAPIC_FLAT 8 943 #define KVM_APIC_MODE_X2APIC 16 944 945 struct kvm_apic_map { 946 struct rcu_head rcu; 947 u8 mode; 948 u32 max_apic_id; 949 union { 950 struct kvm_lapic *xapic_flat_map[8]; 951 struct kvm_lapic *xapic_cluster_map[16][4]; 952 }; 953 struct kvm_lapic *phys_map[]; 954 }; 955 956 /* Hyper-V synthetic debugger (SynDbg)*/ 957 struct kvm_hv_syndbg { 958 struct { 959 u64 control; 960 u64 status; 961 u64 send_page; 962 u64 recv_page; 963 u64 pending_page; 964 } control; 965 u64 options; 966 }; 967 968 /* Current state of Hyper-V TSC page clocksource */ 969 enum hv_tsc_page_status { 970 /* TSC page was not set up or disabled */ 971 HV_TSC_PAGE_UNSET = 0, 972 /* TSC page MSR was written by the guest, update pending */ 973 HV_TSC_PAGE_GUEST_CHANGED, 974 /* TSC page MSR was written by KVM userspace, update pending */ 975 HV_TSC_PAGE_HOST_CHANGED, 976 /* TSC page was properly set up and is currently active */ 977 HV_TSC_PAGE_SET, 978 /* TSC page is currently being updated and therefore is inactive */ 979 HV_TSC_PAGE_UPDATING, 980 /* TSC page was set up with an inaccessible GPA */ 981 HV_TSC_PAGE_BROKEN, 982 }; 983 984 /* Hyper-V emulation context */ 985 struct kvm_hv { 986 struct mutex hv_lock; 987 u64 hv_guest_os_id; 988 u64 hv_hypercall; 989 u64 hv_tsc_page; 990 enum hv_tsc_page_status hv_tsc_page_status; 991 992 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 993 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 994 u64 hv_crash_ctl; 995 996 struct ms_hyperv_tsc_page tsc_ref; 997 998 struct idr conn_to_evt; 999 1000 u64 hv_reenlightenment_control; 1001 u64 hv_tsc_emulation_control; 1002 u64 hv_tsc_emulation_status; 1003 1004 /* How many vCPUs have VP index != vCPU index */ 1005 atomic_t num_mismatched_vp_indexes; 1006 1007 /* 1008 * How many SynICs use 'AutoEOI' feature 1009 * (protected by arch.apicv_update_lock) 1010 */ 1011 unsigned int synic_auto_eoi_used; 1012 1013 struct hv_partition_assist_pg *hv_pa_pg; 1014 struct kvm_hv_syndbg hv_syndbg; 1015 }; 1016 1017 struct msr_bitmap_range { 1018 u32 flags; 1019 u32 nmsrs; 1020 u32 base; 1021 unsigned long *bitmap; 1022 }; 1023 1024 /* Xen emulation context */ 1025 struct kvm_xen { 1026 bool long_mode; 1027 u8 upcall_vector; 1028 struct gfn_to_pfn_cache shinfo_cache; 1029 }; 1030 1031 enum kvm_irqchip_mode { 1032 KVM_IRQCHIP_NONE, 1033 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 1034 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 1035 }; 1036 1037 struct kvm_x86_msr_filter { 1038 u8 count; 1039 bool default_allow:1; 1040 struct msr_bitmap_range ranges[16]; 1041 }; 1042 1043 #define APICV_INHIBIT_REASON_DISABLE 0 1044 #define APICV_INHIBIT_REASON_HYPERV 1 1045 #define APICV_INHIBIT_REASON_NESTED 2 1046 #define APICV_INHIBIT_REASON_IRQWIN 3 1047 #define APICV_INHIBIT_REASON_PIT_REINJ 4 1048 #define APICV_INHIBIT_REASON_X2APIC 5 1049 #define APICV_INHIBIT_REASON_BLOCKIRQ 6 1050 #define APICV_INHIBIT_REASON_ABSENT 7 1051 1052 struct kvm_arch { 1053 unsigned long n_used_mmu_pages; 1054 unsigned long n_requested_mmu_pages; 1055 unsigned long n_max_mmu_pages; 1056 unsigned int indirect_shadow_pages; 1057 u8 mmu_valid_gen; 1058 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 1059 struct list_head active_mmu_pages; 1060 struct list_head zapped_obsolete_pages; 1061 struct list_head lpage_disallowed_mmu_pages; 1062 struct kvm_page_track_notifier_node mmu_sp_tracker; 1063 struct kvm_page_track_notifier_head track_notifier_head; 1064 /* 1065 * Protects marking pages unsync during page faults, as TDP MMU page 1066 * faults only take mmu_lock for read. For simplicity, the unsync 1067 * pages lock is always taken when marking pages unsync regardless of 1068 * whether mmu_lock is held for read or write. 1069 */ 1070 spinlock_t mmu_unsync_pages_lock; 1071 1072 struct list_head assigned_dev_head; 1073 struct iommu_domain *iommu_domain; 1074 bool iommu_noncoherent; 1075 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 1076 atomic_t noncoherent_dma_count; 1077 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 1078 atomic_t assigned_device_count; 1079 struct kvm_pic *vpic; 1080 struct kvm_ioapic *vioapic; 1081 struct kvm_pit *vpit; 1082 atomic_t vapics_in_nmi_mode; 1083 struct mutex apic_map_lock; 1084 struct kvm_apic_map __rcu *apic_map; 1085 atomic_t apic_map_dirty; 1086 1087 /* Protects apic_access_memslot_enabled and apicv_inhibit_reasons */ 1088 struct rw_semaphore apicv_update_lock; 1089 1090 bool apic_access_memslot_enabled; 1091 unsigned long apicv_inhibit_reasons; 1092 1093 gpa_t wall_clock; 1094 1095 bool mwait_in_guest; 1096 bool hlt_in_guest; 1097 bool pause_in_guest; 1098 bool cstate_in_guest; 1099 1100 unsigned long irq_sources_bitmap; 1101 s64 kvmclock_offset; 1102 1103 /* 1104 * This also protects nr_vcpus_matched_tsc which is read from a 1105 * preemption-disabled region, so it must be a raw spinlock. 1106 */ 1107 raw_spinlock_t tsc_write_lock; 1108 u64 last_tsc_nsec; 1109 u64 last_tsc_write; 1110 u32 last_tsc_khz; 1111 u64 last_tsc_offset; 1112 u64 cur_tsc_nsec; 1113 u64 cur_tsc_write; 1114 u64 cur_tsc_offset; 1115 u64 cur_tsc_generation; 1116 int nr_vcpus_matched_tsc; 1117 1118 seqcount_raw_spinlock_t pvclock_sc; 1119 bool use_master_clock; 1120 u64 master_kernel_ns; 1121 u64 master_cycle_now; 1122 struct delayed_work kvmclock_update_work; 1123 struct delayed_work kvmclock_sync_work; 1124 1125 struct kvm_xen_hvm_config xen_hvm_config; 1126 1127 /* reads protected by irq_srcu, writes by irq_lock */ 1128 struct hlist_head mask_notifier_list; 1129 1130 struct kvm_hv hyperv; 1131 struct kvm_xen xen; 1132 1133 bool backwards_tsc_observed; 1134 bool boot_vcpu_runs_old_kvmclock; 1135 u32 bsp_vcpu_id; 1136 1137 u64 disabled_quirks; 1138 int cpu_dirty_logging_count; 1139 1140 enum kvm_irqchip_mode irqchip_mode; 1141 u8 nr_reserved_ioapic_pins; 1142 1143 bool disabled_lapic_found; 1144 1145 bool x2apic_format; 1146 bool x2apic_broadcast_quirk_disabled; 1147 1148 bool guest_can_read_msr_platform_info; 1149 bool exception_payload_enabled; 1150 1151 bool bus_lock_detection_enabled; 1152 bool enable_pmu; 1153 /* 1154 * If exit_on_emulation_error is set, and the in-kernel instruction 1155 * emulator fails to emulate an instruction, allow userspace 1156 * the opportunity to look at it. 1157 */ 1158 bool exit_on_emulation_error; 1159 1160 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 1161 u32 user_space_msr_mask; 1162 struct kvm_x86_msr_filter __rcu *msr_filter; 1163 1164 u32 hypercall_exit_enabled; 1165 1166 /* Guest can access the SGX PROVISIONKEY. */ 1167 bool sgx_provisioning_allowed; 1168 1169 struct kvm_pmu_event_filter __rcu *pmu_event_filter; 1170 struct task_struct *nx_lpage_recovery_thread; 1171 1172 #ifdef CONFIG_X86_64 1173 /* 1174 * Whether the TDP MMU is enabled for this VM. This contains a 1175 * snapshot of the TDP MMU module parameter from when the VM was 1176 * created and remains unchanged for the life of the VM. If this is 1177 * true, TDP MMU handler functions will run for various MMU 1178 * operations. 1179 */ 1180 bool tdp_mmu_enabled; 1181 1182 /* 1183 * List of struct kvm_mmu_pages being used as roots. 1184 * All struct kvm_mmu_pages in the list should have 1185 * tdp_mmu_page set. 1186 * 1187 * For reads, this list is protected by: 1188 * the MMU lock in read mode + RCU or 1189 * the MMU lock in write mode 1190 * 1191 * For writes, this list is protected by: 1192 * the MMU lock in read mode + the tdp_mmu_pages_lock or 1193 * the MMU lock in write mode 1194 * 1195 * Roots will remain in the list until their tdp_mmu_root_count 1196 * drops to zero, at which point the thread that decremented the 1197 * count to zero should removed the root from the list and clean 1198 * it up, freeing the root after an RCU grace period. 1199 */ 1200 struct list_head tdp_mmu_roots; 1201 1202 /* 1203 * List of struct kvmp_mmu_pages not being used as roots. 1204 * All struct kvm_mmu_pages in the list should have 1205 * tdp_mmu_page set and a tdp_mmu_root_count of 0. 1206 */ 1207 struct list_head tdp_mmu_pages; 1208 1209 /* 1210 * Protects accesses to the following fields when the MMU lock 1211 * is held in read mode: 1212 * - tdp_mmu_roots (above) 1213 * - tdp_mmu_pages (above) 1214 * - the link field of struct kvm_mmu_pages used by the TDP MMU 1215 * - lpage_disallowed_mmu_pages 1216 * - the lpage_disallowed_link field of struct kvm_mmu_pages used 1217 * by the TDP MMU 1218 * It is acceptable, but not necessary, to acquire this lock when 1219 * the thread holds the MMU lock in write mode. 1220 */ 1221 spinlock_t tdp_mmu_pages_lock; 1222 struct workqueue_struct *tdp_mmu_zap_wq; 1223 #endif /* CONFIG_X86_64 */ 1224 1225 /* 1226 * If set, at least one shadow root has been allocated. This flag 1227 * is used as one input when determining whether certain memslot 1228 * related allocations are necessary. 1229 */ 1230 bool shadow_root_allocated; 1231 1232 #if IS_ENABLED(CONFIG_HYPERV) 1233 hpa_t hv_root_tdp; 1234 spinlock_t hv_root_tdp_lock; 1235 #endif 1236 }; 1237 1238 struct kvm_vm_stat { 1239 struct kvm_vm_stat_generic generic; 1240 u64 mmu_shadow_zapped; 1241 u64 mmu_pte_write; 1242 u64 mmu_pde_zapped; 1243 u64 mmu_flooded; 1244 u64 mmu_recycled; 1245 u64 mmu_cache_miss; 1246 u64 mmu_unsync; 1247 union { 1248 struct { 1249 atomic64_t pages_4k; 1250 atomic64_t pages_2m; 1251 atomic64_t pages_1g; 1252 }; 1253 atomic64_t pages[KVM_NR_PAGE_SIZES]; 1254 }; 1255 u64 nx_lpage_splits; 1256 u64 max_mmu_page_hash_collisions; 1257 u64 max_mmu_rmap_size; 1258 }; 1259 1260 struct kvm_vcpu_stat { 1261 struct kvm_vcpu_stat_generic generic; 1262 u64 pf_fixed; 1263 u64 pf_guest; 1264 u64 tlb_flush; 1265 u64 invlpg; 1266 1267 u64 exits; 1268 u64 io_exits; 1269 u64 mmio_exits; 1270 u64 signal_exits; 1271 u64 irq_window_exits; 1272 u64 nmi_window_exits; 1273 u64 l1d_flush; 1274 u64 halt_exits; 1275 u64 request_irq_exits; 1276 u64 irq_exits; 1277 u64 host_state_reload; 1278 u64 fpu_reload; 1279 u64 insn_emulation; 1280 u64 insn_emulation_fail; 1281 u64 hypercalls; 1282 u64 irq_injections; 1283 u64 nmi_injections; 1284 u64 req_event; 1285 u64 nested_run; 1286 u64 directed_yield_attempted; 1287 u64 directed_yield_successful; 1288 u64 guest_mode; 1289 }; 1290 1291 struct x86_instruction_info; 1292 1293 struct msr_data { 1294 bool host_initiated; 1295 u32 index; 1296 u64 data; 1297 }; 1298 1299 struct kvm_lapic_irq { 1300 u32 vector; 1301 u16 delivery_mode; 1302 u16 dest_mode; 1303 bool level; 1304 u16 trig_mode; 1305 u32 shorthand; 1306 u32 dest_id; 1307 bool msi_redir_hint; 1308 }; 1309 1310 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1311 { 1312 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1313 } 1314 1315 struct kvm_x86_ops { 1316 const char *name; 1317 1318 int (*hardware_enable)(void); 1319 void (*hardware_disable)(void); 1320 void (*hardware_unsetup)(void); 1321 bool (*has_emulated_msr)(struct kvm *kvm, u32 index); 1322 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1323 1324 unsigned int vm_size; 1325 int (*vm_init)(struct kvm *kvm); 1326 void (*vm_destroy)(struct kvm *kvm); 1327 1328 /* Create, but do not attach this VCPU */ 1329 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1330 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1331 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1332 1333 void (*prepare_switch_to_guest)(struct kvm_vcpu *vcpu); 1334 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1335 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1336 1337 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1338 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1339 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1340 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1341 void (*get_segment)(struct kvm_vcpu *vcpu, 1342 struct kvm_segment *var, int seg); 1343 int (*get_cpl)(struct kvm_vcpu *vcpu); 1344 void (*set_segment)(struct kvm_vcpu *vcpu, 1345 struct kvm_segment *var, int seg); 1346 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1347 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1348 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1349 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1350 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1351 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1352 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1353 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1354 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1355 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1356 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1357 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1358 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1359 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1360 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1361 bool (*get_if_flag)(struct kvm_vcpu *vcpu); 1362 1363 void (*flush_tlb_all)(struct kvm_vcpu *vcpu); 1364 void (*flush_tlb_current)(struct kvm_vcpu *vcpu); 1365 int (*tlb_remote_flush)(struct kvm *kvm); 1366 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1367 struct kvm_tlb_range *range); 1368 1369 /* 1370 * Flush any TLB entries associated with the given GVA. 1371 * Does not need to flush GPA->HPA mappings. 1372 * Can potentially get non-canonical addresses through INVLPGs, which 1373 * the implementation may choose to ignore if appropriate. 1374 */ 1375 void (*flush_tlb_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1376 1377 /* 1378 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1379 * does not need to flush GPA->HPA mappings. 1380 */ 1381 void (*flush_tlb_guest)(struct kvm_vcpu *vcpu); 1382 1383 int (*vcpu_pre_run)(struct kvm_vcpu *vcpu); 1384 enum exit_fastpath_completion (*vcpu_run)(struct kvm_vcpu *vcpu); 1385 int (*handle_exit)(struct kvm_vcpu *vcpu, 1386 enum exit_fastpath_completion exit_fastpath); 1387 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1388 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1389 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1390 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1391 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1392 unsigned char *hypercall_addr); 1393 void (*inject_irq)(struct kvm_vcpu *vcpu); 1394 void (*inject_nmi)(struct kvm_vcpu *vcpu); 1395 void (*queue_exception)(struct kvm_vcpu *vcpu); 1396 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1397 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1398 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1399 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1400 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1401 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1402 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1403 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1404 bool (*check_apicv_inhibit_reasons)(ulong bit); 1405 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1406 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1407 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1408 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1409 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1410 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1411 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1412 void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode, 1413 int trig_mode, int vector); 1414 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1415 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1416 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1417 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1418 1419 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa, 1420 int root_level); 1421 1422 bool (*has_wbinvd_exit)(void); 1423 1424 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu); 1425 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu); 1426 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1427 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier); 1428 1429 /* 1430 * Retrieve somewhat arbitrary exit information. Intended to 1431 * be used only from within tracepoints or error paths. 1432 */ 1433 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason, 1434 u64 *info1, u64 *info2, 1435 u32 *exit_int_info, u32 *exit_int_info_err_code); 1436 1437 int (*check_intercept)(struct kvm_vcpu *vcpu, 1438 struct x86_instruction_info *info, 1439 enum x86_intercept_stage stage, 1440 struct x86_exception *exception); 1441 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1442 1443 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1444 1445 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1446 1447 /* 1448 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero 1449 * value indicates CPU dirty logging is unsupported or disabled. 1450 */ 1451 int cpu_dirty_log_size; 1452 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu); 1453 1454 /* pmu operations of sub-arch */ 1455 const struct kvm_pmu_ops *pmu_ops; 1456 const struct kvm_x86_nested_ops *nested_ops; 1457 1458 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1459 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1460 1461 int (*pi_update_irte)(struct kvm *kvm, unsigned int host_irq, 1462 uint32_t guest_irq, bool set); 1463 void (*pi_start_assignment)(struct kvm *kvm); 1464 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1465 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1466 1467 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1468 bool *expired); 1469 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1470 1471 void (*setup_mce)(struct kvm_vcpu *vcpu); 1472 1473 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1474 int (*enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1475 int (*leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1476 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1477 1478 int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp); 1479 int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1480 int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1481 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1482 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1483 1484 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1485 1486 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type, 1487 void *insn, int insn_len); 1488 1489 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1490 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1491 1492 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1493 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1494 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); 1495 1496 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); 1497 }; 1498 1499 struct kvm_x86_nested_ops { 1500 void (*leave_nested)(struct kvm_vcpu *vcpu); 1501 int (*check_events)(struct kvm_vcpu *vcpu); 1502 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1503 void (*triple_fault)(struct kvm_vcpu *vcpu); 1504 int (*get_state)(struct kvm_vcpu *vcpu, 1505 struct kvm_nested_state __user *user_kvm_nested_state, 1506 unsigned user_data_size); 1507 int (*set_state)(struct kvm_vcpu *vcpu, 1508 struct kvm_nested_state __user *user_kvm_nested_state, 1509 struct kvm_nested_state *kvm_state); 1510 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1511 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1512 1513 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1514 uint16_t *vmcs_version); 1515 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1516 }; 1517 1518 struct kvm_x86_init_ops { 1519 int (*cpu_has_kvm_support)(void); 1520 int (*disabled_by_bios)(void); 1521 int (*check_processor_compatibility)(void); 1522 int (*hardware_setup)(void); 1523 unsigned int (*handle_intel_pt_intr)(void); 1524 1525 struct kvm_x86_ops *runtime_ops; 1526 }; 1527 1528 struct kvm_arch_async_pf { 1529 u32 token; 1530 gfn_t gfn; 1531 unsigned long cr3; 1532 bool direct_map; 1533 }; 1534 1535 extern u32 __read_mostly kvm_nr_uret_msrs; 1536 extern u64 __read_mostly host_efer; 1537 extern bool __read_mostly allow_smaller_maxphyaddr; 1538 extern bool __read_mostly enable_apicv; 1539 extern struct kvm_x86_ops kvm_x86_ops; 1540 1541 #define KVM_X86_OP(func) \ 1542 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func)); 1543 #define KVM_X86_OP_OPTIONAL KVM_X86_OP 1544 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP 1545 #include <asm/kvm-x86-ops.h> 1546 1547 static inline void kvm_ops_static_call_update(void) 1548 { 1549 #define __KVM_X86_OP(func) \ 1550 static_call_update(kvm_x86_##func, kvm_x86_ops.func); 1551 #define KVM_X86_OP(func) \ 1552 WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func) 1553 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP 1554 #define KVM_X86_OP_OPTIONAL_RET0(func) \ 1555 static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \ 1556 (void *)__static_call_return0); 1557 #include <asm/kvm-x86-ops.h> 1558 #undef __KVM_X86_OP 1559 } 1560 1561 #define __KVM_HAVE_ARCH_VM_ALLOC 1562 static inline struct kvm *kvm_arch_alloc_vm(void) 1563 { 1564 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1565 } 1566 1567 #define __KVM_HAVE_ARCH_VM_FREE 1568 void kvm_arch_free_vm(struct kvm *kvm); 1569 1570 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1571 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1572 { 1573 if (kvm_x86_ops.tlb_remote_flush && 1574 !static_call(kvm_x86_tlb_remote_flush)(kvm)) 1575 return 0; 1576 else 1577 return -ENOTSUPP; 1578 } 1579 1580 #define kvm_arch_pmi_in_guest(vcpu) \ 1581 ((vcpu) && (vcpu)->arch.handling_intr_from_guest) 1582 1583 int kvm_mmu_module_init(void); 1584 void kvm_mmu_module_exit(void); 1585 1586 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1587 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1588 void kvm_mmu_init_vm(struct kvm *kvm); 1589 void kvm_mmu_uninit_vm(struct kvm *kvm); 1590 1591 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu); 1592 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1593 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1594 const struct kvm_memory_slot *memslot, 1595 int start_level); 1596 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm, 1597 const struct kvm_memory_slot *memslot, 1598 int target_level); 1599 void kvm_mmu_try_split_huge_pages(struct kvm *kvm, 1600 const struct kvm_memory_slot *memslot, 1601 u64 start, u64 end, 1602 int target_level); 1603 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1604 const struct kvm_memory_slot *memslot); 1605 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1606 const struct kvm_memory_slot *memslot); 1607 void kvm_mmu_zap_all(struct kvm *kvm); 1608 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1609 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1610 1611 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); 1612 1613 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1614 const void *val, int bytes); 1615 1616 struct kvm_irq_mask_notifier { 1617 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1618 int irq; 1619 struct hlist_node link; 1620 }; 1621 1622 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1623 struct kvm_irq_mask_notifier *kimn); 1624 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1625 struct kvm_irq_mask_notifier *kimn); 1626 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1627 bool mask); 1628 1629 extern bool tdp_enabled; 1630 1631 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1632 1633 /* control of guest tsc rate supported? */ 1634 extern bool kvm_has_tsc_control; 1635 /* maximum supported tsc_khz for guests */ 1636 extern u32 kvm_max_guest_tsc_khz; 1637 /* number of bits of the fractional part of the TSC scaling ratio */ 1638 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1639 /* maximum allowed value of TSC scaling ratio */ 1640 extern u64 kvm_max_tsc_scaling_ratio; 1641 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1642 extern u64 kvm_default_tsc_scaling_ratio; 1643 /* bus lock detection supported? */ 1644 extern bool kvm_has_bus_lock_exit; 1645 1646 extern u64 kvm_mce_cap_supported; 1647 1648 /* 1649 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1650 * userspace I/O) to indicate that the emulation context 1651 * should be reused as is, i.e. skip initialization of 1652 * emulation context, instruction fetch and decode. 1653 * 1654 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1655 * Indicates that only select instructions (tagged with 1656 * EmulateOnUD) should be emulated (to minimize the emulator 1657 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1658 * 1659 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1660 * decode the instruction length. For use *only* by 1661 * kvm_x86_ops.skip_emulated_instruction() implementations if 1662 * EMULTYPE_COMPLETE_USER_EXIT is not set. 1663 * 1664 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1665 * retry native execution under certain conditions, 1666 * Can only be set in conjunction with EMULTYPE_PF. 1667 * 1668 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1669 * triggered by KVM's magic "force emulation" prefix, 1670 * which is opt in via module param (off by default). 1671 * Bypasses EmulateOnUD restriction despite emulating 1672 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1673 * Used to test the full emulator from userspace. 1674 * 1675 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1676 * backdoor emulation, which is opt in via module param. 1677 * VMware backdoor emulation handles select instructions 1678 * and reinjects the #GP for all other cases. 1679 * 1680 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1681 * case the CR2/GPA value pass on the stack is valid. 1682 * 1683 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility 1684 * state and inject single-step #DBs after skipping 1685 * an instruction (after completing userspace I/O). 1686 */ 1687 #define EMULTYPE_NO_DECODE (1 << 0) 1688 #define EMULTYPE_TRAP_UD (1 << 1) 1689 #define EMULTYPE_SKIP (1 << 2) 1690 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1691 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1692 #define EMULTYPE_VMWARE_GP (1 << 5) 1693 #define EMULTYPE_PF (1 << 6) 1694 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7) 1695 1696 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1697 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1698 void *insn, int insn_len); 1699 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, 1700 u64 *data, u8 ndata); 1701 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu); 1702 1703 void kvm_enable_efer_bits(u64); 1704 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1705 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1706 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1707 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1708 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1709 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1710 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu); 1711 int kvm_emulate_invd(struct kvm_vcpu *vcpu); 1712 int kvm_emulate_mwait(struct kvm_vcpu *vcpu); 1713 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu); 1714 int kvm_emulate_monitor(struct kvm_vcpu *vcpu); 1715 1716 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1717 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1718 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1719 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu); 1720 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu); 1721 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1722 1723 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1724 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1725 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1726 1727 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1728 int reason, bool has_error_code, u32 error_code); 1729 1730 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0); 1731 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4); 1732 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1733 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1734 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1735 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1736 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1737 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1738 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1739 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1740 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu); 1741 1742 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1743 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1744 1745 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1746 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1747 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu); 1748 1749 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1750 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1751 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1752 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1753 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1754 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1755 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1756 struct x86_exception *fault); 1757 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1758 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1759 1760 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1761 int irq_source_id, int level) 1762 { 1763 /* Logical OR for level trig interrupt */ 1764 if (level) 1765 __set_bit(irq_source_id, irq_state); 1766 else 1767 __clear_bit(irq_source_id, irq_state); 1768 1769 return !!(*irq_state); 1770 } 1771 1772 #define KVM_MMU_ROOT_CURRENT BIT(0) 1773 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1774 #define KVM_MMU_ROOTS_ALL (~0UL) 1775 1776 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1777 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1778 1779 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1780 1781 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1782 1783 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1784 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu, 1785 ulong roots_to_free); 1786 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu); 1787 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1788 struct x86_exception *exception); 1789 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1790 struct x86_exception *exception); 1791 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1792 struct x86_exception *exception); 1793 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1794 struct x86_exception *exception); 1795 1796 bool kvm_apicv_activated(struct kvm *kvm); 1797 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1798 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1799 unsigned long bit); 1800 1801 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, 1802 unsigned long bit); 1803 1804 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1805 1806 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1807 void *insn, int insn_len); 1808 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1809 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1810 gva_t gva, hpa_t root_hpa); 1811 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1812 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd); 1813 1814 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level, 1815 int tdp_max_root_level, int tdp_huge_page_level); 1816 1817 static inline u16 kvm_read_ldt(void) 1818 { 1819 u16 ldt; 1820 asm("sldt %0" : "=g"(ldt)); 1821 return ldt; 1822 } 1823 1824 static inline void kvm_load_ldt(u16 sel) 1825 { 1826 asm("lldt %0" : : "rm"(sel)); 1827 } 1828 1829 #ifdef CONFIG_X86_64 1830 static inline unsigned long read_msr(unsigned long msr) 1831 { 1832 u64 value; 1833 1834 rdmsrl(msr, value); 1835 return value; 1836 } 1837 #endif 1838 1839 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1840 { 1841 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1842 } 1843 1844 #define TSS_IOPB_BASE_OFFSET 0x66 1845 #define TSS_BASE_SIZE 0x68 1846 #define TSS_IOPB_SIZE (65536 / 8) 1847 #define TSS_REDIRECTION_SIZE (256 / 8) 1848 #define RMODE_TSS_SIZE \ 1849 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1850 1851 enum { 1852 TASK_SWITCH_CALL = 0, 1853 TASK_SWITCH_IRET = 1, 1854 TASK_SWITCH_JMP = 2, 1855 TASK_SWITCH_GATE = 3, 1856 }; 1857 1858 #define HF_GIF_MASK (1 << 0) 1859 #define HF_NMI_MASK (1 << 3) 1860 #define HF_IRET_MASK (1 << 4) 1861 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1862 #define HF_SMM_MASK (1 << 6) 1863 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1864 1865 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1866 #define KVM_ADDRESS_SPACE_NUM 2 1867 1868 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1869 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1870 1871 #define KVM_ARCH_WANT_MMU_NOTIFIER 1872 1873 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1874 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1875 int kvm_cpu_has_extint(struct kvm_vcpu *v); 1876 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1877 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1878 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1879 1880 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1881 unsigned long ipi_bitmap_high, u32 min, 1882 unsigned long icr, int op_64_bit); 1883 1884 int kvm_add_user_return_msr(u32 msr); 1885 int kvm_find_user_return_msr(u32 msr); 1886 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1887 1888 static inline bool kvm_is_supported_user_return_msr(u32 msr) 1889 { 1890 return kvm_find_user_return_msr(msr) >= 0; 1891 } 1892 1893 u64 kvm_scale_tsc(u64 tsc, u64 ratio); 1894 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1895 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier); 1896 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier); 1897 1898 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1899 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1900 1901 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1902 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1903 unsigned long *vcpu_bitmap); 1904 1905 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1906 struct kvm_async_pf *work); 1907 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1908 struct kvm_async_pf *work); 1909 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1910 struct kvm_async_pf *work); 1911 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1912 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1913 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1914 1915 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1916 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1917 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1918 1919 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, 1920 u32 size); 1921 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1922 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1923 1924 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1925 struct kvm_vcpu **dest_vcpu); 1926 1927 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1928 struct kvm_lapic_irq *irq); 1929 1930 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1931 { 1932 /* We can only post Fixed and LowPrio IRQs */ 1933 return (irq->delivery_mode == APIC_DM_FIXED || 1934 irq->delivery_mode == APIC_DM_LOWEST); 1935 } 1936 1937 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1938 { 1939 static_call_cond(kvm_x86_vcpu_blocking)(vcpu); 1940 } 1941 1942 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1943 { 1944 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu); 1945 } 1946 1947 static inline int kvm_cpu_get_apicid(int mps_cpu) 1948 { 1949 #ifdef CONFIG_X86_LOCAL_APIC 1950 return default_cpu_present_to_apicid(mps_cpu); 1951 #else 1952 WARN_ON_ONCE(1); 1953 return BAD_APICID; 1954 #endif 1955 } 1956 1957 #define put_smstate(type, buf, offset, val) \ 1958 *(type *)((buf) + (offset) - 0x7e00) = val 1959 1960 #define GET_SMSTATE(type, buf, offset) \ 1961 (*(type *)((buf) + (offset) - 0x7e00)) 1962 1963 int kvm_cpu_dirty_log_size(void); 1964 1965 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages); 1966 1967 #define KVM_CLOCK_VALID_FLAGS \ 1968 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC) 1969 1970 #define KVM_X86_VALID_QUIRKS \ 1971 (KVM_X86_QUIRK_LINT0_REENABLED | \ 1972 KVM_X86_QUIRK_CD_NW_CLEARED | \ 1973 KVM_X86_QUIRK_LAPIC_MMIO_HOLE | \ 1974 KVM_X86_QUIRK_OUT_7E_INC_RIP | \ 1975 KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) 1976 1977 #endif /* _ASM_X86_KVM_HOST_H */ 1978