1bb898558SAl Viro #ifndef ASM_X86__IRQ_VECTORS_H 2bb898558SAl Viro #define ASM_X86__IRQ_VECTORS_H 3bb898558SAl Viro 4bb898558SAl Viro #include <linux/threads.h> 5bb898558SAl Viro 6bb898558SAl Viro #define NMI_VECTOR 0x02 7bb898558SAl Viro 8bb898558SAl Viro /* 9bb898558SAl Viro * IDT vectors usable for external interrupt sources start 10bb898558SAl Viro * at 0x20: 11bb898558SAl Viro */ 12bb898558SAl Viro #define FIRST_EXTERNAL_VECTOR 0x20 13bb898558SAl Viro 14bb898558SAl Viro #ifdef CONFIG_X86_32 15bb898558SAl Viro # define SYSCALL_VECTOR 0x80 16bb898558SAl Viro #else 17bb898558SAl Viro # define IA32_SYSCALL_VECTOR 0x80 18bb898558SAl Viro #endif 19bb898558SAl Viro 20bb898558SAl Viro /* 21bb898558SAl Viro * Reserve the lowest usable priority level 0x20 - 0x2f for triggering 22bb898558SAl Viro * cleanup after irq migration. 23bb898558SAl Viro */ 24bb898558SAl Viro #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR 25bb898558SAl Viro 26bb898558SAl Viro /* 27bb898558SAl Viro * Vectors 0x30-0x3f are used for ISA interrupts. 28bb898558SAl Viro */ 29bb898558SAl Viro #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) 30bb898558SAl Viro #define IRQ1_VECTOR (IRQ0_VECTOR + 1) 31bb898558SAl Viro #define IRQ2_VECTOR (IRQ0_VECTOR + 2) 32bb898558SAl Viro #define IRQ3_VECTOR (IRQ0_VECTOR + 3) 33bb898558SAl Viro #define IRQ4_VECTOR (IRQ0_VECTOR + 4) 34bb898558SAl Viro #define IRQ5_VECTOR (IRQ0_VECTOR + 5) 35bb898558SAl Viro #define IRQ6_VECTOR (IRQ0_VECTOR + 6) 36bb898558SAl Viro #define IRQ7_VECTOR (IRQ0_VECTOR + 7) 37bb898558SAl Viro #define IRQ8_VECTOR (IRQ0_VECTOR + 8) 38bb898558SAl Viro #define IRQ9_VECTOR (IRQ0_VECTOR + 9) 39bb898558SAl Viro #define IRQ10_VECTOR (IRQ0_VECTOR + 10) 40bb898558SAl Viro #define IRQ11_VECTOR (IRQ0_VECTOR + 11) 41bb898558SAl Viro #define IRQ12_VECTOR (IRQ0_VECTOR + 12) 42bb898558SAl Viro #define IRQ13_VECTOR (IRQ0_VECTOR + 13) 43bb898558SAl Viro #define IRQ14_VECTOR (IRQ0_VECTOR + 14) 44bb898558SAl Viro #define IRQ15_VECTOR (IRQ0_VECTOR + 15) 45bb898558SAl Viro 46bb898558SAl Viro /* 47bb898558SAl Viro * Special IRQ vectors used by the SMP architecture, 0xf0-0xff 48bb898558SAl Viro * 49bb898558SAl Viro * some of the following vectors are 'rare', they are merged 50bb898558SAl Viro * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. 51bb898558SAl Viro * TLB, reschedule and local APIC vectors are performance-critical. 52bb898558SAl Viro * 53bb898558SAl Viro * Vectors 0xf0-0xfa are free (reserved for future Linux use). 54bb898558SAl Viro */ 55bb898558SAl Viro #ifdef CONFIG_X86_32 56bb898558SAl Viro 57bb898558SAl Viro # define SPURIOUS_APIC_VECTOR 0xff 58bb898558SAl Viro # define ERROR_APIC_VECTOR 0xfe 59bb898558SAl Viro # define INVALIDATE_TLB_VECTOR 0xfd 60bb898558SAl Viro # define RESCHEDULE_VECTOR 0xfc 61bb898558SAl Viro # define CALL_FUNCTION_VECTOR 0xfb 62bb898558SAl Viro # define CALL_FUNCTION_SINGLE_VECTOR 0xfa 63bb898558SAl Viro # define THERMAL_APIC_VECTOR 0xf0 64bb898558SAl Viro 65bb898558SAl Viro #else 66bb898558SAl Viro 67bb898558SAl Viro #define SPURIOUS_APIC_VECTOR 0xff 68bb898558SAl Viro #define ERROR_APIC_VECTOR 0xfe 69bb898558SAl Viro #define RESCHEDULE_VECTOR 0xfd 70bb898558SAl Viro #define CALL_FUNCTION_VECTOR 0xfc 71bb898558SAl Viro #define CALL_FUNCTION_SINGLE_VECTOR 0xfb 72bb898558SAl Viro #define THERMAL_APIC_VECTOR 0xfa 73bb898558SAl Viro #define THRESHOLD_APIC_VECTOR 0xf9 74bb898558SAl Viro #define UV_BAU_MESSAGE 0xf8 75bb898558SAl Viro #define INVALIDATE_TLB_VECTOR_END 0xf7 76bb898558SAl Viro #define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */ 77bb898558SAl Viro 78bb898558SAl Viro #define NUM_INVALIDATE_TLB_VECTORS 8 79bb898558SAl Viro 80bb898558SAl Viro #endif 81bb898558SAl Viro 82bb898558SAl Viro /* 83bb898558SAl Viro * Local APIC timer IRQ vector is on a different priority level, 84bb898558SAl Viro * to work around the 'lost local interrupt if more than 2 IRQ 85bb898558SAl Viro * sources per level' errata. 86bb898558SAl Viro */ 87bb898558SAl Viro #define LOCAL_TIMER_VECTOR 0xef 88bb898558SAl Viro 89bb898558SAl Viro /* 90bb898558SAl Viro * First APIC vector available to drivers: (vectors 0x30-0xee) we 91bb898558SAl Viro * start at 0x31(0x41) to spread out vectors evenly between priority 92bb898558SAl Viro * levels. (0x80 is the syscall vector) 93bb898558SAl Viro */ 94bb898558SAl Viro #define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2) 95bb898558SAl Viro 96bb898558SAl Viro #define NR_VECTORS 256 97bb898558SAl Viro 98bb898558SAl Viro #define FPU_IRQ 13 99bb898558SAl Viro 100bb898558SAl Viro #define FIRST_VM86_IRQ 3 101bb898558SAl Viro #define LAST_VM86_IRQ 15 102bb898558SAl Viro #define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) 103bb898558SAl Viro 104bb898558SAl Viro #ifdef CONFIG_X86_64 105bb898558SAl Viro # if NR_CPUS < MAX_IO_APICS 106bb898558SAl Viro # define NR_IRQS (NR_VECTORS + (32 * NR_CPUS)) 107bb898558SAl Viro # else 108bb898558SAl Viro # define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS)) 109bb898558SAl Viro # endif 110bb898558SAl Viro 111bb898558SAl Viro #elif !defined(CONFIG_X86_VOYAGER) 112bb898558SAl Viro 113bb898558SAl Viro # if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) || defined(CONFIG_X86_VISWS) 114bb898558SAl Viro 115bb898558SAl Viro # define NR_IRQS 224 116bb898558SAl Viro 117bb898558SAl Viro # else /* IO_APIC || PARAVIRT */ 118bb898558SAl Viro 119bb898558SAl Viro # define NR_IRQS 16 120bb898558SAl Viro 121bb898558SAl Viro # endif 122bb898558SAl Viro 123bb898558SAl Viro #else /* !VISWS && !VOYAGER */ 124bb898558SAl Viro 125bb898558SAl Viro # define NR_IRQS 224 126bb898558SAl Viro 127bb898558SAl Viro #endif /* VISWS */ 128bb898558SAl Viro 129bb898558SAl Viro /* Voyager specific defines */ 130bb898558SAl Viro /* These define the CPIs we use in linux */ 131bb898558SAl Viro #define VIC_CPI_LEVEL0 0 132bb898558SAl Viro #define VIC_CPI_LEVEL1 1 133bb898558SAl Viro /* now the fake CPIs */ 134bb898558SAl Viro #define VIC_TIMER_CPI 2 135bb898558SAl Viro #define VIC_INVALIDATE_CPI 3 136bb898558SAl Viro #define VIC_RESCHEDULE_CPI 4 137bb898558SAl Viro #define VIC_ENABLE_IRQ_CPI 5 138bb898558SAl Viro #define VIC_CALL_FUNCTION_CPI 6 139bb898558SAl Viro #define VIC_CALL_FUNCTION_SINGLE_CPI 7 140bb898558SAl Viro 141bb898558SAl Viro /* Now the QIC CPIs: Since we don't need the two initial levels, 142bb898558SAl Viro * these are 2 less than the VIC CPIs */ 143bb898558SAl Viro #define QIC_CPI_OFFSET 1 144bb898558SAl Viro #define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET) 145bb898558SAl Viro #define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET) 146bb898558SAl Viro #define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET) 147bb898558SAl Viro #define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET) 148bb898558SAl Viro #define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET) 149bb898558SAl Viro #define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET) 150bb898558SAl Viro 151bb898558SAl Viro #define VIC_START_FAKE_CPI VIC_TIMER_CPI 152bb898558SAl Viro #define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI 153bb898558SAl Viro 154bb898558SAl Viro /* this is the SYS_INT CPI. */ 155bb898558SAl Viro #define VIC_SYS_INT 8 156bb898558SAl Viro #define VIC_CMN_INT 15 157bb898558SAl Viro 158bb898558SAl Viro /* This is the boot CPI for alternate processors. It gets overwritten 159bb898558SAl Viro * by the above once the system has activated all available processors */ 160bb898558SAl Viro #define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0 161bb898558SAl Viro #define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8) 162bb898558SAl Viro 163bb898558SAl Viro 164bb898558SAl Viro #endif /* ASM_X86__IRQ_VECTORS_H */ 165