1 #ifndef _ASM_X86_IRQ_REMAPPING_H 2 #define _ASM_X86_IRQ_REMAPPING_H 3 4 #define IRTE_DEST(dest) ((x2apic_mode) ? dest : dest << 8) 5 6 #ifdef CONFIG_IRQ_REMAP 7 static void irq_remap_modify_chip_defaults(struct irq_chip *chip); 8 static inline void prepare_irte(struct irte *irte, int vector, 9 unsigned int dest) 10 { 11 memset(irte, 0, sizeof(*irte)); 12 13 irte->present = 1; 14 irte->dst_mode = apic->irq_dest_mode; 15 /* 16 * Trigger mode in the IRTE will always be edge, and for IO-APIC, the 17 * actual level or edge trigger will be setup in the IO-APIC 18 * RTE. This will help simplify level triggered irq migration. 19 * For more details, see the comments (in io_apic.c) explainig IO-APIC 20 * irq migration in the presence of interrupt-remapping. 21 */ 22 irte->trigger_mode = 0; 23 irte->dlvry_mode = apic->irq_delivery_mode; 24 irte->vector = vector; 25 irte->dest_id = IRTE_DEST(dest); 26 irte->redir_hint = 1; 27 } 28 static inline bool irq_remapped(struct irq_cfg *cfg) 29 { 30 return cfg->irq_2_iommu.iommu != NULL; 31 } 32 #else 33 static void prepare_irte(struct irte *irte, int vector, unsigned int dest) 34 { 35 } 36 static inline bool irq_remapped(struct irq_cfg *cfg) 37 { 38 return false; 39 } 40 static inline void irq_remap_modify_chip_defaults(struct irq_chip *chip) 41 { 42 } 43 #endif 44 45 #endif /* _ASM_X86_IRQ_REMAPPING_H */ 46