1 #ifndef _ASM_INTEL_DS_H 2 #define _ASM_INTEL_DS_H 3 4 #include <linux/percpu-defs.h> 5 6 #define BTS_BUFFER_SIZE (PAGE_SIZE << 4) 7 #define PEBS_BUFFER_SIZE (PAGE_SIZE << 4) 8 9 /* The maximal number of PEBS events: */ 10 #define MAX_PEBS_EVENTS_FMT4 8 11 #define MAX_PEBS_EVENTS 32 12 #define MAX_FIXED_PEBS_EVENTS 16 13 14 /* 15 * A debug store configuration. 16 * 17 * We only support architectures that use 64bit fields. 18 */ 19 struct debug_store { 20 u64 bts_buffer_base; 21 u64 bts_index; 22 u64 bts_absolute_maximum; 23 u64 bts_interrupt_threshold; 24 u64 pebs_buffer_base; 25 u64 pebs_index; 26 u64 pebs_absolute_maximum; 27 u64 pebs_interrupt_threshold; 28 u64 pebs_event_reset[MAX_PEBS_EVENTS + MAX_FIXED_PEBS_EVENTS]; 29 } __aligned(PAGE_SIZE); 30 31 DECLARE_PER_CPU_PAGE_ALIGNED(struct debug_store, cpu_debug_store); 32 33 struct debug_store_buffers { 34 char bts_buffer[BTS_BUFFER_SIZE]; 35 char pebs_buffer[PEBS_BUFFER_SIZE]; 36 }; 37 38 #endif 39