1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Intel MID specific setup code 4 * 5 * (C) Copyright 2009, 2021 Intel Corporation 6 */ 7 #ifndef _ASM_X86_INTEL_MID_H 8 #define _ASM_X86_INTEL_MID_H 9 10 #include <linux/pci.h> 11 12 extern int intel_mid_pci_init(void); 13 extern int intel_mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state); 14 extern pci_power_t intel_mid_pci_get_power_state(struct pci_dev *pdev); 15 16 extern void intel_mid_pwr_power_off(void); 17 18 #define INTEL_MID_PWR_LSS_OFFSET 4 19 #define INTEL_MID_PWR_LSS_TYPE (1 << 7) 20 21 extern int intel_mid_pwr_get_lss_id(struct pci_dev *pdev); 22 23 #ifdef CONFIG_X86_INTEL_MID 24 25 extern void intel_scu_devices_create(void); 26 extern void intel_scu_devices_destroy(void); 27 28 #else /* !CONFIG_X86_INTEL_MID */ 29 30 static inline void intel_scu_devices_create(void) { } 31 static inline void intel_scu_devices_destroy(void) { } 32 33 #endif /* !CONFIG_X86_INTEL_MID */ 34 35 /* Bus Select SoC Fuse value */ 36 #define BSEL_SOC_FUSE_MASK 0x7 37 /* FSB 133MHz */ 38 #define BSEL_SOC_FUSE_001 0x1 39 /* FSB 100MHz */ 40 #define BSEL_SOC_FUSE_101 0x5 41 /* FSB 83MHz */ 42 #define BSEL_SOC_FUSE_111 0x7 43 44 #endif /* _ASM_X86_INTEL_MID_H */ 45