1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2970442c5SDave Hansen #ifndef _ASM_X86_INTEL_FAMILY_H 3970442c5SDave Hansen #define _ASM_X86_INTEL_FAMILY_H 4970442c5SDave Hansen 5970442c5SDave Hansen /* 6970442c5SDave Hansen * "Big Core" Processors (Branded as Core, Xeon, etc...) 7970442c5SDave Hansen * 8850eb9fbSRajneesh Bhardwaj * While adding a new CPUID for a new microarchitecture, add a new 9850eb9fbSRajneesh Bhardwaj * group to keep logically sorted out in chronological order. Within 10850eb9fbSRajneesh Bhardwaj * that group keep the CPUID for the variants sorted by model number. 1112ece2d5STony Luck * 1212ece2d5STony Luck * The defined symbol names have the following form: 1312ece2d5STony Luck * INTEL_FAM6{OPTFAMILY}_{MICROARCH}{OPTDIFF} 1412ece2d5STony Luck * where: 1512ece2d5STony Luck * OPTFAMILY Describes the family of CPUs that this belongs to. Default 1612ece2d5STony Luck * is assumed to be "_CORE" (and should be omitted). Other values 1712ece2d5STony Luck * currently in use are _ATOM and _XEON_PHI 1812ece2d5STony Luck * MICROARCH Is the code name for the micro-architecture for this core. 1912ece2d5STony Luck * N.B. Not the platform name. 2012ece2d5STony Luck * OPTDIFF If needed, a short string to differentiate by market segment. 21a3d8c0d1SPeter Zijlstra * 22a3d8c0d1SPeter Zijlstra * Common OPTDIFFs: 23a3d8c0d1SPeter Zijlstra * 24a3d8c0d1SPeter Zijlstra * - regular client parts 25a3d8c0d1SPeter Zijlstra * _L - regular mobile parts 26a3d8c0d1SPeter Zijlstra * _G - parts with extra graphics on 27a3d8c0d1SPeter Zijlstra * _X - regular server parts 28a3d8c0d1SPeter Zijlstra * _D - micro server parts 293ccce934STony Luck * _N,_P - other mobile parts 30*ea902bccSTony Luck * _S - other client parts 31a3d8c0d1SPeter Zijlstra * 32a3d8c0d1SPeter Zijlstra * Historical OPTDIFFs: 33a3d8c0d1SPeter Zijlstra * 34a3d8c0d1SPeter Zijlstra * _EP - 2 socket server parts 35a3d8c0d1SPeter Zijlstra * _EX - 4+ socket server parts 3612ece2d5STony Luck * 3753375a5aSPeter Zijlstra * The #define line may optionally include a comment including platform or core 3899cb64deSAndrew Cooper * names. An exception is made for skylake/kabylake where steppings seem to have gotten 3953375a5aSPeter Zijlstra * their own names :-( 40970442c5SDave Hansen */ 41970442c5SDave Hansen 4220d43744SThomas Gleixner /* Wildcard match for FAM6 so X86_MATCH_INTEL_FAM6_MODEL(ANY) works */ 4320d43744SThomas Gleixner #define INTEL_FAM6_ANY X86_MODEL_ANY 4420d43744SThomas Gleixner 45970442c5SDave Hansen #define INTEL_FAM6_CORE_YONAH 0x0E 46c238f234SAndy Shevchenko 47970442c5SDave Hansen #define INTEL_FAM6_CORE2_MEROM 0x0F 48970442c5SDave Hansen #define INTEL_FAM6_CORE2_MEROM_L 0x16 49970442c5SDave Hansen #define INTEL_FAM6_CORE2_PENRYN 0x17 50970442c5SDave Hansen #define INTEL_FAM6_CORE2_DUNNINGTON 0x1D 51970442c5SDave Hansen 52970442c5SDave Hansen #define INTEL_FAM6_NEHALEM 0x1E 534b3b234fSDave Hansen #define INTEL_FAM6_NEHALEM_G 0x1F /* Auburndale / Havendale */ 54970442c5SDave Hansen #define INTEL_FAM6_NEHALEM_EP 0x1A 55970442c5SDave Hansen #define INTEL_FAM6_NEHALEM_EX 0x2E 56c238f234SAndy Shevchenko 57970442c5SDave Hansen #define INTEL_FAM6_WESTMERE 0x25 58970442c5SDave Hansen #define INTEL_FAM6_WESTMERE_EP 0x2C 59970442c5SDave Hansen #define INTEL_FAM6_WESTMERE_EX 0x2F 60970442c5SDave Hansen 61970442c5SDave Hansen #define INTEL_FAM6_SANDYBRIDGE 0x2A 62970442c5SDave Hansen #define INTEL_FAM6_SANDYBRIDGE_X 0x2D 63970442c5SDave Hansen #define INTEL_FAM6_IVYBRIDGE 0x3A 64970442c5SDave Hansen #define INTEL_FAM6_IVYBRIDGE_X 0x3E 65970442c5SDave Hansen 66c66f78a6SPeter Zijlstra #define INTEL_FAM6_HASWELL 0x3C 67970442c5SDave Hansen #define INTEL_FAM6_HASWELL_X 0x3F 68af239c44SPeter Zijlstra #define INTEL_FAM6_HASWELL_L 0x45 695e741407SPeter Zijlstra #define INTEL_FAM6_HASWELL_G 0x46 70970442c5SDave Hansen 71c66f78a6SPeter Zijlstra #define INTEL_FAM6_BROADWELL 0x3D 725e741407SPeter Zijlstra #define INTEL_FAM6_BROADWELL_G 0x47 73970442c5SDave Hansen #define INTEL_FAM6_BROADWELL_X 0x4F 745ebb34edSPeter Zijlstra #define INTEL_FAM6_BROADWELL_D 0x56 75970442c5SDave Hansen 7653375a5aSPeter Zijlstra #define INTEL_FAM6_SKYLAKE_L 0x4E /* Sky Lake */ 7753375a5aSPeter Zijlstra #define INTEL_FAM6_SKYLAKE 0x5E /* Sky Lake */ 7853375a5aSPeter Zijlstra #define INTEL_FAM6_SKYLAKE_X 0x55 /* Sky Lake */ 7999cb64deSAndrew Cooper /* CASCADELAKE_X 0x55 Sky Lake -- s: 7 */ 8099cb64deSAndrew Cooper /* COOPERLAKE_X 0x55 Sky Lake -- s: 11 */ 81970442c5SDave Hansen 8253375a5aSPeter Zijlstra #define INTEL_FAM6_KABYLAKE_L 0x8E /* Sky Lake */ 8353375a5aSPeter Zijlstra /* AMBERLAKE_L 0x8E Sky Lake -- s: 9 */ 8453375a5aSPeter Zijlstra /* COFFEELAKE_L 0x8E Sky Lake -- s: 10 */ 8553375a5aSPeter Zijlstra /* WHISKEYLAKE_L 0x8E Sky Lake -- s: 11,12 */ 86850eb9fbSRajneesh Bhardwaj 8753375a5aSPeter Zijlstra #define INTEL_FAM6_KABYLAKE 0x9E /* Sky Lake */ 8853375a5aSPeter Zijlstra /* COFFEELAKE 0x9E Sky Lake -- s: 10-13 */ 898cd8f0ceSRajneesh Bhardwaj 9053375a5aSPeter Zijlstra #define INTEL_FAM6_COMETLAKE 0xA5 /* Sky Lake */ 9153375a5aSPeter Zijlstra #define INTEL_FAM6_COMETLAKE_L 0xA6 /* Sky Lake */ 926e1c32c5SGayatri Kammela 9353375a5aSPeter Zijlstra #define INTEL_FAM6_CANNONLAKE_L 0x66 /* Palm Cove */ 948d7c6ac3SKan Liang 9553375a5aSPeter Zijlstra #define INTEL_FAM6_ICELAKE_X 0x6A /* Sunny Cove */ 9653375a5aSPeter Zijlstra #define INTEL_FAM6_ICELAKE_D 0x6C /* Sunny Cove */ 9753375a5aSPeter Zijlstra #define INTEL_FAM6_ICELAKE 0x7D /* Sunny Cove */ 9853375a5aSPeter Zijlstra #define INTEL_FAM6_ICELAKE_L 0x7E /* Sunny Cove */ 9953375a5aSPeter Zijlstra #define INTEL_FAM6_ICELAKE_NNPI 0x9D /* Sunny Cove */ 100e00b62f0STony Luck 10153375a5aSPeter Zijlstra #define INTEL_FAM6_LAKEFIELD 0x8A /* Sunny Cove / Tremont */ 102be25d1b5STony Luck 10353375a5aSPeter Zijlstra #define INTEL_FAM6_ROCKETLAKE 0xA7 /* Cypress Cove */ 104e00b62f0STony Luck 10553375a5aSPeter Zijlstra #define INTEL_FAM6_TIGERLAKE_L 0x8C /* Willow Cove */ 10653375a5aSPeter Zijlstra #define INTEL_FAM6_TIGERLAKE 0x8D /* Willow Cove */ 10728188cc4SAndi Kleen 10828188cc4SAndi Kleen #define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Golden Cove */ 10953375a5aSPeter Zijlstra 11053375a5aSPeter Zijlstra #define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */ 11153375a5aSPeter Zijlstra #define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */ 1123ccce934STony Luck #define INTEL_FAM6_ALDERLAKE_N 0xBE 113e00b62f0STony Luck 1147d697f0dSTony Luck #define INTEL_FAM6_RAPTORLAKE 0xB7 1153ccce934STony Luck #define INTEL_FAM6_RAPTORLAKE_P 0xBA 116*ea902bccSTony Luck #define INTEL_FAM6_RAPTORLAKE_S 0xBF 117fbdb5e8fSTony Luck 118970442c5SDave Hansen /* "Small Core" Processors (Atom) */ 119970442c5SDave Hansen 120f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ 121f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_BONNELL_MID 0x26 /* Silverthorne, Lincroft */ 122f2c4db1bSPeter Zijlstra 123f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SALTWELL 0x36 /* Cedarview */ 124f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SALTWELL_MID 0x27 /* Penwell */ 125f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SALTWELL_TABLET 0x35 /* Cloverview */ 126f2c4db1bSPeter Zijlstra 127f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SILVERMONT 0x37 /* Bay Trail, Valleyview */ 1285ebb34edSPeter Zijlstra #define INTEL_FAM6_ATOM_SILVERMONT_D 0x4D /* Avaton, Rangely */ 129f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SILVERMONT_MID 0x4A /* Merriefield */ 130f2c4db1bSPeter Zijlstra 131f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_AIRMONT 0x4C /* Cherry Trail, Braswell */ 132f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_AIRMONT_MID 0x5A /* Moorefield */ 133855fa1f3SRahul Tanwar #define INTEL_FAM6_ATOM_AIRMONT_NP 0x75 /* Lightning Mountain */ 134f2c4db1bSPeter Zijlstra 135f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */ 1365ebb34edSPeter Zijlstra #define INTEL_FAM6_ATOM_GOLDMONT_D 0x5F /* Denverton */ 137a3d8c0d1SPeter Zijlstra 138a3d8c0d1SPeter Zijlstra /* Note: the micro-architecture is "Goldmont Plus" */ 139f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */ 1400a05fa67SAndy Shevchenko 1415ebb34edSPeter Zijlstra #define INTEL_FAM6_ATOM_TREMONT_D 0x86 /* Jacobsville */ 1420f65605aSGayatri Kammela #define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */ 143b2d32af0SZhang Rui #define INTEL_FAM6_ATOM_TREMONT_L 0x9C /* Jasper Lake */ 144970442c5SDave Hansen 145970442c5SDave Hansen /* Xeon Phi */ 146970442c5SDave Hansen 147970442c5SDave Hansen #define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */ 1480047f598SPiotr Luc #define INTEL_FAM6_XEON_PHI_KNM 0x85 /* Knights Mill */ 149970442c5SDave Hansen 15020d43744SThomas Gleixner /* Family 5 */ 15120d43744SThomas Gleixner #define INTEL_FAM5_QUARK_X1000 0x09 /* Quark X1000 SoC */ 15220d43744SThomas Gleixner 153970442c5SDave Hansen #endif /* _ASM_X86_INTEL_FAMILY_H */ 154