1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2970442c5SDave Hansen #ifndef _ASM_X86_INTEL_FAMILY_H 3970442c5SDave Hansen #define _ASM_X86_INTEL_FAMILY_H 4970442c5SDave Hansen 5970442c5SDave Hansen /* 6970442c5SDave Hansen * "Big Core" Processors (Branded as Core, Xeon, etc...) 7970442c5SDave Hansen * 8850eb9fbSRajneesh Bhardwaj * While adding a new CPUID for a new microarchitecture, add a new 9850eb9fbSRajneesh Bhardwaj * group to keep logically sorted out in chronological order. Within 10850eb9fbSRajneesh Bhardwaj * that group keep the CPUID for the variants sorted by model number. 1112ece2d5STony Luck * 1212ece2d5STony Luck * The defined symbol names have the following form: 1312ece2d5STony Luck * INTEL_FAM6{OPTFAMILY}_{MICROARCH}{OPTDIFF} 1412ece2d5STony Luck * where: 1512ece2d5STony Luck * OPTFAMILY Describes the family of CPUs that this belongs to. Default 1612ece2d5STony Luck * is assumed to be "_CORE" (and should be omitted). Other values 1712ece2d5STony Luck * currently in use are _ATOM and _XEON_PHI 1812ece2d5STony Luck * MICROARCH Is the code name for the micro-architecture for this core. 1912ece2d5STony Luck * N.B. Not the platform name. 2012ece2d5STony Luck * OPTDIFF If needed, a short string to differentiate by market segment. 21a3d8c0d1SPeter Zijlstra * 22a3d8c0d1SPeter Zijlstra * Common OPTDIFFs: 23a3d8c0d1SPeter Zijlstra * 24a3d8c0d1SPeter Zijlstra * - regular client parts 25a3d8c0d1SPeter Zijlstra * _L - regular mobile parts 26a3d8c0d1SPeter Zijlstra * _G - parts with extra graphics on 27a3d8c0d1SPeter Zijlstra * _X - regular server parts 28a3d8c0d1SPeter Zijlstra * _D - micro server parts 29a3d8c0d1SPeter Zijlstra * 30a3d8c0d1SPeter Zijlstra * Historical OPTDIFFs: 31a3d8c0d1SPeter Zijlstra * 32a3d8c0d1SPeter Zijlstra * _EP - 2 socket server parts 33a3d8c0d1SPeter Zijlstra * _EX - 4+ socket server parts 3412ece2d5STony Luck * 3512ece2d5STony Luck * The #define line may optionally include a comment including platform names. 36970442c5SDave Hansen */ 37970442c5SDave Hansen 38970442c5SDave Hansen #define INTEL_FAM6_CORE_YONAH 0x0E 39c238f234SAndy Shevchenko 40970442c5SDave Hansen #define INTEL_FAM6_CORE2_MEROM 0x0F 41970442c5SDave Hansen #define INTEL_FAM6_CORE2_MEROM_L 0x16 42970442c5SDave Hansen #define INTEL_FAM6_CORE2_PENRYN 0x17 43970442c5SDave Hansen #define INTEL_FAM6_CORE2_DUNNINGTON 0x1D 44970442c5SDave Hansen 45970442c5SDave Hansen #define INTEL_FAM6_NEHALEM 0x1E 464b3b234fSDave Hansen #define INTEL_FAM6_NEHALEM_G 0x1F /* Auburndale / Havendale */ 47970442c5SDave Hansen #define INTEL_FAM6_NEHALEM_EP 0x1A 48970442c5SDave Hansen #define INTEL_FAM6_NEHALEM_EX 0x2E 49c238f234SAndy Shevchenko 50970442c5SDave Hansen #define INTEL_FAM6_WESTMERE 0x25 51970442c5SDave Hansen #define INTEL_FAM6_WESTMERE_EP 0x2C 52970442c5SDave Hansen #define INTEL_FAM6_WESTMERE_EX 0x2F 53970442c5SDave Hansen 54970442c5SDave Hansen #define INTEL_FAM6_SANDYBRIDGE 0x2A 55970442c5SDave Hansen #define INTEL_FAM6_SANDYBRIDGE_X 0x2D 56970442c5SDave Hansen #define INTEL_FAM6_IVYBRIDGE 0x3A 57970442c5SDave Hansen #define INTEL_FAM6_IVYBRIDGE_X 0x3E 58970442c5SDave Hansen 59c66f78a6SPeter Zijlstra #define INTEL_FAM6_HASWELL 0x3C 60970442c5SDave Hansen #define INTEL_FAM6_HASWELL_X 0x3F 61af239c44SPeter Zijlstra #define INTEL_FAM6_HASWELL_L 0x45 625e741407SPeter Zijlstra #define INTEL_FAM6_HASWELL_G 0x46 63970442c5SDave Hansen 64c66f78a6SPeter Zijlstra #define INTEL_FAM6_BROADWELL 0x3D 655e741407SPeter Zijlstra #define INTEL_FAM6_BROADWELL_G 0x47 66970442c5SDave Hansen #define INTEL_FAM6_BROADWELL_X 0x4F 675ebb34edSPeter Zijlstra #define INTEL_FAM6_BROADWELL_D 0x56 68970442c5SDave Hansen 69af239c44SPeter Zijlstra #define INTEL_FAM6_SKYLAKE_L 0x4E 70c66f78a6SPeter Zijlstra #define INTEL_FAM6_SKYLAKE 0x5E 71970442c5SDave Hansen #define INTEL_FAM6_SKYLAKE_X 0x55 72af239c44SPeter Zijlstra #define INTEL_FAM6_KABYLAKE_L 0x8E 73c66f78a6SPeter Zijlstra #define INTEL_FAM6_KABYLAKE 0x9E 74970442c5SDave Hansen 75af239c44SPeter Zijlstra #define INTEL_FAM6_CANNONLAKE_L 0x66 76850eb9fbSRajneesh Bhardwaj 77e35faeb6SKan Liang #define INTEL_FAM6_ICELAKE_X 0x6A 785ebb34edSPeter Zijlstra #define INTEL_FAM6_ICELAKE_D 0x6C 79c66f78a6SPeter Zijlstra #define INTEL_FAM6_ICELAKE 0x7D 80af239c44SPeter Zijlstra #define INTEL_FAM6_ICELAKE_L 0x7E 81e32d045cSRajneesh Bhardwaj #define INTEL_FAM6_ICELAKE_NNPI 0x9D 828cd8f0ceSRajneesh Bhardwaj 836e1c32c5SGayatri Kammela #define INTEL_FAM6_TIGERLAKE_L 0x8C 846e1c32c5SGayatri Kammela #define INTEL_FAM6_TIGERLAKE 0x8D 856e1c32c5SGayatri Kammela 86970442c5SDave Hansen /* "Small Core" Processors (Atom) */ 87970442c5SDave Hansen 88f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ 89f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_BONNELL_MID 0x26 /* Silverthorne, Lincroft */ 90f2c4db1bSPeter Zijlstra 91f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SALTWELL 0x36 /* Cedarview */ 92f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SALTWELL_MID 0x27 /* Penwell */ 93f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SALTWELL_TABLET 0x35 /* Cloverview */ 94f2c4db1bSPeter Zijlstra 95f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SILVERMONT 0x37 /* Bay Trail, Valleyview */ 965ebb34edSPeter Zijlstra #define INTEL_FAM6_ATOM_SILVERMONT_D 0x4D /* Avaton, Rangely */ 97f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SILVERMONT_MID 0x4A /* Merriefield */ 98f2c4db1bSPeter Zijlstra 99f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_AIRMONT 0x4C /* Cherry Trail, Braswell */ 100f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_AIRMONT_MID 0x5A /* Moorefield */ 101855fa1f3SRahul Tanwar #define INTEL_FAM6_ATOM_AIRMONT_NP 0x75 /* Lightning Mountain */ 102f2c4db1bSPeter Zijlstra 103f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */ 1045ebb34edSPeter Zijlstra #define INTEL_FAM6_ATOM_GOLDMONT_D 0x5F /* Denverton */ 105a3d8c0d1SPeter Zijlstra 106a3d8c0d1SPeter Zijlstra /* Note: the micro-architecture is "Goldmont Plus" */ 107f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */ 1080a05fa67SAndy Shevchenko 1095ebb34edSPeter Zijlstra #define INTEL_FAM6_ATOM_TREMONT_D 0x86 /* Jacobsville */ 1100f65605aSGayatri Kammela #define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */ 111970442c5SDave Hansen 112970442c5SDave Hansen /* Xeon Phi */ 113970442c5SDave Hansen 114970442c5SDave Hansen #define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */ 1150047f598SPiotr Luc #define INTEL_FAM6_XEON_PHI_KNM 0x85 /* Knights Mill */ 116970442c5SDave Hansen 117e2ce67b2SAndy Shevchenko /* Useful macros */ 118e2ce67b2SAndy Shevchenko #define INTEL_CPU_FAM_ANY(_family, _model, _driver_data) \ 119e2ce67b2SAndy Shevchenko { \ 120e2ce67b2SAndy Shevchenko .vendor = X86_VENDOR_INTEL, \ 121e2ce67b2SAndy Shevchenko .family = _family, \ 122e2ce67b2SAndy Shevchenko .model = _model, \ 123e2ce67b2SAndy Shevchenko .feature = X86_FEATURE_ANY, \ 124e2ce67b2SAndy Shevchenko .driver_data = (kernel_ulong_t)&_driver_data \ 125e2ce67b2SAndy Shevchenko } 126e2ce67b2SAndy Shevchenko 127e2ce67b2SAndy Shevchenko #define INTEL_CPU_FAM6(_model, _driver_data) \ 128e2ce67b2SAndy Shevchenko INTEL_CPU_FAM_ANY(6, INTEL_FAM6_##_model, _driver_data) 129e2ce67b2SAndy Shevchenko 130970442c5SDave Hansen #endif /* _ASM_X86_INTEL_FAMILY_H */ 131