1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2970442c5SDave Hansen #ifndef _ASM_X86_INTEL_FAMILY_H 3970442c5SDave Hansen #define _ASM_X86_INTEL_FAMILY_H 4970442c5SDave Hansen 5970442c5SDave Hansen /* 6970442c5SDave Hansen * "Big Core" Processors (Branded as Core, Xeon, etc...) 7970442c5SDave Hansen * 8850eb9fbSRajneesh Bhardwaj * While adding a new CPUID for a new microarchitecture, add a new 9850eb9fbSRajneesh Bhardwaj * group to keep logically sorted out in chronological order. Within 10850eb9fbSRajneesh Bhardwaj * that group keep the CPUID for the variants sorted by model number. 1112ece2d5STony Luck * 1212ece2d5STony Luck * The defined symbol names have the following form: 1312ece2d5STony Luck * INTEL_FAM6{OPTFAMILY}_{MICROARCH}{OPTDIFF} 1412ece2d5STony Luck * where: 1512ece2d5STony Luck * OPTFAMILY Describes the family of CPUs that this belongs to. Default 1612ece2d5STony Luck * is assumed to be "_CORE" (and should be omitted). Other values 1712ece2d5STony Luck * currently in use are _ATOM and _XEON_PHI 1812ece2d5STony Luck * MICROARCH Is the code name for the micro-architecture for this core. 1912ece2d5STony Luck * N.B. Not the platform name. 2012ece2d5STony Luck * OPTDIFF If needed, a short string to differentiate by market segment. 21a3d8c0d1SPeter Zijlstra * 22a3d8c0d1SPeter Zijlstra * Common OPTDIFFs: 23a3d8c0d1SPeter Zijlstra * 24a3d8c0d1SPeter Zijlstra * - regular client parts 25a3d8c0d1SPeter Zijlstra * _L - regular mobile parts 26a3d8c0d1SPeter Zijlstra * _G - parts with extra graphics on 27a3d8c0d1SPeter Zijlstra * _X - regular server parts 28a3d8c0d1SPeter Zijlstra * _D - micro server parts 29a3d8c0d1SPeter Zijlstra * 30a3d8c0d1SPeter Zijlstra * Historical OPTDIFFs: 31a3d8c0d1SPeter Zijlstra * 32a3d8c0d1SPeter Zijlstra * _EP - 2 socket server parts 33a3d8c0d1SPeter Zijlstra * _EX - 4+ socket server parts 3412ece2d5STony Luck * 3512ece2d5STony Luck * The #define line may optionally include a comment including platform names. 36970442c5SDave Hansen */ 37970442c5SDave Hansen 3820d43744SThomas Gleixner /* Wildcard match for FAM6 so X86_MATCH_INTEL_FAM6_MODEL(ANY) works */ 3920d43744SThomas Gleixner #define INTEL_FAM6_ANY X86_MODEL_ANY 4020d43744SThomas Gleixner 41970442c5SDave Hansen #define INTEL_FAM6_CORE_YONAH 0x0E 42c238f234SAndy Shevchenko 43970442c5SDave Hansen #define INTEL_FAM6_CORE2_MEROM 0x0F 44970442c5SDave Hansen #define INTEL_FAM6_CORE2_MEROM_L 0x16 45970442c5SDave Hansen #define INTEL_FAM6_CORE2_PENRYN 0x17 46970442c5SDave Hansen #define INTEL_FAM6_CORE2_DUNNINGTON 0x1D 47970442c5SDave Hansen 48970442c5SDave Hansen #define INTEL_FAM6_NEHALEM 0x1E 494b3b234fSDave Hansen #define INTEL_FAM6_NEHALEM_G 0x1F /* Auburndale / Havendale */ 50970442c5SDave Hansen #define INTEL_FAM6_NEHALEM_EP 0x1A 51970442c5SDave Hansen #define INTEL_FAM6_NEHALEM_EX 0x2E 52c238f234SAndy Shevchenko 53970442c5SDave Hansen #define INTEL_FAM6_WESTMERE 0x25 54970442c5SDave Hansen #define INTEL_FAM6_WESTMERE_EP 0x2C 55970442c5SDave Hansen #define INTEL_FAM6_WESTMERE_EX 0x2F 56970442c5SDave Hansen 57970442c5SDave Hansen #define INTEL_FAM6_SANDYBRIDGE 0x2A 58970442c5SDave Hansen #define INTEL_FAM6_SANDYBRIDGE_X 0x2D 59970442c5SDave Hansen #define INTEL_FAM6_IVYBRIDGE 0x3A 60970442c5SDave Hansen #define INTEL_FAM6_IVYBRIDGE_X 0x3E 61970442c5SDave Hansen 62c66f78a6SPeter Zijlstra #define INTEL_FAM6_HASWELL 0x3C 63970442c5SDave Hansen #define INTEL_FAM6_HASWELL_X 0x3F 64af239c44SPeter Zijlstra #define INTEL_FAM6_HASWELL_L 0x45 655e741407SPeter Zijlstra #define INTEL_FAM6_HASWELL_G 0x46 66970442c5SDave Hansen 67c66f78a6SPeter Zijlstra #define INTEL_FAM6_BROADWELL 0x3D 685e741407SPeter Zijlstra #define INTEL_FAM6_BROADWELL_G 0x47 69970442c5SDave Hansen #define INTEL_FAM6_BROADWELL_X 0x4F 705ebb34edSPeter Zijlstra #define INTEL_FAM6_BROADWELL_D 0x56 71970442c5SDave Hansen 72af239c44SPeter Zijlstra #define INTEL_FAM6_SKYLAKE_L 0x4E 73c66f78a6SPeter Zijlstra #define INTEL_FAM6_SKYLAKE 0x5E 74970442c5SDave Hansen #define INTEL_FAM6_SKYLAKE_X 0x55 75af239c44SPeter Zijlstra #define INTEL_FAM6_KABYLAKE_L 0x8E 76c66f78a6SPeter Zijlstra #define INTEL_FAM6_KABYLAKE 0x9E 77970442c5SDave Hansen 78af239c44SPeter Zijlstra #define INTEL_FAM6_CANNONLAKE_L 0x66 79850eb9fbSRajneesh Bhardwaj 80e35faeb6SKan Liang #define INTEL_FAM6_ICELAKE_X 0x6A 815ebb34edSPeter Zijlstra #define INTEL_FAM6_ICELAKE_D 0x6C 82c66f78a6SPeter Zijlstra #define INTEL_FAM6_ICELAKE 0x7D 83af239c44SPeter Zijlstra #define INTEL_FAM6_ICELAKE_L 0x7E 84e32d045cSRajneesh Bhardwaj #define INTEL_FAM6_ICELAKE_NNPI 0x9D 858cd8f0ceSRajneesh Bhardwaj 866e1c32c5SGayatri Kammela #define INTEL_FAM6_TIGERLAKE_L 0x8C 876e1c32c5SGayatri Kammela #define INTEL_FAM6_TIGERLAKE 0x8D 886e1c32c5SGayatri Kammela 898d7c6ac3SKan Liang #define INTEL_FAM6_COMETLAKE 0xA5 908d7c6ac3SKan Liang #define INTEL_FAM6_COMETLAKE_L 0xA6 918d7c6ac3SKan Liang 92970442c5SDave Hansen /* "Small Core" Processors (Atom) */ 93970442c5SDave Hansen 94f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ 95f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_BONNELL_MID 0x26 /* Silverthorne, Lincroft */ 96f2c4db1bSPeter Zijlstra 97f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SALTWELL 0x36 /* Cedarview */ 98f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SALTWELL_MID 0x27 /* Penwell */ 99f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SALTWELL_TABLET 0x35 /* Cloverview */ 100f2c4db1bSPeter Zijlstra 101f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SILVERMONT 0x37 /* Bay Trail, Valleyview */ 1025ebb34edSPeter Zijlstra #define INTEL_FAM6_ATOM_SILVERMONT_D 0x4D /* Avaton, Rangely */ 103f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_SILVERMONT_MID 0x4A /* Merriefield */ 104f2c4db1bSPeter Zijlstra 105f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_AIRMONT 0x4C /* Cherry Trail, Braswell */ 106f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_AIRMONT_MID 0x5A /* Moorefield */ 107855fa1f3SRahul Tanwar #define INTEL_FAM6_ATOM_AIRMONT_NP 0x75 /* Lightning Mountain */ 108f2c4db1bSPeter Zijlstra 109f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */ 1105ebb34edSPeter Zijlstra #define INTEL_FAM6_ATOM_GOLDMONT_D 0x5F /* Denverton */ 111a3d8c0d1SPeter Zijlstra 112a3d8c0d1SPeter Zijlstra /* Note: the micro-architecture is "Goldmont Plus" */ 113f2c4db1bSPeter Zijlstra #define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */ 1140a05fa67SAndy Shevchenko 1155ebb34edSPeter Zijlstra #define INTEL_FAM6_ATOM_TREMONT_D 0x86 /* Jacobsville */ 1160f65605aSGayatri Kammela #define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */ 117b2d32af0SZhang Rui #define INTEL_FAM6_ATOM_TREMONT_L 0x9C /* Jasper Lake */ 118970442c5SDave Hansen 119970442c5SDave Hansen /* Xeon Phi */ 120970442c5SDave Hansen 121970442c5SDave Hansen #define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */ 1220047f598SPiotr Luc #define INTEL_FAM6_XEON_PHI_KNM 0x85 /* Knights Mill */ 123970442c5SDave Hansen 12420d43744SThomas Gleixner /* Family 5 */ 12520d43744SThomas Gleixner #define INTEL_FAM5_QUARK_X1000 0x09 /* Quark X1000 SoC */ 12620d43744SThomas Gleixner 127e2ce67b2SAndy Shevchenko /* Useful macros */ 128e2ce67b2SAndy Shevchenko #define INTEL_CPU_FAM_ANY(_family, _model, _driver_data) \ 129e2ce67b2SAndy Shevchenko { \ 130e2ce67b2SAndy Shevchenko .vendor = X86_VENDOR_INTEL, \ 131e2ce67b2SAndy Shevchenko .family = _family, \ 132e2ce67b2SAndy Shevchenko .model = _model, \ 133e2ce67b2SAndy Shevchenko .feature = X86_FEATURE_ANY, \ 134e2ce67b2SAndy Shevchenko .driver_data = (kernel_ulong_t)&_driver_data \ 135e2ce67b2SAndy Shevchenko } 136e2ce67b2SAndy Shevchenko 137e2ce67b2SAndy Shevchenko #define INTEL_CPU_FAM6(_model, _driver_data) \ 138e2ce67b2SAndy Shevchenko INTEL_CPU_FAM_ANY(6, INTEL_FAM6_##_model, _driver_data) 139e2ce67b2SAndy Shevchenko 140970442c5SDave Hansen #endif /* _ASM_X86_INTEL_FAMILY_H */ 141