1 /* 2 * imr.h: Isolated Memory Region API 3 * 4 * Copyright(c) 2013 Intel Corporation. 5 * Copyright(c) 2015 Bryan O'Donoghue <pure.logic@nexus-software.ie> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; version 2 10 * of the License. 11 */ 12 #ifndef _IMR_H 13 #define _IMR_H 14 15 #include <linux/types.h> 16 17 /* 18 * IMR agent access mask bits 19 * See section 12.7.4.7 from quark-x1000-datasheet.pdf for register 20 * definitions. 21 */ 22 #define IMR_ESRAM_FLUSH BIT(31) 23 #define IMR_CPU_SNOOP BIT(30) /* Applicable only to write */ 24 #define IMR_RMU BIT(29) 25 #define IMR_VC1_SAI_ID3 BIT(15) 26 #define IMR_VC1_SAI_ID2 BIT(14) 27 #define IMR_VC1_SAI_ID1 BIT(13) 28 #define IMR_VC1_SAI_ID0 BIT(12) 29 #define IMR_VC0_SAI_ID3 BIT(11) 30 #define IMR_VC0_SAI_ID2 BIT(10) 31 #define IMR_VC0_SAI_ID1 BIT(9) 32 #define IMR_VC0_SAI_ID0 BIT(8) 33 #define IMR_CPU_0 BIT(1) /* SMM mode */ 34 #define IMR_CPU BIT(0) /* Non SMM mode */ 35 #define IMR_ACCESS_NONE 0 36 37 /* 38 * Read/Write access-all bits here include some reserved bits 39 * These are the values firmware uses and are accepted by hardware. 40 * The kernel defines read/write access-all in the same way as firmware 41 * in order to have a consistent and crisp definition across firmware, 42 * bootloader and kernel. 43 */ 44 #define IMR_READ_ACCESS_ALL 0xBFFFFFFF 45 #define IMR_WRITE_ACCESS_ALL 0xFFFFFFFF 46 47 /* Number of IMRs provided by Quark X1000 SoC */ 48 #define QUARK_X1000_IMR_MAX 0x08 49 #define QUARK_X1000_IMR_REGBASE 0x40 50 51 /* IMR alignment bits - only bits 31:10 are checked for IMR validity */ 52 #define IMR_ALIGN 0x400 53 #define IMR_MASK (IMR_ALIGN - 1) 54 55 int imr_add_range(phys_addr_t base, size_t size, 56 unsigned int rmask, unsigned int wmask, bool lock); 57 58 int imr_remove_range(phys_addr_t base, size_t size); 59 60 #endif /* _IMR_H */ 61