1 /* 2 * AMD Geode definitions 3 * Copyright (C) 2006, Advanced Micro Devices, Inc. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of version 2 of the GNU General Public License 7 * as published by the Free Software Foundation. 8 */ 9 10 #ifndef _ASM_X86_GEODE_H 11 #define _ASM_X86_GEODE_H 12 13 #include <asm/processor.h> 14 #include <linux/io.h> 15 16 /* Generic southbridge functions */ 17 18 #define GEODE_DEV_PMS 0 19 #define GEODE_DEV_ACPI 1 20 #define GEODE_DEV_GPIO 2 21 #define GEODE_DEV_MFGPT 3 22 23 extern int geode_get_dev_base(unsigned int dev); 24 25 /* Useful macros */ 26 #define geode_pms_base() geode_get_dev_base(GEODE_DEV_PMS) 27 #define geode_acpi_base() geode_get_dev_base(GEODE_DEV_ACPI) 28 #define geode_gpio_base() geode_get_dev_base(GEODE_DEV_GPIO) 29 #define geode_mfgpt_base() geode_get_dev_base(GEODE_DEV_MFGPT) 30 31 /* MSRS */ 32 33 #define MSR_GLIU_P2D_RO0 0x10000029 34 35 #define MSR_LX_GLD_MSR_CONFIG 0x48002001 36 #define MSR_LX_MSR_PADSEL 0x48002011 /* NOT 0x48000011; the data 37 * sheet has the wrong value */ 38 #define MSR_GLCP_SYS_RSTPLL 0x4C000014 39 #define MSR_GLCP_DOTPLL 0x4C000015 40 41 #define MSR_LBAR_SMB 0x5140000B 42 #define MSR_LBAR_GPIO 0x5140000C 43 #define MSR_LBAR_MFGPT 0x5140000D 44 #define MSR_LBAR_ACPI 0x5140000E 45 #define MSR_LBAR_PMS 0x5140000F 46 47 #define MSR_DIVIL_SOFT_RESET 0x51400017 48 49 #define MSR_PIC_YSEL_LOW 0x51400020 50 #define MSR_PIC_YSEL_HIGH 0x51400021 51 #define MSR_PIC_ZSEL_LOW 0x51400022 52 #define MSR_PIC_ZSEL_HIGH 0x51400023 53 #define MSR_PIC_IRQM_LPC 0x51400025 54 55 #define MSR_MFGPT_IRQ 0x51400028 56 #define MSR_MFGPT_NR 0x51400029 57 #define MSR_MFGPT_SETUP 0x5140002B 58 59 #define MSR_LX_SPARE_MSR 0x80000011 /* DC-specific */ 60 61 #define MSR_GX_GLD_MSR_CONFIG 0xC0002001 62 #define MSR_GX_MSR_PADSEL 0xC0002011 63 64 /* Resource Sizes */ 65 66 #define LBAR_GPIO_SIZE 0xFF 67 #define LBAR_MFGPT_SIZE 0x40 68 #define LBAR_ACPI_SIZE 0x40 69 #define LBAR_PMS_SIZE 0x80 70 71 /* ACPI registers (PMS block) */ 72 73 /* 74 * PM1_EN is only valid when VSA is enabled for 16 bit reads. 75 * When VSA is not enabled, *always* read both PM1_STS and PM1_EN 76 * with a 32 bit read at offset 0x0 77 */ 78 79 #define PM1_STS 0x00 80 #define PM1_EN 0x02 81 #define PM1_CNT 0x08 82 #define PM2_CNT 0x0C 83 #define PM_TMR 0x10 84 #define PM_GPE0_STS 0x18 85 #define PM_GPE0_EN 0x1C 86 87 /* PMC registers (PMS block) */ 88 89 #define PM_SSD 0x00 90 #define PM_SCXA 0x04 91 #define PM_SCYA 0x08 92 #define PM_OUT_SLPCTL 0x0C 93 #define PM_SCLK 0x10 94 #define PM_SED 0x1 95 #define PM_SCXD 0x18 96 #define PM_SCYD 0x1C 97 #define PM_IN_SLPCTL 0x20 98 #define PM_WKD 0x30 99 #define PM_WKXD 0x34 100 #define PM_RD 0x38 101 #define PM_WKXA 0x3C 102 #define PM_FSD 0x40 103 #define PM_TSD 0x44 104 #define PM_PSD 0x48 105 #define PM_NWKD 0x4C 106 #define PM_AWKD 0x50 107 #define PM_SSC 0x54 108 109 /* VSA2 magic values */ 110 111 #define VSA_VRC_INDEX 0xAC1C 112 #define VSA_VRC_DATA 0xAC1E 113 #define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */ 114 #define VSA_VR_SIGNATURE 0x0003 115 #define VSA_VR_MEM_SIZE 0x0200 116 #define AMD_VSA_SIG 0x4132 /* signature is ascii 'VSA2' */ 117 #define GSW_VSA_SIG 0x534d /* General Software signature */ 118 /* GPIO */ 119 120 #define GPIO_OUTPUT_VAL 0x00 121 #define GPIO_OUTPUT_ENABLE 0x04 122 #define GPIO_OUTPUT_OPEN_DRAIN 0x08 123 #define GPIO_OUTPUT_INVERT 0x0C 124 #define GPIO_OUTPUT_AUX1 0x10 125 #define GPIO_OUTPUT_AUX2 0x14 126 #define GPIO_PULL_UP 0x18 127 #define GPIO_PULL_DOWN 0x1C 128 #define GPIO_INPUT_ENABLE 0x20 129 #define GPIO_INPUT_INVERT 0x24 130 #define GPIO_INPUT_FILTER 0x28 131 #define GPIO_INPUT_EVENT_COUNT 0x2C 132 #define GPIO_READ_BACK 0x30 133 #define GPIO_INPUT_AUX1 0x34 134 #define GPIO_EVENTS_ENABLE 0x38 135 #define GPIO_LOCK_ENABLE 0x3C 136 #define GPIO_POSITIVE_EDGE_EN 0x40 137 #define GPIO_NEGATIVE_EDGE_EN 0x44 138 #define GPIO_POSITIVE_EDGE_STS 0x48 139 #define GPIO_NEGATIVE_EDGE_STS 0x4C 140 141 #define GPIO_MAP_X 0xE0 142 #define GPIO_MAP_Y 0xE4 143 #define GPIO_MAP_Z 0xE8 144 #define GPIO_MAP_W 0xEC 145 146 static inline u32 geode_gpio(unsigned int nr) 147 { 148 BUG_ON(nr > 28); 149 return 1 << nr; 150 } 151 152 extern void geode_gpio_set(u32, unsigned int); 153 extern void geode_gpio_clear(u32, unsigned int); 154 extern int geode_gpio_isset(u32, unsigned int); 155 extern void geode_gpio_setup_event(unsigned int, int, int); 156 extern void geode_gpio_set_irq(unsigned int, unsigned int); 157 158 static inline void geode_gpio_event_irq(unsigned int gpio, int pair) 159 { 160 geode_gpio_setup_event(gpio, pair, 0); 161 } 162 163 static inline void geode_gpio_event_pme(unsigned int gpio, int pair) 164 { 165 geode_gpio_setup_event(gpio, pair, 1); 166 } 167 168 /* Specific geode tests */ 169 170 static inline int is_geode_gx(void) 171 { 172 return ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC) && 173 (boot_cpu_data.x86 == 5) && 174 (boot_cpu_data.x86_model == 5)); 175 } 176 177 static inline int is_geode_lx(void) 178 { 179 return ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && 180 (boot_cpu_data.x86 == 5) && 181 (boot_cpu_data.x86_model == 10)); 182 } 183 184 static inline int is_geode(void) 185 { 186 return (is_geode_gx() || is_geode_lx()); 187 } 188 189 #ifdef CONFIG_MGEODE_LX 190 extern int geode_has_vsa2(void); 191 #else 192 static inline int geode_has_vsa2(void) 193 { 194 return 0; 195 } 196 #endif 197 198 /* MFGPTs */ 199 200 #define MFGPT_MAX_TIMERS 8 201 #define MFGPT_TIMER_ANY (-1) 202 203 #define MFGPT_DOMAIN_WORKING 1 204 #define MFGPT_DOMAIN_STANDBY 2 205 #define MFGPT_DOMAIN_ANY (MFGPT_DOMAIN_WORKING | MFGPT_DOMAIN_STANDBY) 206 207 #define MFGPT_CMP1 0 208 #define MFGPT_CMP2 1 209 210 #define MFGPT_EVENT_IRQ 0 211 #define MFGPT_EVENT_NMI 1 212 #define MFGPT_EVENT_RESET 3 213 214 #define MFGPT_REG_CMP1 0 215 #define MFGPT_REG_CMP2 2 216 #define MFGPT_REG_COUNTER 4 217 #define MFGPT_REG_SETUP 6 218 219 #define MFGPT_SETUP_CNTEN (1 << 15) 220 #define MFGPT_SETUP_CMP2 (1 << 14) 221 #define MFGPT_SETUP_CMP1 (1 << 13) 222 #define MFGPT_SETUP_SETUP (1 << 12) 223 #define MFGPT_SETUP_STOPEN (1 << 11) 224 #define MFGPT_SETUP_EXTEN (1 << 10) 225 #define MFGPT_SETUP_REVEN (1 << 5) 226 #define MFGPT_SETUP_CLKSEL (1 << 4) 227 228 static inline void geode_mfgpt_write(int timer, u16 reg, u16 value) 229 { 230 u32 base = geode_get_dev_base(GEODE_DEV_MFGPT); 231 outw(value, base + reg + (timer * 8)); 232 } 233 234 static inline u16 geode_mfgpt_read(int timer, u16 reg) 235 { 236 u32 base = geode_get_dev_base(GEODE_DEV_MFGPT); 237 return inw(base + reg + (timer * 8)); 238 } 239 240 extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable); 241 extern int geode_mfgpt_set_irq(int timer, int cmp, int *irq, int enable); 242 extern int geode_mfgpt_alloc_timer(int timer, int domain); 243 244 #define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1) 245 #define geode_mfgpt_release_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 0) 246 247 #ifdef CONFIG_GEODE_MFGPT_TIMER 248 extern int __init mfgpt_timer_setup(void); 249 #else 250 static inline int mfgpt_timer_setup(void) { return 0; } 251 #endif 252 253 #endif /* _ASM_X86_GEODE_H */ 254