xref: /openbmc/linux/arch/x86/include/asm/gart.h (revision b6dcefde)
1 #ifndef _ASM_X86_GART_H
2 #define _ASM_X86_GART_H
3 
4 #include <asm/e820.h>
5 
6 extern void set_up_gart_resume(u32, u32);
7 
8 extern int fallback_aper_order;
9 extern int fallback_aper_force;
10 extern int fix_aperture;
11 
12 /* PTE bits. */
13 #define GPTE_VALID	1
14 #define GPTE_COHERENT	2
15 
16 /* Aperture control register bits. */
17 #define GARTEN		(1<<0)
18 #define DISGARTCPU	(1<<4)
19 #define DISGARTIO	(1<<5)
20 
21 /* GART cache control register bits. */
22 #define INVGART		(1<<0)
23 #define GARTPTEERR	(1<<1)
24 
25 /* K8 On-cpu GART registers */
26 #define AMD64_GARTAPERTURECTL	0x90
27 #define AMD64_GARTAPERTUREBASE	0x94
28 #define AMD64_GARTTABLEBASE	0x98
29 #define AMD64_GARTCACHECTL	0x9c
30 #define AMD64_GARTEN		(1<<0)
31 
32 #ifdef CONFIG_GART_IOMMU
33 extern int gart_iommu_aperture;
34 extern int gart_iommu_aperture_allowed;
35 extern int gart_iommu_aperture_disabled;
36 
37 extern void early_gart_iommu_check(void);
38 extern int gart_iommu_init(void);
39 extern void __init gart_parse_options(char *);
40 extern void gart_iommu_hole_init(void);
41 
42 #else
43 #define gart_iommu_aperture            0
44 #define gart_iommu_aperture_allowed    0
45 #define gart_iommu_aperture_disabled   1
46 
47 static inline void early_gart_iommu_check(void)
48 {
49 }
50 static inline void gart_parse_options(char *options)
51 {
52 }
53 static inline void gart_iommu_hole_init(void)
54 {
55 }
56 #endif
57 
58 extern int agp_amd64_init(void);
59 
60 static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
61 {
62 	u32 tmp, ctl;
63 
64         /* address of the mappings table */
65         addr >>= 12;
66         tmp = (u32) addr<<4;
67         tmp &= ~0xf;
68         pci_write_config_dword(dev, AMD64_GARTTABLEBASE, tmp);
69 
70         /* Enable GART translation for this hammer. */
71         pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
72         ctl |= GARTEN;
73         ctl &= ~(DISGARTCPU | DISGARTIO);
74         pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
75 }
76 
77 static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
78 {
79 	if (!aper_base)
80 		return 0;
81 
82 	if (aper_base + aper_size > 0x100000000ULL) {
83 		printk(KERN_INFO "Aperture beyond 4GB. Ignoring.\n");
84 		return 0;
85 	}
86 	if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) {
87 		printk(KERN_INFO "Aperture pointing to e820 RAM. Ignoring.\n");
88 		return 0;
89 	}
90 	if (aper_size < min_size) {
91 		printk(KERN_INFO "Aperture too small (%d MB) than (%d MB)\n",
92 				 aper_size>>20, min_size>>20);
93 		return 0;
94 	}
95 
96 	return 1;
97 }
98 
99 #endif /* _ASM_X86_GART_H */
100