xref: /openbmc/linux/arch/x86/include/asm/dma-mapping.h (revision b24413180f5600bcb3bb70fbed5cf186b60864bd)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_DMA_MAPPING_H
3 #define _ASM_X86_DMA_MAPPING_H
4 
5 /*
6  * IOMMU interface. See Documentation/DMA-API-HOWTO.txt and
7  * Documentation/DMA-API.txt for documentation.
8  */
9 
10 #include <linux/kmemcheck.h>
11 #include <linux/scatterlist.h>
12 #include <linux/dma-debug.h>
13 #include <asm/io.h>
14 #include <asm/swiotlb.h>
15 #include <linux/dma-contiguous.h>
16 #include <linux/mem_encrypt.h>
17 
18 #ifdef CONFIG_ISA
19 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(24)
20 #else
21 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(32)
22 #endif
23 
24 extern int iommu_merge;
25 extern struct device x86_dma_fallback_dev;
26 extern int panic_on_overflow;
27 
28 extern const struct dma_map_ops *dma_ops;
29 
30 static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
31 {
32 	return dma_ops;
33 }
34 
35 bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp);
36 #define arch_dma_alloc_attrs arch_dma_alloc_attrs
37 
38 extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
39 					dma_addr_t *dma_addr, gfp_t flag,
40 					unsigned long attrs);
41 
42 extern void dma_generic_free_coherent(struct device *dev, size_t size,
43 				      void *vaddr, dma_addr_t dma_addr,
44 				      unsigned long attrs);
45 
46 #ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */
47 extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size);
48 extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
49 extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);
50 #else
51 
52 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
53 {
54 	if (!dev->dma_mask)
55 		return 0;
56 
57 	return addr + size - 1 <= *dev->dma_mask;
58 }
59 
60 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
61 {
62 	return __sme_set(paddr);
63 }
64 
65 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
66 {
67 	return __sme_clr(daddr);
68 }
69 #endif /* CONFIG_X86_DMA_REMAP */
70 
71 static inline void
72 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
73 	enum dma_data_direction dir)
74 {
75 	flush_write_buffers();
76 }
77 
78 static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
79 						    gfp_t gfp)
80 {
81 	unsigned long dma_mask = 0;
82 
83 	dma_mask = dev->coherent_dma_mask;
84 	if (!dma_mask)
85 		dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32);
86 
87 	return dma_mask;
88 }
89 
90 static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
91 {
92 	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
93 
94 	if (dma_mask <= DMA_BIT_MASK(24))
95 		gfp |= GFP_DMA;
96 #ifdef CONFIG_X86_64
97 	if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
98 		gfp |= GFP_DMA32;
99 #endif
100        return gfp;
101 }
102 
103 #endif
104