1 #ifndef _ASM_X86_DMA_MAPPING_H 2 #define _ASM_X86_DMA_MAPPING_H 3 4 /* 5 * IOMMU interface. See Documentation/DMA-API-HOWTO.txt and 6 * Documentation/DMA-API.txt for documentation. 7 */ 8 9 #include <linux/kmemcheck.h> 10 #include <linux/scatterlist.h> 11 #include <linux/dma-debug.h> 12 #include <linux/dma-attrs.h> 13 #include <asm/io.h> 14 #include <asm/swiotlb.h> 15 #include <asm-generic/dma-coherent.h> 16 #include <linux/dma-contiguous.h> 17 18 #ifdef CONFIG_ISA 19 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(24) 20 #else 21 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(32) 22 #endif 23 24 #define DMA_ERROR_CODE 0 25 26 extern int iommu_merge; 27 extern struct device x86_dma_fallback_dev; 28 extern int panic_on_overflow; 29 30 extern struct dma_map_ops *dma_ops; 31 32 static inline struct dma_map_ops *get_dma_ops(struct device *dev) 33 { 34 #ifndef CONFIG_X86_DEV_DMA_OPS 35 return dma_ops; 36 #else 37 if (unlikely(!dev) || !dev->archdata.dma_ops) 38 return dma_ops; 39 else 40 return dev->archdata.dma_ops; 41 #endif 42 } 43 44 #include <asm-generic/dma-mapping-common.h> 45 46 /* Make sure we keep the same behaviour */ 47 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 48 { 49 struct dma_map_ops *ops = get_dma_ops(dev); 50 if (ops->mapping_error) 51 return ops->mapping_error(dev, dma_addr); 52 53 return (dma_addr == DMA_ERROR_CODE); 54 } 55 56 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 57 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 58 59 extern int dma_supported(struct device *hwdev, u64 mask); 60 extern int dma_set_mask(struct device *dev, u64 mask); 61 62 extern void *dma_generic_alloc_coherent(struct device *dev, size_t size, 63 dma_addr_t *dma_addr, gfp_t flag, 64 struct dma_attrs *attrs); 65 66 extern void dma_generic_free_coherent(struct device *dev, size_t size, 67 void *vaddr, dma_addr_t dma_addr, 68 struct dma_attrs *attrs); 69 70 #ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */ 71 extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size); 72 extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); 73 extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr); 74 #else 75 76 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) 77 { 78 if (!dev->dma_mask) 79 return 0; 80 81 return addr + size - 1 <= *dev->dma_mask; 82 } 83 84 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) 85 { 86 return paddr; 87 } 88 89 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) 90 { 91 return daddr; 92 } 93 #endif /* CONFIG_X86_DMA_REMAP */ 94 95 static inline void 96 dma_cache_sync(struct device *dev, void *vaddr, size_t size, 97 enum dma_data_direction dir) 98 { 99 flush_write_buffers(); 100 } 101 102 static inline unsigned long dma_alloc_coherent_mask(struct device *dev, 103 gfp_t gfp) 104 { 105 unsigned long dma_mask = 0; 106 107 dma_mask = dev->coherent_dma_mask; 108 if (!dma_mask) 109 dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32); 110 111 return dma_mask; 112 } 113 114 static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp) 115 { 116 unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp); 117 118 if (dma_mask <= DMA_BIT_MASK(24)) 119 gfp |= GFP_DMA; 120 #ifdef CONFIG_X86_64 121 if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA)) 122 gfp |= GFP_DMA32; 123 #endif 124 return gfp; 125 } 126 127 #define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) 128 129 static inline void * 130 dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 131 gfp_t gfp, struct dma_attrs *attrs) 132 { 133 struct dma_map_ops *ops = get_dma_ops(dev); 134 void *memory; 135 136 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); 137 138 if (dma_alloc_from_coherent(dev, size, dma_handle, &memory)) 139 return memory; 140 141 if (!dev) 142 dev = &x86_dma_fallback_dev; 143 144 if (!is_device_dma_capable(dev)) 145 return NULL; 146 147 if (!ops->alloc) 148 return NULL; 149 150 memory = ops->alloc(dev, size, dma_handle, 151 dma_alloc_coherent_gfp_flags(dev, gfp), attrs); 152 debug_dma_alloc_coherent(dev, size, *dma_handle, memory); 153 154 return memory; 155 } 156 157 #define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) 158 159 static inline void dma_free_attrs(struct device *dev, size_t size, 160 void *vaddr, dma_addr_t bus, 161 struct dma_attrs *attrs) 162 { 163 struct dma_map_ops *ops = get_dma_ops(dev); 164 165 WARN_ON(irqs_disabled()); /* for portability */ 166 167 if (dma_release_from_coherent(dev, get_order(size), vaddr)) 168 return; 169 170 debug_dma_free_coherent(dev, size, vaddr, bus); 171 if (ops->free) 172 ops->free(dev, size, vaddr, bus, attrs); 173 } 174 175 #endif 176