xref: /openbmc/linux/arch/x86/include/asm/dma-mapping.h (revision 8ee90c5c)
1 #ifndef _ASM_X86_DMA_MAPPING_H
2 #define _ASM_X86_DMA_MAPPING_H
3 
4 /*
5  * IOMMU interface. See Documentation/DMA-API-HOWTO.txt and
6  * Documentation/DMA-API.txt for documentation.
7  */
8 
9 #include <linux/kmemcheck.h>
10 #include <linux/scatterlist.h>
11 #include <linux/dma-debug.h>
12 #include <asm/io.h>
13 #include <asm/swiotlb.h>
14 #include <linux/dma-contiguous.h>
15 #include <linux/mem_encrypt.h>
16 
17 #ifdef CONFIG_ISA
18 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(24)
19 #else
20 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(32)
21 #endif
22 
23 extern int iommu_merge;
24 extern struct device x86_dma_fallback_dev;
25 extern int panic_on_overflow;
26 
27 extern const struct dma_map_ops *dma_ops;
28 
29 static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
30 {
31 	return dma_ops;
32 }
33 
34 bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp);
35 #define arch_dma_alloc_attrs arch_dma_alloc_attrs
36 
37 extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
38 					dma_addr_t *dma_addr, gfp_t flag,
39 					unsigned long attrs);
40 
41 extern void dma_generic_free_coherent(struct device *dev, size_t size,
42 				      void *vaddr, dma_addr_t dma_addr,
43 				      unsigned long attrs);
44 
45 #ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */
46 extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size);
47 extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
48 extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);
49 #else
50 
51 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
52 {
53 	if (!dev->dma_mask)
54 		return 0;
55 
56 	return addr + size - 1 <= *dev->dma_mask;
57 }
58 
59 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
60 {
61 	return __sme_set(paddr);
62 }
63 
64 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
65 {
66 	return __sme_clr(daddr);
67 }
68 #endif /* CONFIG_X86_DMA_REMAP */
69 
70 static inline void
71 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
72 	enum dma_data_direction dir)
73 {
74 	flush_write_buffers();
75 }
76 
77 static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
78 						    gfp_t gfp)
79 {
80 	unsigned long dma_mask = 0;
81 
82 	dma_mask = dev->coherent_dma_mask;
83 	if (!dma_mask)
84 		dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32);
85 
86 	return dma_mask;
87 }
88 
89 static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
90 {
91 	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
92 
93 	if (dma_mask <= DMA_BIT_MASK(24))
94 		gfp |= GFP_DMA;
95 #ifdef CONFIG_X86_64
96 	if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
97 		gfp |= GFP_DMA32;
98 #endif
99        return gfp;
100 }
101 
102 #endif
103