1 #ifndef _ASM_X86_DMA_MAPPING_H 2 #define _ASM_X86_DMA_MAPPING_H 3 4 /* 5 * IOMMU interface. See Documentation/DMA-API-HOWTO.txt and 6 * Documentation/DMA-API.txt for documentation. 7 */ 8 9 #include <linux/kmemcheck.h> 10 #include <linux/scatterlist.h> 11 #include <linux/dma-debug.h> 12 #include <linux/dma-attrs.h> 13 #include <asm/io.h> 14 #include <asm/swiotlb.h> 15 #include <linux/dma-contiguous.h> 16 17 #ifdef CONFIG_ISA 18 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(24) 19 #else 20 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(32) 21 #endif 22 23 #define DMA_ERROR_CODE 0 24 25 extern int iommu_merge; 26 extern struct device x86_dma_fallback_dev; 27 extern int panic_on_overflow; 28 29 extern struct dma_map_ops *dma_ops; 30 31 static inline struct dma_map_ops *get_dma_ops(struct device *dev) 32 { 33 #ifndef CONFIG_X86_DEV_DMA_OPS 34 return dma_ops; 35 #else 36 if (unlikely(!dev) || !dev->archdata.dma_ops) 37 return dma_ops; 38 else 39 return dev->archdata.dma_ops; 40 #endif 41 } 42 43 bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp); 44 #define arch_dma_alloc_attrs arch_dma_alloc_attrs 45 46 #define HAVE_ARCH_DMA_SUPPORTED 1 47 extern int dma_supported(struct device *hwdev, u64 mask); 48 49 extern void *dma_generic_alloc_coherent(struct device *dev, size_t size, 50 dma_addr_t *dma_addr, gfp_t flag, 51 struct dma_attrs *attrs); 52 53 extern void dma_generic_free_coherent(struct device *dev, size_t size, 54 void *vaddr, dma_addr_t dma_addr, 55 struct dma_attrs *attrs); 56 57 #ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */ 58 extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size); 59 extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); 60 extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr); 61 #else 62 63 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) 64 { 65 if (!dev->dma_mask) 66 return 0; 67 68 return addr + size - 1 <= *dev->dma_mask; 69 } 70 71 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) 72 { 73 return paddr; 74 } 75 76 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) 77 { 78 return daddr; 79 } 80 #endif /* CONFIG_X86_DMA_REMAP */ 81 82 static inline void 83 dma_cache_sync(struct device *dev, void *vaddr, size_t size, 84 enum dma_data_direction dir) 85 { 86 flush_write_buffers(); 87 } 88 89 static inline unsigned long dma_alloc_coherent_mask(struct device *dev, 90 gfp_t gfp) 91 { 92 unsigned long dma_mask = 0; 93 94 dma_mask = dev->coherent_dma_mask; 95 if (!dma_mask) 96 dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32); 97 98 return dma_mask; 99 } 100 101 static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp) 102 { 103 unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp); 104 105 if (dma_mask <= DMA_BIT_MASK(24)) 106 gfp |= GFP_DMA; 107 #ifdef CONFIG_X86_64 108 if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA)) 109 gfp |= GFP_DMA32; 110 #endif 111 return gfp; 112 } 113 114 #endif 115