1 #ifndef _ASM_X86_DISABLED_FEATURES_H 2 #define _ASM_X86_DISABLED_FEATURES_H 3 4 /* These features, although they might be available in a CPU 5 * will not be used because the compile options to support 6 * them are not present. 7 * 8 * This code allows them to be checked and disabled at 9 * compile time without an explicit #ifdef. Use 10 * cpu_feature_enabled(). 11 */ 12 13 #ifdef CONFIG_X86_UMIP 14 # define DISABLE_UMIP 0 15 #else 16 # define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31)) 17 #endif 18 19 #ifdef CONFIG_X86_64 20 # define DISABLE_VME (1<<(X86_FEATURE_VME & 31)) 21 # define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31)) 22 # define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31)) 23 # define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31)) 24 # define DISABLE_PCID 0 25 #else 26 # define DISABLE_VME 0 27 # define DISABLE_K6_MTRR 0 28 # define DISABLE_CYRIX_ARR 0 29 # define DISABLE_CENTAUR_MCR 0 30 # define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31)) 31 #endif /* CONFIG_X86_64 */ 32 33 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 34 # define DISABLE_PKU 0 35 # define DISABLE_OSPKE 0 36 #else 37 # define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31)) 38 # define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31)) 39 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */ 40 41 #ifdef CONFIG_X86_5LEVEL 42 # define DISABLE_LA57 0 43 #else 44 # define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31)) 45 #endif 46 47 #ifdef CONFIG_PAGE_TABLE_ISOLATION 48 # define DISABLE_PTI 0 49 #else 50 # define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31)) 51 #endif 52 53 #ifdef CONFIG_RETPOLINE 54 # define DISABLE_RETPOLINE 0 55 #else 56 # define DISABLE_RETPOLINE ((1 << (X86_FEATURE_RETPOLINE & 31)) | \ 57 (1 << (X86_FEATURE_RETPOLINE_LFENCE & 31))) 58 #endif 59 60 #ifdef CONFIG_RETHUNK 61 # define DISABLE_RETHUNK 0 62 #else 63 # define DISABLE_RETHUNK (1 << (X86_FEATURE_RETHUNK & 31)) 64 #endif 65 66 #ifdef CONFIG_CPU_UNRET_ENTRY 67 # define DISABLE_UNRET 0 68 #else 69 # define DISABLE_UNRET (1 << (X86_FEATURE_UNRET & 31)) 70 #endif 71 72 #ifdef CONFIG_CALL_DEPTH_TRACKING 73 # define DISABLE_CALL_DEPTH_TRACKING 0 74 #else 75 # define DISABLE_CALL_DEPTH_TRACKING (1 << (X86_FEATURE_CALL_DEPTH & 31)) 76 #endif 77 78 #ifdef CONFIG_ADDRESS_MASKING 79 # define DISABLE_LAM 0 80 #else 81 # define DISABLE_LAM (1 << (X86_FEATURE_LAM & 31)) 82 #endif 83 84 #ifdef CONFIG_INTEL_IOMMU_SVM 85 # define DISABLE_ENQCMD 0 86 #else 87 # define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31)) 88 #endif 89 90 #ifdef CONFIG_X86_SGX 91 # define DISABLE_SGX 0 92 #else 93 # define DISABLE_SGX (1 << (X86_FEATURE_SGX & 31)) 94 #endif 95 96 #ifdef CONFIG_XEN_PV 97 # define DISABLE_XENPV 0 98 #else 99 # define DISABLE_XENPV (1 << (X86_FEATURE_XENPV & 31)) 100 #endif 101 102 #ifdef CONFIG_INTEL_TDX_GUEST 103 # define DISABLE_TDX_GUEST 0 104 #else 105 # define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31)) 106 #endif 107 108 #ifdef CONFIG_X86_USER_SHADOW_STACK 109 #define DISABLE_USER_SHSTK 0 110 #else 111 #define DISABLE_USER_SHSTK (1 << (X86_FEATURE_USER_SHSTK & 31)) 112 #endif 113 114 #ifdef CONFIG_X86_KERNEL_IBT 115 #define DISABLE_IBT 0 116 #else 117 #define DISABLE_IBT (1 << (X86_FEATURE_IBT & 31)) 118 #endif 119 120 /* 121 * Make sure to add features to the correct mask 122 */ 123 #define DISABLED_MASK0 (DISABLE_VME) 124 #define DISABLED_MASK1 0 125 #define DISABLED_MASK2 0 126 #define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR) 127 #define DISABLED_MASK4 (DISABLE_PCID) 128 #define DISABLED_MASK5 0 129 #define DISABLED_MASK6 0 130 #define DISABLED_MASK7 (DISABLE_PTI) 131 #define DISABLED_MASK8 (DISABLE_XENPV|DISABLE_TDX_GUEST) 132 #define DISABLED_MASK9 (DISABLE_SGX) 133 #define DISABLED_MASK10 0 134 #define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \ 135 DISABLE_CALL_DEPTH_TRACKING|DISABLE_USER_SHSTK) 136 #define DISABLED_MASK12 (DISABLE_LAM) 137 #define DISABLED_MASK13 0 138 #define DISABLED_MASK14 0 139 #define DISABLED_MASK15 0 140 #define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \ 141 DISABLE_ENQCMD) 142 #define DISABLED_MASK17 0 143 #define DISABLED_MASK18 (DISABLE_IBT) 144 #define DISABLED_MASK19 0 145 #define DISABLED_MASK20 0 146 #define DISABLED_MASK21 0 147 #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22) 148 149 #endif /* _ASM_X86_DISABLED_FEATURES_H */ 150