1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_CPUFEATURE_H 3 #define _ASM_X86_CPUFEATURE_H 4 5 #include <asm/processor.h> 6 7 #if defined(__KERNEL__) && !defined(__ASSEMBLY__) 8 9 #include <asm/asm.h> 10 #include <linux/bitops.h> 11 12 enum cpuid_leafs 13 { 14 CPUID_1_EDX = 0, 15 CPUID_8000_0001_EDX, 16 CPUID_8086_0001_EDX, 17 CPUID_LNX_1, 18 CPUID_1_ECX, 19 CPUID_C000_0001_EDX, 20 CPUID_8000_0001_ECX, 21 CPUID_LNX_2, 22 CPUID_LNX_3, 23 CPUID_7_0_EBX, 24 CPUID_D_1_EAX, 25 CPUID_F_0_EDX, 26 CPUID_F_1_EDX, 27 CPUID_8000_0008_EBX, 28 CPUID_6_EAX, 29 CPUID_8000_000A_EDX, 30 CPUID_7_ECX, 31 CPUID_8000_0007_EBX, 32 CPUID_7_EDX, 33 }; 34 35 #ifdef CONFIG_X86_FEATURE_NAMES 36 extern const char * const x86_cap_flags[NCAPINTS*32]; 37 extern const char * const x86_power_flags[32]; 38 #define X86_CAP_FMT "%s" 39 #define x86_cap_flag(flag) x86_cap_flags[flag] 40 #else 41 #define X86_CAP_FMT "%d:%d" 42 #define x86_cap_flag(flag) ((flag) >> 5), ((flag) & 31) 43 #endif 44 45 /* 46 * In order to save room, we index into this array by doing 47 * X86_BUG_<name> - NCAPINTS*32. 48 */ 49 extern const char * const x86_bug_flags[NBUGINTS*32]; 50 51 #define test_cpu_cap(c, bit) \ 52 test_bit(bit, (unsigned long *)((c)->x86_capability)) 53 54 /* 55 * There are 32 bits/features in each mask word. The high bits 56 * (selected with (bit>>5) give us the word number and the low 5 57 * bits give us the bit/feature number inside the word. 58 * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can 59 * see if it is set in the mask word. 60 */ 61 #define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \ 62 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word )) 63 64 #define REQUIRED_MASK_BIT_SET(feature_bit) \ 65 ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \ 66 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \ 67 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \ 68 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \ 69 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \ 70 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \ 71 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \ 72 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \ 73 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \ 74 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \ 75 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \ 76 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \ 77 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \ 78 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \ 79 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \ 80 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \ 81 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \ 82 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \ 83 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \ 84 REQUIRED_MASK_CHECK || \ 85 BUILD_BUG_ON_ZERO(NCAPINTS != 19)) 86 87 #define DISABLED_MASK_BIT_SET(feature_bit) \ 88 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \ 89 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \ 90 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \ 91 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \ 92 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \ 93 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \ 94 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \ 95 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \ 96 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \ 97 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \ 98 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \ 99 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \ 100 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \ 101 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \ 102 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \ 103 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \ 104 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \ 105 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \ 106 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \ 107 DISABLED_MASK_CHECK || \ 108 BUILD_BUG_ON_ZERO(NCAPINTS != 19)) 109 110 #define cpu_has(c, bit) \ 111 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ 112 test_cpu_cap(c, bit)) 113 114 #define this_cpu_has(bit) \ 115 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ 116 x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability)) 117 118 /* 119 * This macro is for detection of features which need kernel 120 * infrastructure to be used. It may *not* directly test the CPU 121 * itself. Use the cpu_has() family if you want true runtime 122 * testing of CPU features, like in hypervisor code where you are 123 * supporting a possible guest feature where host support for it 124 * is not relevant. 125 */ 126 #define cpu_feature_enabled(bit) \ 127 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit)) 128 129 #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) 130 131 #define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability)) 132 133 extern void setup_clear_cpu_cap(unsigned int bit); 134 extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit); 135 136 #define setup_force_cpu_cap(bit) do { \ 137 set_cpu_cap(&boot_cpu_data, bit); \ 138 set_bit(bit, (unsigned long *)cpu_caps_set); \ 139 } while (0) 140 141 #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit) 142 143 /* 144 * Static testing of CPU features. Used the same as boot_cpu_has(). 145 * These will statically patch the target code for additional 146 * performance. 147 */ 148 static __always_inline __pure bool _static_cpu_has(u16 bit) 149 { 150 asm_volatile_goto("1: jmp 6f\n" 151 "2:\n" 152 ".skip -(((5f-4f) - (2b-1b)) > 0) * " 153 "((5f-4f) - (2b-1b)),0x90\n" 154 "3:\n" 155 ".section .altinstructions,\"a\"\n" 156 " .long 1b - .\n" /* src offset */ 157 " .long 4f - .\n" /* repl offset */ 158 " .word %P[always]\n" /* always replace */ 159 " .byte 3b - 1b\n" /* src len */ 160 " .byte 5f - 4f\n" /* repl len */ 161 " .byte 3b - 2b\n" /* pad len */ 162 ".previous\n" 163 ".section .altinstr_replacement,\"ax\"\n" 164 "4: jmp %l[t_no]\n" 165 "5:\n" 166 ".previous\n" 167 ".section .altinstructions,\"a\"\n" 168 " .long 1b - .\n" /* src offset */ 169 " .long 0\n" /* no replacement */ 170 " .word %P[feature]\n" /* feature bit */ 171 " .byte 3b - 1b\n" /* src len */ 172 " .byte 0\n" /* repl len */ 173 " .byte 0\n" /* pad len */ 174 ".previous\n" 175 ".section .altinstr_aux,\"ax\"\n" 176 "6:\n" 177 " testb %[bitnum],%[cap_byte]\n" 178 " jnz %l[t_yes]\n" 179 " jmp %l[t_no]\n" 180 ".previous\n" 181 : : [feature] "i" (bit), 182 [always] "i" (X86_FEATURE_ALWAYS), 183 [bitnum] "i" (1 << (bit & 7)), 184 [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3]) 185 : : t_yes, t_no); 186 t_yes: 187 return true; 188 t_no: 189 return false; 190 } 191 192 #define static_cpu_has(bit) \ 193 ( \ 194 __builtin_constant_p(boot_cpu_has(bit)) ? \ 195 boot_cpu_has(bit) : \ 196 _static_cpu_has(bit) \ 197 ) 198 199 #define cpu_has_bug(c, bit) cpu_has(c, (bit)) 200 #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit)) 201 #define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit)) 202 203 #define static_cpu_has_bug(bit) static_cpu_has((bit)) 204 #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit)) 205 #define boot_cpu_set_bug(bit) set_cpu_cap(&boot_cpu_data, (bit)) 206 207 #define MAX_CPU_FEATURES (NCAPINTS * 32) 208 #define cpu_have_feature boot_cpu_has 209 210 #define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X" 211 #define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \ 212 boot_cpu_data.x86_model 213 214 #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */ 215 #endif /* _ASM_X86_CPUFEATURE_H */ 216