1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_CPU_H 3 #define _ASM_X86_CPU_H 4 5 #include <linux/device.h> 6 #include <linux/cpu.h> 7 #include <linux/topology.h> 8 #include <linux/nodemask.h> 9 #include <linux/percpu.h> 10 #include <asm/ibt.h> 11 12 #ifdef CONFIG_SMP 13 14 extern void prefill_possible_map(void); 15 16 #else /* CONFIG_SMP */ 17 18 static inline void prefill_possible_map(void) {} 19 20 #define cpu_physical_id(cpu) boot_cpu_physical_apicid 21 #define cpu_acpi_id(cpu) 0 22 #define safe_smp_processor_id() 0 23 24 #endif /* CONFIG_SMP */ 25 26 struct x86_cpu { 27 struct cpu cpu; 28 }; 29 30 #ifdef CONFIG_HOTPLUG_CPU 31 extern int arch_register_cpu(int num); 32 extern void arch_unregister_cpu(int); 33 extern void soft_restart_cpu(void); 34 #endif 35 36 extern void ap_init_aperfmperf(void); 37 38 int mwait_usable(const struct cpuinfo_x86 *); 39 40 unsigned int x86_family(unsigned int sig); 41 unsigned int x86_model(unsigned int sig); 42 unsigned int x86_stepping(unsigned int sig); 43 #ifdef CONFIG_CPU_SUP_INTEL 44 extern void __init sld_setup(struct cpuinfo_x86 *c); 45 extern bool handle_user_split_lock(struct pt_regs *regs, long error_code); 46 extern bool handle_guest_split_lock(unsigned long ip); 47 extern void handle_bus_lock(struct pt_regs *regs); 48 u8 get_this_hybrid_cpu_type(void); 49 #else 50 static inline void __init sld_setup(struct cpuinfo_x86 *c) {} 51 static inline bool handle_user_split_lock(struct pt_regs *regs, long error_code) 52 { 53 return false; 54 } 55 56 static inline bool handle_guest_split_lock(unsigned long ip) 57 { 58 return false; 59 } 60 61 static inline void handle_bus_lock(struct pt_regs *regs) {} 62 63 static inline u8 get_this_hybrid_cpu_type(void) 64 { 65 return 0; 66 } 67 #endif 68 #ifdef CONFIG_IA32_FEAT_CTL 69 void init_ia32_feat_ctl(struct cpuinfo_x86 *c); 70 #else 71 static inline void init_ia32_feat_ctl(struct cpuinfo_x86 *c) {} 72 #endif 73 74 extern __noendbr void cet_disable(void); 75 76 struct ucode_cpu_info; 77 78 int intel_cpu_collect_info(struct ucode_cpu_info *uci); 79 80 static inline bool intel_cpu_signatures_match(unsigned int s1, unsigned int p1, 81 unsigned int s2, unsigned int p2) 82 { 83 if (s1 != s2) 84 return false; 85 86 /* Processor flags are either both 0 ... */ 87 if (!p1 && !p2) 88 return true; 89 90 /* ... or they intersect. */ 91 return p1 & p2; 92 } 93 94 extern u64 x86_read_arch_cap_msr(void); 95 int intel_find_matching_signature(void *mc, unsigned int csig, int cpf); 96 int intel_microcode_sanity_check(void *mc, bool print_err, int hdr_type); 97 98 extern struct cpumask cpus_stop_mask; 99 100 #endif /* _ASM_X86_CPU_H */ 101