xref: /openbmc/linux/arch/x86/include/asm/cpu.h (revision 0c6dfa75)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_CPU_H
3 #define _ASM_X86_CPU_H
4 
5 #include <linux/device.h>
6 #include <linux/cpu.h>
7 #include <linux/topology.h>
8 #include <linux/nodemask.h>
9 #include <linux/percpu.h>
10 #include <asm/ibt.h>
11 
12 #ifdef CONFIG_SMP
13 
14 extern void prefill_possible_map(void);
15 
16 #else /* CONFIG_SMP */
17 
18 static inline void prefill_possible_map(void) {}
19 
20 #define cpu_physical_id(cpu)			boot_cpu_physical_apicid
21 #define cpu_acpi_id(cpu)			0
22 #define safe_smp_processor_id()			0
23 
24 #endif /* CONFIG_SMP */
25 
26 struct x86_cpu {
27 	struct cpu cpu;
28 };
29 
30 #ifdef CONFIG_HOTPLUG_CPU
31 extern void soft_restart_cpu(void);
32 #endif
33 
34 extern void ap_init_aperfmperf(void);
35 
36 int mwait_usable(const struct cpuinfo_x86 *);
37 
38 unsigned int x86_family(unsigned int sig);
39 unsigned int x86_model(unsigned int sig);
40 unsigned int x86_stepping(unsigned int sig);
41 #ifdef CONFIG_CPU_SUP_INTEL
42 extern void __init sld_setup(struct cpuinfo_x86 *c);
43 extern bool handle_user_split_lock(struct pt_regs *regs, long error_code);
44 extern bool handle_guest_split_lock(unsigned long ip);
45 extern void handle_bus_lock(struct pt_regs *regs);
46 u8 get_this_hybrid_cpu_type(void);
47 #else
48 static inline void __init sld_setup(struct cpuinfo_x86 *c) {}
49 static inline bool handle_user_split_lock(struct pt_regs *regs, long error_code)
50 {
51 	return false;
52 }
53 
54 static inline bool handle_guest_split_lock(unsigned long ip)
55 {
56 	return false;
57 }
58 
59 static inline void handle_bus_lock(struct pt_regs *regs) {}
60 
61 static inline u8 get_this_hybrid_cpu_type(void)
62 {
63 	return 0;
64 }
65 #endif
66 #ifdef CONFIG_IA32_FEAT_CTL
67 void init_ia32_feat_ctl(struct cpuinfo_x86 *c);
68 #else
69 static inline void init_ia32_feat_ctl(struct cpuinfo_x86 *c) {}
70 #endif
71 
72 extern __noendbr void cet_disable(void);
73 
74 struct ucode_cpu_info;
75 
76 int intel_cpu_collect_info(struct ucode_cpu_info *uci);
77 
78 static inline bool intel_cpu_signatures_match(unsigned int s1, unsigned int p1,
79 					      unsigned int s2, unsigned int p2)
80 {
81 	if (s1 != s2)
82 		return false;
83 
84 	/* Processor flags are either both 0 ... */
85 	if (!p1 && !p2)
86 		return true;
87 
88 	/* ... or they intersect. */
89 	return p1 & p2;
90 }
91 
92 extern u64 x86_read_arch_cap_msr(void);
93 int intel_find_matching_signature(void *mc, unsigned int csig, int cpf);
94 int intel_microcode_sanity_check(void *mc, bool print_err, int hdr_type);
95 
96 extern struct cpumask cpus_stop_mask;
97 
98 #endif /* _ASM_X86_CPU_H */
99