1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_CPU_H 3 #define _ASM_X86_CPU_H 4 5 #include <linux/device.h> 6 #include <linux/cpu.h> 7 #include <linux/topology.h> 8 #include <linux/nodemask.h> 9 #include <linux/percpu.h> 10 #include <asm/ibt.h> 11 12 #ifdef CONFIG_SMP 13 14 extern void prefill_possible_map(void); 15 16 #else /* CONFIG_SMP */ 17 18 static inline void prefill_possible_map(void) {} 19 20 #define cpu_physical_id(cpu) boot_cpu_physical_apicid 21 #define cpu_acpi_id(cpu) 0 22 #define safe_smp_processor_id() 0 23 24 #endif /* CONFIG_SMP */ 25 26 struct x86_cpu { 27 struct cpu cpu; 28 }; 29 30 #ifdef CONFIG_HOTPLUG_CPU 31 extern int arch_register_cpu(int num); 32 extern void arch_unregister_cpu(int); 33 extern void start_cpu0(void); 34 #ifdef CONFIG_DEBUG_HOTPLUG_CPU0 35 extern int _debug_hotplug_cpu(int cpu, int action); 36 #endif 37 #endif 38 39 extern void ap_init_aperfmperf(void); 40 41 int mwait_usable(const struct cpuinfo_x86 *); 42 43 unsigned int x86_family(unsigned int sig); 44 unsigned int x86_model(unsigned int sig); 45 unsigned int x86_stepping(unsigned int sig); 46 #ifdef CONFIG_CPU_SUP_INTEL 47 extern void __init sld_setup(struct cpuinfo_x86 *c); 48 extern bool handle_user_split_lock(struct pt_regs *regs, long error_code); 49 extern bool handle_guest_split_lock(unsigned long ip); 50 extern void handle_bus_lock(struct pt_regs *regs); 51 u8 get_this_hybrid_cpu_type(void); 52 #else 53 static inline void __init sld_setup(struct cpuinfo_x86 *c) {} 54 static inline bool handle_user_split_lock(struct pt_regs *regs, long error_code) 55 { 56 return false; 57 } 58 59 static inline bool handle_guest_split_lock(unsigned long ip) 60 { 61 return false; 62 } 63 64 static inline void handle_bus_lock(struct pt_regs *regs) {} 65 66 static inline u8 get_this_hybrid_cpu_type(void) 67 { 68 return 0; 69 } 70 #endif 71 #ifdef CONFIG_IA32_FEAT_CTL 72 void init_ia32_feat_ctl(struct cpuinfo_x86 *c); 73 #else 74 static inline void init_ia32_feat_ctl(struct cpuinfo_x86 *c) {} 75 #endif 76 77 extern __noendbr void cet_disable(void); 78 79 struct ucode_cpu_info; 80 81 int intel_cpu_collect_info(struct ucode_cpu_info *uci); 82 83 static inline bool intel_cpu_signatures_match(unsigned int s1, unsigned int p1, 84 unsigned int s2, unsigned int p2) 85 { 86 if (s1 != s2) 87 return false; 88 89 /* Processor flags are either both 0 ... */ 90 if (!p1 && !p2) 91 return true; 92 93 /* ... or they intersect. */ 94 return p1 & p2; 95 } 96 97 extern u64 x86_read_arch_cap_msr(void); 98 int intel_find_matching_signature(void *mc, unsigned int csig, int cpf); 99 int intel_microcode_sanity_check(void *mc, bool print_err, int hdr_type); 100 101 #endif /* _ASM_X86_CPU_H */ 102