1 #ifndef _ASM_X86_APIC_H 2 #define _ASM_X86_APIC_H 3 4 #include <linux/pm.h> 5 #include <linux/delay.h> 6 7 #include <asm/alternative.h> 8 #include <asm/fixmap.h> 9 #include <asm/apicdef.h> 10 #include <asm/processor.h> 11 #include <asm/system.h> 12 #include <asm/cpufeature.h> 13 #include <asm/msr.h> 14 15 #define ARCH_APICTIMER_STOPS_ON_C3 1 16 17 /* 18 * Debugging macros 19 */ 20 #define APIC_QUIET 0 21 #define APIC_VERBOSE 1 22 #define APIC_DEBUG 2 23 24 /* 25 * Define the default level of output to be very little 26 * This can be turned up by using apic=verbose for more 27 * information and apic=debug for _lots_ of information. 28 * apic_verbosity is defined in apic.c 29 */ 30 #define apic_printk(v, s, a...) do { \ 31 if ((v) <= apic_verbosity) \ 32 printk(s, ##a); \ 33 } while (0) 34 35 36 extern void generic_apic_probe(void); 37 38 #ifdef CONFIG_X86_LOCAL_APIC 39 40 extern unsigned int apic_verbosity; 41 extern int local_apic_timer_c2_ok; 42 43 extern int disable_apic; 44 45 #ifdef CONFIG_SMP 46 extern void __inquire_remote_apic(int apicid); 47 #else /* CONFIG_SMP */ 48 static inline void __inquire_remote_apic(int apicid) 49 { 50 } 51 #endif /* CONFIG_SMP */ 52 53 static inline void default_inquire_remote_apic(int apicid) 54 { 55 if (apic_verbosity >= APIC_DEBUG) 56 __inquire_remote_apic(apicid); 57 } 58 59 /* 60 * Basic functions accessing APICs. 61 */ 62 #ifdef CONFIG_PARAVIRT 63 #include <asm/paravirt.h> 64 #else 65 #define setup_boot_clock setup_boot_APIC_clock 66 #define setup_secondary_clock setup_secondary_APIC_clock 67 #endif 68 69 extern int is_vsmp_box(void); 70 extern void xapic_wait_icr_idle(void); 71 extern u32 safe_xapic_wait_icr_idle(void); 72 extern void xapic_icr_write(u32, u32); 73 extern int setup_profiling_timer(unsigned int); 74 75 static inline void native_apic_mem_write(u32 reg, u32 v) 76 { 77 volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 78 79 alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP, 80 ASM_OUTPUT2("=r" (v), "=m" (*addr)), 81 ASM_OUTPUT2("0" (v), "m" (*addr))); 82 } 83 84 static inline u32 native_apic_mem_read(u32 reg) 85 { 86 return *((volatile u32 *)(APIC_BASE + reg)); 87 } 88 89 static inline void native_apic_msr_write(u32 reg, u32 v) 90 { 91 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 92 reg == APIC_LVR) 93 return; 94 95 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 96 } 97 98 static inline u32 native_apic_msr_read(u32 reg) 99 { 100 u32 low, high; 101 102 if (reg == APIC_DFR) 103 return -1; 104 105 rdmsr(APIC_BASE_MSR + (reg >> 4), low, high); 106 return low; 107 } 108 109 #ifndef CONFIG_X86_32 110 extern int x2apic; 111 extern void check_x2apic(void); 112 extern void enable_x2apic(void); 113 extern void enable_IR_x2apic(void); 114 extern void x2apic_icr_write(u32 low, u32 id); 115 static inline int x2apic_enabled(void) 116 { 117 int msr, msr2; 118 119 if (!cpu_has_x2apic) 120 return 0; 121 122 rdmsr(MSR_IA32_APICBASE, msr, msr2); 123 if (msr & X2APIC_ENABLE) 124 return 1; 125 return 0; 126 } 127 #else 128 #define x2apic_enabled() 0 129 #endif 130 131 struct apic_ops { 132 u32 (*read)(u32 reg); 133 void (*write)(u32 reg, u32 v); 134 u64 (*icr_read)(void); 135 void (*icr_write)(u32 low, u32 high); 136 void (*wait_icr_idle)(void); 137 u32 (*safe_wait_icr_idle)(void); 138 }; 139 140 extern struct apic_ops *apic_ops; 141 142 static inline u32 apic_read(u32 reg) 143 { 144 return apic_ops->read(reg); 145 } 146 147 static inline void apic_write(u32 reg, u32 val) 148 { 149 apic_ops->write(reg, val); 150 } 151 152 static inline u64 apic_icr_read(void) 153 { 154 return apic_ops->icr_read(); 155 } 156 157 static inline void apic_icr_write(u32 low, u32 high) 158 { 159 apic_ops->icr_write(low, high); 160 } 161 162 static inline void apic_wait_icr_idle(void) 163 { 164 apic_ops->wait_icr_idle(); 165 } 166 167 static inline u32 safe_apic_wait_icr_idle(void) 168 { 169 return apic_ops->safe_wait_icr_idle(); 170 } 171 172 extern int get_physical_broadcast(void); 173 174 #ifdef CONFIG_X86_64 175 static inline void ack_x2APIC_irq(void) 176 { 177 /* Docs say use 0 for future compatibility */ 178 native_apic_msr_write(APIC_EOI, 0); 179 } 180 #endif 181 182 183 static inline void ack_APIC_irq(void) 184 { 185 /* 186 * ack_APIC_irq() actually gets compiled as a single instruction 187 * ... yummie. 188 */ 189 190 /* Docs say use 0 for future compatibility */ 191 apic_write(APIC_EOI, 0); 192 } 193 194 extern int lapic_get_maxlvt(void); 195 extern void clear_local_APIC(void); 196 extern void connect_bsp_APIC(void); 197 extern void disconnect_bsp_APIC(int virt_wire_setup); 198 extern void disable_local_APIC(void); 199 extern void lapic_shutdown(void); 200 extern int verify_local_APIC(void); 201 extern void cache_APIC_registers(void); 202 extern void sync_Arb_IDs(void); 203 extern void init_bsp_APIC(void); 204 extern void setup_local_APIC(void); 205 extern void end_local_APIC_setup(void); 206 extern void init_apic_mappings(void); 207 extern void setup_boot_APIC_clock(void); 208 extern void setup_secondary_APIC_clock(void); 209 extern int APIC_init_uniprocessor(void); 210 extern void enable_NMI_through_LVT0(void); 211 212 /* 213 * On 32bit this is mach-xxx local 214 */ 215 #ifdef CONFIG_X86_64 216 extern void early_init_lapic_mapping(void); 217 extern int apic_is_clustered_box(void); 218 #else 219 static inline int apic_is_clustered_box(void) 220 { 221 return 0; 222 } 223 #endif 224 225 extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); 226 extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); 227 228 229 #else /* !CONFIG_X86_LOCAL_APIC */ 230 static inline void lapic_shutdown(void) { } 231 #define local_apic_timer_c2_ok 1 232 static inline void init_apic_mappings(void) { } 233 static inline void disable_local_APIC(void) { } 234 235 #endif /* !CONFIG_X86_LOCAL_APIC */ 236 237 #ifdef CONFIG_X86_64 238 #define SET_APIC_ID(x) (apic->set_apic_id(x)) 239 #else 240 241 #ifdef CONFIG_X86_LOCAL_APIC 242 static inline unsigned default_get_apic_id(unsigned long x) 243 { 244 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 245 246 if (APIC_XAPIC(ver)) 247 return (x >> 24) & 0xFF; 248 else 249 return (x >> 24) & 0x0F; 250 } 251 #endif 252 253 #endif 254 255 #endif /* _ASM_X86_APIC_H */ 256