1 #ifndef _ASM_X86_APIC_H 2 #define _ASM_X86_APIC_H 3 4 #include <linux/pm.h> 5 #include <linux/delay.h> 6 7 #include <asm/alternative.h> 8 #include <asm/fixmap.h> 9 #include <asm/apicdef.h> 10 #include <asm/processor.h> 11 #include <asm/system.h> 12 #include <asm/cpufeature.h> 13 #include <asm/msr.h> 14 15 #define ARCH_APICTIMER_STOPS_ON_C3 1 16 17 /* 18 * Debugging macros 19 */ 20 #define APIC_QUIET 0 21 #define APIC_VERBOSE 1 22 #define APIC_DEBUG 2 23 24 /* 25 * Define the default level of output to be very little 26 * This can be turned up by using apic=verbose for more 27 * information and apic=debug for _lots_ of information. 28 * apic_verbosity is defined in apic.c 29 */ 30 #define apic_printk(v, s, a...) do { \ 31 if ((v) <= apic_verbosity) \ 32 printk(s, ##a); \ 33 } while (0) 34 35 36 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 37 extern void generic_apic_probe(void); 38 #else 39 static inline void generic_apic_probe(void) 40 { 41 } 42 #endif 43 44 #ifdef CONFIG_X86_LOCAL_APIC 45 46 extern unsigned int apic_verbosity; 47 extern int local_apic_timer_c2_ok; 48 49 extern int disable_apic; 50 51 #ifdef CONFIG_SMP 52 extern void __inquire_remote_apic(int apicid); 53 #else /* CONFIG_SMP */ 54 static inline void __inquire_remote_apic(int apicid) 55 { 56 } 57 #endif /* CONFIG_SMP */ 58 59 static inline void default_inquire_remote_apic(int apicid) 60 { 61 if (apic_verbosity >= APIC_DEBUG) 62 __inquire_remote_apic(apicid); 63 } 64 65 /* 66 * Basic functions accessing APICs. 67 */ 68 #ifdef CONFIG_PARAVIRT 69 #include <asm/paravirt.h> 70 #else 71 #define setup_boot_clock setup_boot_APIC_clock 72 #define setup_secondary_clock setup_secondary_APIC_clock 73 #endif 74 75 extern int is_vsmp_box(void); 76 extern void xapic_wait_icr_idle(void); 77 extern u32 safe_xapic_wait_icr_idle(void); 78 extern void xapic_icr_write(u32, u32); 79 extern int setup_profiling_timer(unsigned int); 80 81 static inline void native_apic_mem_write(u32 reg, u32 v) 82 { 83 volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 84 85 alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP, 86 ASM_OUTPUT2("=r" (v), "=m" (*addr)), 87 ASM_OUTPUT2("0" (v), "m" (*addr))); 88 } 89 90 static inline u32 native_apic_mem_read(u32 reg) 91 { 92 return *((volatile u32 *)(APIC_BASE + reg)); 93 } 94 95 static inline void native_apic_msr_write(u32 reg, u32 v) 96 { 97 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 98 reg == APIC_LVR) 99 return; 100 101 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 102 } 103 104 static inline u32 native_apic_msr_read(u32 reg) 105 { 106 u32 low, high; 107 108 if (reg == APIC_DFR) 109 return -1; 110 111 rdmsr(APIC_BASE_MSR + (reg >> 4), low, high); 112 return low; 113 } 114 115 #ifndef CONFIG_X86_32 116 extern int x2apic; 117 extern void check_x2apic(void); 118 extern void enable_x2apic(void); 119 extern void enable_IR_x2apic(void); 120 extern void x2apic_icr_write(u32 low, u32 id); 121 static inline int x2apic_enabled(void) 122 { 123 int msr, msr2; 124 125 if (!cpu_has_x2apic) 126 return 0; 127 128 rdmsr(MSR_IA32_APICBASE, msr, msr2); 129 if (msr & X2APIC_ENABLE) 130 return 1; 131 return 0; 132 } 133 #else 134 #define x2apic_enabled() 0 135 #endif 136 137 struct apic_ops { 138 u32 (*read)(u32 reg); 139 void (*write)(u32 reg, u32 v); 140 u64 (*icr_read)(void); 141 void (*icr_write)(u32 low, u32 high); 142 void (*wait_icr_idle)(void); 143 u32 (*safe_wait_icr_idle)(void); 144 }; 145 146 extern struct apic_ops *apic_ops; 147 148 static inline u32 apic_read(u32 reg) 149 { 150 return apic_ops->read(reg); 151 } 152 153 static inline void apic_write(u32 reg, u32 val) 154 { 155 apic_ops->write(reg, val); 156 } 157 158 static inline u64 apic_icr_read(void) 159 { 160 return apic_ops->icr_read(); 161 } 162 163 static inline void apic_icr_write(u32 low, u32 high) 164 { 165 apic_ops->icr_write(low, high); 166 } 167 168 static inline void apic_wait_icr_idle(void) 169 { 170 apic_ops->wait_icr_idle(); 171 } 172 173 static inline u32 safe_apic_wait_icr_idle(void) 174 { 175 return apic_ops->safe_wait_icr_idle(); 176 } 177 178 extern int get_physical_broadcast(void); 179 180 #ifdef CONFIG_X86_64 181 static inline void ack_x2APIC_irq(void) 182 { 183 /* Docs say use 0 for future compatibility */ 184 native_apic_msr_write(APIC_EOI, 0); 185 } 186 #endif 187 188 189 static inline void ack_APIC_irq(void) 190 { 191 /* 192 * ack_APIC_irq() actually gets compiled as a single instruction 193 * ... yummie. 194 */ 195 196 /* Docs say use 0 for future compatibility */ 197 apic_write(APIC_EOI, 0); 198 } 199 200 extern int lapic_get_maxlvt(void); 201 extern void clear_local_APIC(void); 202 extern void connect_bsp_APIC(void); 203 extern void disconnect_bsp_APIC(int virt_wire_setup); 204 extern void disable_local_APIC(void); 205 extern void lapic_shutdown(void); 206 extern int verify_local_APIC(void); 207 extern void cache_APIC_registers(void); 208 extern void sync_Arb_IDs(void); 209 extern void init_bsp_APIC(void); 210 extern void setup_local_APIC(void); 211 extern void end_local_APIC_setup(void); 212 extern void init_apic_mappings(void); 213 extern void setup_boot_APIC_clock(void); 214 extern void setup_secondary_APIC_clock(void); 215 extern int APIC_init_uniprocessor(void); 216 extern void enable_NMI_through_LVT0(void); 217 218 /* 219 * On 32bit this is mach-xxx local 220 */ 221 #ifdef CONFIG_X86_64 222 extern void early_init_lapic_mapping(void); 223 extern int apic_is_clustered_box(void); 224 #else 225 static inline int apic_is_clustered_box(void) 226 { 227 return 0; 228 } 229 #endif 230 231 extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); 232 extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); 233 234 235 #else /* !CONFIG_X86_LOCAL_APIC */ 236 static inline void lapic_shutdown(void) { } 237 #define local_apic_timer_c2_ok 1 238 static inline void init_apic_mappings(void) { } 239 static inline void disable_local_APIC(void) { } 240 241 #endif /* !CONFIG_X86_LOCAL_APIC */ 242 243 #ifdef CONFIG_X86_64 244 #define SET_APIC_ID(x) (apic->set_apic_id(x)) 245 #else 246 247 #ifdef CONFIG_X86_LOCAL_APIC 248 static inline unsigned default_get_apic_id(unsigned long x) 249 { 250 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 251 252 if (APIC_XAPIC(ver)) 253 return (x >> 24) & 0xFF; 254 else 255 return (x >> 24) & 0x0F; 256 } 257 #endif 258 259 #endif 260 261 #endif /* _ASM_X86_APIC_H */ 262