1 #ifndef _ASM_X86_APIC_H 2 #define _ASM_X86_APIC_H 3 4 #include <linux/pm.h> 5 #include <linux/delay.h> 6 7 #include <asm/alternative.h> 8 #include <asm/fixmap.h> 9 #include <asm/apicdef.h> 10 #include <asm/processor.h> 11 #include <asm/system.h> 12 #include <asm/cpufeature.h> 13 #include <asm/msr.h> 14 15 #define ARCH_APICTIMER_STOPS_ON_C3 1 16 17 /* 18 * Debugging macros 19 */ 20 #define APIC_QUIET 0 21 #define APIC_VERBOSE 1 22 #define APIC_DEBUG 2 23 24 /* 25 * Define the default level of output to be very little 26 * This can be turned up by using apic=verbose for more 27 * information and apic=debug for _lots_ of information. 28 * apic_verbosity is defined in apic.c 29 */ 30 #define apic_printk(v, s, a...) do { \ 31 if ((v) <= apic_verbosity) \ 32 printk(s, ##a); \ 33 } while (0) 34 35 36 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 37 extern void generic_apic_probe(void); 38 #else 39 static inline void generic_apic_probe(void) 40 { 41 } 42 #endif 43 44 #ifdef CONFIG_X86_LOCAL_APIC 45 46 extern unsigned int apic_verbosity; 47 extern int local_apic_timer_c2_ok; 48 49 extern int disable_apic; 50 51 #ifdef CONFIG_SMP 52 extern void __inquire_remote_apic(int apicid); 53 #else /* CONFIG_SMP */ 54 static inline void __inquire_remote_apic(int apicid) 55 { 56 } 57 #endif /* CONFIG_SMP */ 58 59 static inline void default_inquire_remote_apic(int apicid) 60 { 61 if (apic_verbosity >= APIC_DEBUG) 62 __inquire_remote_apic(apicid); 63 } 64 65 /* 66 * Basic functions accessing APICs. 67 */ 68 #ifdef CONFIG_PARAVIRT 69 #include <asm/paravirt.h> 70 #else 71 #define setup_boot_clock setup_boot_APIC_clock 72 #define setup_secondary_clock setup_secondary_APIC_clock 73 #endif 74 75 extern int is_vsmp_box(void); 76 extern void xapic_wait_icr_idle(void); 77 extern u32 safe_xapic_wait_icr_idle(void); 78 extern void xapic_icr_write(u32, u32); 79 extern int setup_profiling_timer(unsigned int); 80 81 static inline void native_apic_mem_write(u32 reg, u32 v) 82 { 83 volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 84 85 alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP, 86 ASM_OUTPUT2("=r" (v), "=m" (*addr)), 87 ASM_OUTPUT2("0" (v), "m" (*addr))); 88 } 89 90 static inline u32 native_apic_mem_read(u32 reg) 91 { 92 return *((volatile u32 *)(APIC_BASE + reg)); 93 } 94 95 static inline void native_apic_msr_write(u32 reg, u32 v) 96 { 97 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 98 reg == APIC_LVR) 99 return; 100 101 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 102 } 103 104 static inline u32 native_apic_msr_read(u32 reg) 105 { 106 u32 low, high; 107 108 if (reg == APIC_DFR) 109 return -1; 110 111 rdmsr(APIC_BASE_MSR + (reg >> 4), low, high); 112 return low; 113 } 114 115 #ifdef CONFIG_X86_X2APIC 116 extern int x2apic; 117 extern void check_x2apic(void); 118 extern void enable_x2apic(void); 119 extern void enable_IR_x2apic(void); 120 extern void x2apic_icr_write(u32 low, u32 id); 121 static inline int x2apic_enabled(void) 122 { 123 int msr, msr2; 124 125 if (!cpu_has_x2apic) 126 return 0; 127 128 rdmsr(MSR_IA32_APICBASE, msr, msr2); 129 if (msr & X2APIC_ENABLE) 130 return 1; 131 return 0; 132 } 133 #else 134 static inline void check_x2apic(void) 135 { 136 } 137 static inline void enable_x2apic(void) 138 { 139 } 140 static inline void enable_IR_x2apic(void) 141 { 142 } 143 static inline int x2apic_enabled(void) 144 { 145 return 0; 146 } 147 #endif 148 149 struct apic_ops { 150 u32 (*read)(u32 reg); 151 void (*write)(u32 reg, u32 v); 152 u64 (*icr_read)(void); 153 void (*icr_write)(u32 low, u32 high); 154 void (*wait_icr_idle)(void); 155 u32 (*safe_wait_icr_idle)(void); 156 }; 157 158 extern struct apic_ops *apic_ops; 159 160 static inline u32 apic_read(u32 reg) 161 { 162 return apic_ops->read(reg); 163 } 164 165 static inline void apic_write(u32 reg, u32 val) 166 { 167 apic_ops->write(reg, val); 168 } 169 170 static inline u64 apic_icr_read(void) 171 { 172 return apic_ops->icr_read(); 173 } 174 175 static inline void apic_icr_write(u32 low, u32 high) 176 { 177 apic_ops->icr_write(low, high); 178 } 179 180 static inline void apic_wait_icr_idle(void) 181 { 182 apic_ops->wait_icr_idle(); 183 } 184 185 static inline u32 safe_apic_wait_icr_idle(void) 186 { 187 return apic_ops->safe_wait_icr_idle(); 188 } 189 190 extern int get_physical_broadcast(void); 191 192 #ifdef CONFIG_X86_X2APIC 193 static inline void ack_x2APIC_irq(void) 194 { 195 /* Docs say use 0 for future compatibility */ 196 native_apic_msr_write(APIC_EOI, 0); 197 } 198 #endif 199 200 201 static inline void ack_APIC_irq(void) 202 { 203 /* 204 * ack_APIC_irq() actually gets compiled as a single instruction 205 * ... yummie. 206 */ 207 208 /* Docs say use 0 for future compatibility */ 209 apic_write(APIC_EOI, 0); 210 } 211 212 extern int lapic_get_maxlvt(void); 213 extern void clear_local_APIC(void); 214 extern void connect_bsp_APIC(void); 215 extern void disconnect_bsp_APIC(int virt_wire_setup); 216 extern void disable_local_APIC(void); 217 extern void lapic_shutdown(void); 218 extern int verify_local_APIC(void); 219 extern void cache_APIC_registers(void); 220 extern void sync_Arb_IDs(void); 221 extern void init_bsp_APIC(void); 222 extern void setup_local_APIC(void); 223 extern void end_local_APIC_setup(void); 224 extern void init_apic_mappings(void); 225 extern void setup_boot_APIC_clock(void); 226 extern void setup_secondary_APIC_clock(void); 227 extern int APIC_init_uniprocessor(void); 228 extern void enable_NMI_through_LVT0(void); 229 230 /* 231 * On 32bit this is mach-xxx local 232 */ 233 #ifdef CONFIG_X86_64 234 extern void early_init_lapic_mapping(void); 235 extern int apic_is_clustered_box(void); 236 #else 237 static inline int apic_is_clustered_box(void) 238 { 239 return 0; 240 } 241 #endif 242 243 extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); 244 extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); 245 246 247 #else /* !CONFIG_X86_LOCAL_APIC */ 248 static inline void lapic_shutdown(void) { } 249 #define local_apic_timer_c2_ok 1 250 static inline void init_apic_mappings(void) { } 251 static inline void disable_local_APIC(void) { } 252 253 #endif /* !CONFIG_X86_LOCAL_APIC */ 254 255 #ifdef CONFIG_X86_64 256 #define SET_APIC_ID(x) (apic->set_apic_id(x)) 257 #else 258 259 #ifdef CONFIG_X86_LOCAL_APIC 260 static inline unsigned default_get_apic_id(unsigned long x) 261 { 262 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 263 264 if (APIC_XAPIC(ver)) 265 return (x >> 24) & 0xFF; 266 else 267 return (x >> 24) & 0x0F; 268 } 269 #endif 270 271 #endif 272 273 #endif /* _ASM_X86_APIC_H */ 274