17e300dabSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 21965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 31965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 4bb898558SAl Viro 5e2780a68SIngo Molnar #include <linux/cpumask.h> 6bb898558SAl Viro 7bb898558SAl Viro #include <asm/alternative.h> 8bb898558SAl Viro #include <asm/cpufeature.h> 9e2780a68SIngo Molnar #include <asm/apicdef.h> 1060063497SArun Sharma #include <linux/atomic.h> 11e2780a68SIngo Molnar #include <asm/fixmap.h> 12e2780a68SIngo Molnar #include <asm/mpspec.h> 13bb898558SAl Viro #include <asm/msr.h> 14ffcba43fSNicolai Stange #include <asm/hardirq.h> 15bb898558SAl Viro 16bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 17bb898558SAl Viro 18bb898558SAl Viro /* 19bb898558SAl Viro * Debugging macros 20bb898558SAl Viro */ 21bb898558SAl Viro #define APIC_QUIET 0 22bb898558SAl Viro #define APIC_VERBOSE 1 23bb898558SAl Viro #define APIC_DEBUG 2 24bb898558SAl Viro 25b7c4948eSHidehiro Kawai /* Macros for apic_extnmi which controls external NMI masking */ 26b7c4948eSHidehiro Kawai #define APIC_EXTNMI_BSP 0 /* Default */ 27b7c4948eSHidehiro Kawai #define APIC_EXTNMI_ALL 1 28b7c4948eSHidehiro Kawai #define APIC_EXTNMI_NONE 2 29b7c4948eSHidehiro Kawai 30bb898558SAl Viro /* 31bb898558SAl Viro * Define the default level of output to be very little 32bb898558SAl Viro * This can be turned up by using apic=verbose for more 33bb898558SAl Viro * information and apic=debug for _lots_ of information. 34bb898558SAl Viro * apic_verbosity is defined in apic.c 35bb898558SAl Viro */ 36bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 37bb898558SAl Viro if ((v) <= apic_verbosity) \ 38bb898558SAl Viro printk(s, ##a); \ 39bb898558SAl Viro } while (0) 40bb898558SAl Viro 41bb898558SAl Viro 42160d8dacSIngo Molnar #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 43bb898558SAl Viro extern void generic_apic_probe(void); 44160d8dacSIngo Molnar #else 45160d8dacSIngo Molnar static inline void generic_apic_probe(void) 46160d8dacSIngo Molnar { 47160d8dacSIngo Molnar } 48160d8dacSIngo Molnar #endif 49bb898558SAl Viro 50bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 51bb898558SAl Viro 52ec633558SQian Cai extern int apic_verbosity; 53bb898558SAl Viro extern int local_apic_timer_c2_ok; 54bb898558SAl Viro 55bb898558SAl Viro extern int disable_apic; 5652ae346bSDaniel Drake extern unsigned int lapic_timer_period; 570939e4fdSIngo Molnar 584f45ed9fSDou Liyang extern enum apic_intr_mode_id apic_intr_mode; 594f45ed9fSDou Liyang enum apic_intr_mode_id { 604f45ed9fSDou Liyang APIC_PIC, 614f45ed9fSDou Liyang APIC_VIRTUAL_WIRE, 624f45ed9fSDou Liyang APIC_VIRTUAL_WIRE_NO_CONFIG, 634f45ed9fSDou Liyang APIC_SYMMETRIC_IO, 644f45ed9fSDou Liyang APIC_SYMMETRIC_IO_NO_ROUTING 654f45ed9fSDou Liyang }; 664f45ed9fSDou Liyang 670939e4fdSIngo Molnar #ifdef CONFIG_SMP 680939e4fdSIngo Molnar extern void __inquire_remote_apic(int apicid); 690939e4fdSIngo Molnar #else /* CONFIG_SMP */ 700939e4fdSIngo Molnar static inline void __inquire_remote_apic(int apicid) 710939e4fdSIngo Molnar { 720939e4fdSIngo Molnar } 730939e4fdSIngo Molnar #endif /* CONFIG_SMP */ 740939e4fdSIngo Molnar 750939e4fdSIngo Molnar static inline void default_inquire_remote_apic(int apicid) 760939e4fdSIngo Molnar { 770939e4fdSIngo Molnar if (apic_verbosity >= APIC_DEBUG) 780939e4fdSIngo Molnar __inquire_remote_apic(apicid); 790939e4fdSIngo Molnar } 800939e4fdSIngo Molnar 81bb898558SAl Viro /* 828312136fSCyrill Gorcunov * With 82489DX we can't rely on apic feature bit 838312136fSCyrill Gorcunov * retrieved via cpuid but still have to deal with 848312136fSCyrill Gorcunov * such an apic chip so we assume that SMP configuration 858312136fSCyrill Gorcunov * is found from MP table (64bit case uses ACPI mostly 868312136fSCyrill Gorcunov * which set smp presence flag as well so we are safe 878312136fSCyrill Gorcunov * to use this helper too). 888312136fSCyrill Gorcunov */ 898312136fSCyrill Gorcunov static inline bool apic_from_smp_config(void) 908312136fSCyrill Gorcunov { 918312136fSCyrill Gorcunov return smp_found_config && !disable_apic; 928312136fSCyrill Gorcunov } 938312136fSCyrill Gorcunov 948312136fSCyrill Gorcunov /* 95bb898558SAl Viro * Basic functions accessing APICs. 96bb898558SAl Viro */ 97bb898558SAl Viro #ifdef CONFIG_PARAVIRT 98bb898558SAl Viro #include <asm/paravirt.h> 99bb898558SAl Viro #endif 100bb898558SAl Viro 101bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 102bb898558SAl Viro { 103bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 104bb898558SAl Viro 105a930dc45SBorislav Petkov alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP, 106bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 107bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 108bb898558SAl Viro } 109bb898558SAl Viro 110bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 111bb898558SAl Viro { 112bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 113bb898558SAl Viro } 114bb898558SAl Viro 115c1eeb2deSYinghai Lu extern void native_apic_wait_icr_idle(void); 116c1eeb2deSYinghai Lu extern u32 native_safe_apic_wait_icr_idle(void); 117c1eeb2deSYinghai Lu extern void native_apic_icr_write(u32 low, u32 id); 118c1eeb2deSYinghai Lu extern u64 native_apic_icr_read(void); 119c1eeb2deSYinghai Lu 1208d806960SThomas Gleixner static inline bool apic_is_x2apic_enabled(void) 1218d806960SThomas Gleixner { 1228d806960SThomas Gleixner u64 msr; 1238d806960SThomas Gleixner 1248d806960SThomas Gleixner if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) 1258d806960SThomas Gleixner return false; 1268d806960SThomas Gleixner return msr & X2APIC_ENABLE; 1278d806960SThomas Gleixner } 1288d806960SThomas Gleixner 129e02ae387SPaolo Bonzini extern void enable_IR_x2apic(void); 130e02ae387SPaolo Bonzini 131e02ae387SPaolo Bonzini extern int get_physical_broadcast(void); 132e02ae387SPaolo Bonzini 133e02ae387SPaolo Bonzini extern int lapic_get_maxlvt(void); 134e02ae387SPaolo Bonzini extern void clear_local_APIC(void); 135e02ae387SPaolo Bonzini extern void disconnect_bsp_APIC(int virt_wire_setup); 136e02ae387SPaolo Bonzini extern void disable_local_APIC(void); 13760dcaad5SThomas Gleixner extern void apic_soft_disable(void); 138e02ae387SPaolo Bonzini extern void lapic_shutdown(void); 139e02ae387SPaolo Bonzini extern void sync_Arb_IDs(void); 140fc90ccfdSVille Syrjälä extern void init_bsp_APIC(void); 14197992387SThomas Gleixner extern void apic_intr_mode_select(void); 1424b1669e8SDou Liyang extern void apic_intr_mode_init(void); 143e02ae387SPaolo Bonzini extern void init_apic_mappings(void); 144e02ae387SPaolo Bonzini void register_lapic_address(unsigned long address); 145e02ae387SPaolo Bonzini extern void setup_boot_APIC_clock(void); 146e02ae387SPaolo Bonzini extern void setup_secondary_APIC_clock(void); 1476731b0d6SNicolai Stange extern void lapic_update_tsc_freq(void); 148e02ae387SPaolo Bonzini 149e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 150e02ae387SPaolo Bonzini static inline int apic_force_enable(unsigned long addr) 151e02ae387SPaolo Bonzini { 152e02ae387SPaolo Bonzini return -1; 153e02ae387SPaolo Bonzini } 154e02ae387SPaolo Bonzini #else 155e02ae387SPaolo Bonzini extern int apic_force_enable(unsigned long addr); 156e02ae387SPaolo Bonzini #endif 157e02ae387SPaolo Bonzini 158e02ae387SPaolo Bonzini extern void apic_ap_setup(void); 159e02ae387SPaolo Bonzini 160e02ae387SPaolo Bonzini /* 161e02ae387SPaolo Bonzini * On 32bit this is mach-xxx local 162e02ae387SPaolo Bonzini */ 163e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 164e02ae387SPaolo Bonzini extern int apic_is_clustered_box(void); 165e02ae387SPaolo Bonzini #else 166e02ae387SPaolo Bonzini static inline int apic_is_clustered_box(void) 167e02ae387SPaolo Bonzini { 168e02ae387SPaolo Bonzini return 0; 169e02ae387SPaolo Bonzini } 170e02ae387SPaolo Bonzini #endif 171e02ae387SPaolo Bonzini 172e02ae387SPaolo Bonzini extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask); 1730fa115daSThomas Gleixner extern void lapic_assign_system_vectors(void); 1740fa115daSThomas Gleixner extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace); 1757d65f9e8SThomas Gleixner extern void lapic_update_legacy_vectors(void); 1760fa115daSThomas Gleixner extern void lapic_online(void); 1770fa115daSThomas Gleixner extern void lapic_offline(void); 178c8c40767SThomas Gleixner extern bool apic_needs_pit(void); 179e02ae387SPaolo Bonzini 18022ca7ee9SThomas Gleixner extern void apic_send_IPI_allbutself(unsigned int vector); 18122ca7ee9SThomas Gleixner 182e02ae387SPaolo Bonzini #else /* !CONFIG_X86_LOCAL_APIC */ 183e02ae387SPaolo Bonzini static inline void lapic_shutdown(void) { } 184e02ae387SPaolo Bonzini #define local_apic_timer_c2_ok 1 185e02ae387SPaolo Bonzini static inline void init_apic_mappings(void) { } 186e02ae387SPaolo Bonzini static inline void disable_local_APIC(void) { } 187e02ae387SPaolo Bonzini # define setup_boot_APIC_clock x86_init_noop 188e02ae387SPaolo Bonzini # define setup_secondary_APIC_clock x86_init_noop 1896731b0d6SNicolai Stange static inline void lapic_update_tsc_freq(void) { } 190ccf5355dSDou Liyang static inline void init_bsp_APIC(void) { } 19197992387SThomas Gleixner static inline void apic_intr_mode_select(void) { } 1924b1669e8SDou Liyang static inline void apic_intr_mode_init(void) { } 1930fa115daSThomas Gleixner static inline void lapic_assign_system_vectors(void) { } 1940fa115daSThomas Gleixner static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { } 195c8c40767SThomas Gleixner static inline bool apic_needs_pit(void) { return true; } 196e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_LOCAL_APIC */ 197e02ae387SPaolo Bonzini 198d0b03bd1SHan, Weidong #ifdef CONFIG_X86_X2APIC 199bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 200bb898558SAl Viro { 201bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 202bb898558SAl Viro reg == APIC_LVR) 203bb898558SAl Viro return; 204bb898558SAl Viro 205bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 206bb898558SAl Viro } 207bb898558SAl Viro 2080ab711aeSMichael S. Tsirkin static inline void native_apic_msr_eoi_write(u32 reg, u32 v) 2090ab711aeSMichael S. Tsirkin { 210a585df8eSBorislav Petkov __wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0); 2110ab711aeSMichael S. Tsirkin } 2120ab711aeSMichael S. Tsirkin 213bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 214bb898558SAl Viro { 2150059b243SAndi Kleen u64 msr; 216bb898558SAl Viro 217bb898558SAl Viro if (reg == APIC_DFR) 218bb898558SAl Viro return -1; 219bb898558SAl Viro 2200059b243SAndi Kleen rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); 2210059b243SAndi Kleen return (u32)msr; 222bb898558SAl Viro } 223bb898558SAl Viro 224c1eeb2deSYinghai Lu static inline void native_x2apic_wait_icr_idle(void) 225c1eeb2deSYinghai Lu { 226c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 227c1eeb2deSYinghai Lu return; 228c1eeb2deSYinghai Lu } 229c1eeb2deSYinghai Lu 230c1eeb2deSYinghai Lu static inline u32 native_safe_x2apic_wait_icr_idle(void) 231c1eeb2deSYinghai Lu { 232c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 233c1eeb2deSYinghai Lu return 0; 234c1eeb2deSYinghai Lu } 235c1eeb2deSYinghai Lu 236c1eeb2deSYinghai Lu static inline void native_x2apic_icr_write(u32 low, u32 id) 237c1eeb2deSYinghai Lu { 238c1eeb2deSYinghai Lu wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); 239c1eeb2deSYinghai Lu } 240c1eeb2deSYinghai Lu 241c1eeb2deSYinghai Lu static inline u64 native_x2apic_icr_read(void) 242c1eeb2deSYinghai Lu { 243c1eeb2deSYinghai Lu unsigned long val; 244c1eeb2deSYinghai Lu 245c1eeb2deSYinghai Lu rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); 246c1eeb2deSYinghai Lu return val; 247c1eeb2deSYinghai Lu } 248c1eeb2deSYinghai Lu 24981a46dd8SThomas Gleixner extern int x2apic_mode; 250fc1edaf9SSuresh Siddha extern int x2apic_phys; 25126573a97SDavid Woodhouse extern void __init x2apic_set_max_apicid(u32 apicid); 252659006bfSThomas Gleixner extern void x2apic_setup(void); 253bb898558SAl Viro static inline int x2apic_enabled(void) 254bb898558SAl Viro { 25562436a4dSBorislav Petkov return boot_cpu_has(X86_FEATURE_X2APIC) && apic_is_x2apic_enabled(); 256bb898558SAl Viro } 257fc1edaf9SSuresh Siddha 25862436a4dSBorislav Petkov #define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC)) 259e02ae387SPaolo Bonzini #else /* !CONFIG_X86_X2APIC */ 260659006bfSThomas Gleixner static inline void x2apic_setup(void) { } 26155eae7deSThomas Gleixner static inline int x2apic_enabled(void) { return 0; } 262cf6567feSSuresh Siddha 26381a46dd8SThomas Gleixner #define x2apic_mode (0) 26481a46dd8SThomas Gleixner #define x2apic_supported() (0) 265e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_X2APIC */ 266*e3998434SMateusz Jończyk extern void __init check_x2apic(void); 267bb898558SAl Viro 2680e24f7c9SThomas Gleixner struct irq_data; 2690e24f7c9SThomas Gleixner 270e2780a68SIngo Molnar /* 271e2780a68SIngo Molnar * Copyright 2004 James Cleverdon, IBM. 272e2780a68SIngo Molnar * 273e2780a68SIngo Molnar * Generic APIC sub-arch data struct. 274e2780a68SIngo Molnar * 275e2780a68SIngo Molnar * Hacked for x86-64 by James Cleverdon from i386 architecture code by 276e2780a68SIngo Molnar * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and 277e2780a68SIngo Molnar * James Cleverdon. 278e2780a68SIngo Molnar */ 279be163a15SIngo Molnar struct apic { 28072f48a38SThomas Gleixner /* Hotpath functions first */ 28172f48a38SThomas Gleixner void (*eoi_write)(u32 reg, u32 v); 28272f48a38SThomas Gleixner void (*native_eoi_write)(u32 reg, u32 v); 28372f48a38SThomas Gleixner void (*write)(u32 reg, u32 v); 28472f48a38SThomas Gleixner u32 (*read)(u32 reg); 285e2780a68SIngo Molnar 28672f48a38SThomas Gleixner /* IPI related functions */ 28772f48a38SThomas Gleixner void (*wait_icr_idle)(void); 28872f48a38SThomas Gleixner u32 (*safe_wait_icr_idle)(void); 28972f48a38SThomas Gleixner 29072f48a38SThomas Gleixner void (*send_IPI)(int cpu, int vector); 29172f48a38SThomas Gleixner void (*send_IPI_mask)(const struct cpumask *mask, int vector); 29272f48a38SThomas Gleixner void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); 29372f48a38SThomas Gleixner void (*send_IPI_allbutself)(int vector); 29472f48a38SThomas Gleixner void (*send_IPI_all)(int vector); 29572f48a38SThomas Gleixner void (*send_IPI_self)(int vector); 29672f48a38SThomas Gleixner 29772f48a38SThomas Gleixner u32 disable_esr; 29872161299SThomas Gleixner 29972161299SThomas Gleixner enum apic_delivery_modes delivery_mode; 3008c44963bSThomas Gleixner bool dest_mode_logical; 30172f48a38SThomas Gleixner 3029f9e3bb1SThomas Gleixner u32 (*calc_dest_apicid)(unsigned int cpu); 30372f48a38SThomas Gleixner 30472f48a38SThomas Gleixner /* ICR related functions */ 30572f48a38SThomas Gleixner u64 (*icr_read)(void); 30672f48a38SThomas Gleixner void (*icr_write)(u32 low, u32 high); 30772f48a38SThomas Gleixner 30872f48a38SThomas Gleixner /* Probe, setup and smpboot functions */ 309e2780a68SIngo Molnar int (*probe)(void); 310e2780a68SIngo Molnar int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); 311a774635dSLi RongQing int (*apic_id_valid)(u32 apicid); 312e2780a68SIngo Molnar int (*apic_id_registered)(void); 313e2780a68SIngo Molnar 31457e0aa44SThomas Gleixner bool (*check_apicid_used)(physid_mask_t *map, int apicid); 315e2780a68SIngo Molnar void (*init_apic_ldr)(void); 3167abc0753SCyrill Gorcunov void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); 317e2780a68SIngo Molnar void (*setup_apic_routing)(void); 318e2780a68SIngo Molnar int (*cpu_present_to_apicid)(int mps_cpu); 3197abc0753SCyrill Gorcunov void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap); 320e11dadabSThomas Gleixner int (*check_phys_apicid_present)(int phys_apicid); 321e2780a68SIngo Molnar int (*phys_pkg_id)(int cpuid_apic, int index_msb); 322e2780a68SIngo Molnar 32372f48a38SThomas Gleixner u32 (*get_apic_id)(unsigned long x); 324727657e6SThomas Gleixner u32 (*set_apic_id)(unsigned int id); 325e2780a68SIngo Molnar 326e2780a68SIngo Molnar /* wakeup_secondary_cpu */ 3271f5bcabfSIngo Molnar int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); 328ff2e6468SSean Christopherson /* wakeup secondary CPU using 64-bit wakeup point */ 329ff2e6468SSean Christopherson int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); 330e2780a68SIngo Molnar 331e2780a68SIngo Molnar void (*inquire_remote_apic)(int apicid); 332e2780a68SIngo Molnar 333acb8bc09STejun Heo #ifdef CONFIG_X86_32 334acb8bc09STejun Heo /* 335acb8bc09STejun Heo * Called very early during boot from get_smp_config(). It should 336acb8bc09STejun Heo * return the logical apicid. x86_[bios]_cpu_to_apicid is 337acb8bc09STejun Heo * initialized before this function is called. 338acb8bc09STejun Heo * 339acb8bc09STejun Heo * If logical apicid can't be determined that early, the function 340acb8bc09STejun Heo * may return BAD_APICID. Logical apicid will be configured after 341acb8bc09STejun Heo * init_apic_ldr() while bringing up CPUs. Note that NUMA affinity 342acb8bc09STejun Heo * won't be applied properly during early boot in this case. 343acb8bc09STejun Heo */ 344acb8bc09STejun Heo int (*x86_32_early_logical_apicid)(int cpu); 345acb8bc09STejun Heo #endif 34672f48a38SThomas Gleixner char *name; 347e2780a68SIngo Molnar }; 348e2780a68SIngo Molnar 3490917c01fSIngo Molnar /* 3500917c01fSIngo Molnar * Pointer to the local APIC driver in use on this system (there's 3510917c01fSIngo Molnar * always just one such driver in use - the kernel decides via an 3520917c01fSIngo Molnar * early probing process which one it picks - and then sticks to it): 3530917c01fSIngo Molnar */ 354be163a15SIngo Molnar extern struct apic *apic; 3550917c01fSIngo Molnar 3560917c01fSIngo Molnar /* 357107e0e0cSSuresh Siddha * APIC drivers are probed based on how they are listed in the .apicdrivers 358107e0e0cSSuresh Siddha * section. So the order is important and enforced by the ordering 359107e0e0cSSuresh Siddha * of different apic driver files in the Makefile. 360107e0e0cSSuresh Siddha * 361107e0e0cSSuresh Siddha * For the files having two apic drivers, we use apic_drivers() 362107e0e0cSSuresh Siddha * to enforce the order with in them. 363107e0e0cSSuresh Siddha */ 364107e0e0cSSuresh Siddha #define apic_driver(sym) \ 36575fdd155SAndi Kleen static const struct apic *__apicdrivers_##sym __used \ 366107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 36733def849SJoe Perches __section(".apicdrivers") = { &sym } 368107e0e0cSSuresh Siddha 369107e0e0cSSuresh Siddha #define apic_drivers(sym1, sym2) \ 370107e0e0cSSuresh Siddha static struct apic *__apicdrivers_##sym1##sym2[2] __used \ 371107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 37233def849SJoe Perches __section(".apicdrivers") = { &sym1, &sym2 } 373107e0e0cSSuresh Siddha 374107e0e0cSSuresh Siddha extern struct apic *__apicdrivers[], *__apicdrivers_end[]; 375107e0e0cSSuresh Siddha 376107e0e0cSSuresh Siddha /* 3770917c01fSIngo Molnar * APIC functionality to boot other CPUs - only used on SMP: 3780917c01fSIngo Molnar */ 3790917c01fSIngo Molnar #ifdef CONFIG_SMP 3802b6163bfSYinghai Lu extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip); 3812cffad7bSThomas Gleixner extern int lapic_can_unplug_cpu(void); 3820917c01fSIngo Molnar #endif 383e2780a68SIngo Molnar 384d674cd19SCyrill Gorcunov #ifdef CONFIG_X86_LOCAL_APIC 385346b46beSFernando Luis Vázquez Cao 386e2780a68SIngo Molnar static inline u32 apic_read(u32 reg) 387e2780a68SIngo Molnar { 388e2780a68SIngo Molnar return apic->read(reg); 389e2780a68SIngo Molnar } 390e2780a68SIngo Molnar 391e2780a68SIngo Molnar static inline void apic_write(u32 reg, u32 val) 392e2780a68SIngo Molnar { 393e2780a68SIngo Molnar apic->write(reg, val); 394e2780a68SIngo Molnar } 395e2780a68SIngo Molnar 3962a43195dSMichael S. Tsirkin static inline void apic_eoi(void) 3972a43195dSMichael S. Tsirkin { 3982a43195dSMichael S. Tsirkin apic->eoi_write(APIC_EOI, APIC_EOI_ACK); 3992a43195dSMichael S. Tsirkin } 4002a43195dSMichael S. Tsirkin 401e2780a68SIngo Molnar static inline u64 apic_icr_read(void) 402e2780a68SIngo Molnar { 403e2780a68SIngo Molnar return apic->icr_read(); 404e2780a68SIngo Molnar } 405e2780a68SIngo Molnar 406e2780a68SIngo Molnar static inline void apic_icr_write(u32 low, u32 high) 407e2780a68SIngo Molnar { 408e2780a68SIngo Molnar apic->icr_write(low, high); 409e2780a68SIngo Molnar } 410e2780a68SIngo Molnar 411e2780a68SIngo Molnar static inline void apic_wait_icr_idle(void) 412e2780a68SIngo Molnar { 413e2780a68SIngo Molnar apic->wait_icr_idle(); 414e2780a68SIngo Molnar } 415e2780a68SIngo Molnar 416e2780a68SIngo Molnar static inline u32 safe_apic_wait_icr_idle(void) 417e2780a68SIngo Molnar { 418e2780a68SIngo Molnar return apic->safe_wait_icr_idle(); 419e2780a68SIngo Molnar } 420e2780a68SIngo Molnar 4211551df64SMichael S. Tsirkin extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); 4221551df64SMichael S. Tsirkin 423d674cd19SCyrill Gorcunov #else /* CONFIG_X86_LOCAL_APIC */ 424d674cd19SCyrill Gorcunov 425d674cd19SCyrill Gorcunov static inline u32 apic_read(u32 reg) { return 0; } 426d674cd19SCyrill Gorcunov static inline void apic_write(u32 reg, u32 val) { } 4272a43195dSMichael S. Tsirkin static inline void apic_eoi(void) { } 428d674cd19SCyrill Gorcunov static inline u64 apic_icr_read(void) { return 0; } 429d674cd19SCyrill Gorcunov static inline void apic_icr_write(u32 low, u32 high) { } 430d674cd19SCyrill Gorcunov static inline void apic_wait_icr_idle(void) { } 431d674cd19SCyrill Gorcunov static inline u32 safe_apic_wait_icr_idle(void) { return 0; } 4321551df64SMichael S. Tsirkin static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {} 433d674cd19SCyrill Gorcunov 434d674cd19SCyrill Gorcunov #endif /* CONFIG_X86_LOCAL_APIC */ 435e2780a68SIngo Molnar 436c0255770SThomas Gleixner extern void apic_ack_irq(struct irq_data *data); 437c0255770SThomas Gleixner 438e2780a68SIngo Molnar static inline void ack_APIC_irq(void) 439e2780a68SIngo Molnar { 440e2780a68SIngo Molnar /* 441e2780a68SIngo Molnar * ack_APIC_irq() actually gets compiled as a single instruction 442e2780a68SIngo Molnar * ... yummie. 443e2780a68SIngo Molnar */ 4442a43195dSMichael S. Tsirkin apic_eoi(); 445e2780a68SIngo Molnar } 446e2780a68SIngo Molnar 4476f1a4891SThomas Gleixner 4486f1a4891SThomas Gleixner static inline bool lapic_vector_set_in_irr(unsigned int vector) 4496f1a4891SThomas Gleixner { 4506f1a4891SThomas Gleixner u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); 4516f1a4891SThomas Gleixner 4526f1a4891SThomas Gleixner return !!(irr & (1U << (vector % 32))); 4536f1a4891SThomas Gleixner } 4546f1a4891SThomas Gleixner 455e2780a68SIngo Molnar static inline unsigned default_get_apic_id(unsigned long x) 456e2780a68SIngo Molnar { 457e2780a68SIngo Molnar unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 458e2780a68SIngo Molnar 45942937e81SAndreas Herrmann if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID)) 460e2780a68SIngo Molnar return (x >> 24) & 0xFF; 461e2780a68SIngo Molnar else 462e2780a68SIngo Molnar return (x >> 24) & 0x0F; 463e2780a68SIngo Molnar } 464e2780a68SIngo Molnar 465e2780a68SIngo Molnar /* 4666ab1b27cSDavid Rientjes * Warm reset vector position: 467e2780a68SIngo Molnar */ 4686ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_LOW 0x467 4696ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_HIGH 0x469 470e2780a68SIngo Molnar 471838312beSJan Beulich extern void generic_bigsmp_probe(void); 472e2780a68SIngo Molnar 473e2780a68SIngo Molnar #ifdef CONFIG_X86_LOCAL_APIC 474e2780a68SIngo Molnar 475e2780a68SIngo Molnar #include <asm/smp.h> 476e2780a68SIngo Molnar 477e2780a68SIngo Molnar #define APIC_DFR_VALUE (APIC_DFR_FLAT) 478e2780a68SIngo Molnar 4790816b0f0SVlad Zolotarov DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid); 480e2780a68SIngo Molnar 48183a10522SThomas Gleixner extern struct apic apic_noop; 482e2780a68SIngo Molnar 483e2780a68SIngo Molnar static inline unsigned int read_apic_id(void) 484e2780a68SIngo Molnar { 48583a10522SThomas Gleixner unsigned int reg = apic_read(APIC_ID); 486e2780a68SIngo Molnar 487e2780a68SIngo Molnar return apic->get_apic_id(reg); 488e2780a68SIngo Molnar } 489e2780a68SIngo Molnar 490f39642d0SKuppuswamy Sathyanarayanan #ifdef CONFIG_X86_64 491f39642d0SKuppuswamy Sathyanarayanan typedef int (*wakeup_cpu_handler)(int apicid, unsigned long start_eip); 492f39642d0SKuppuswamy Sathyanarayanan extern void acpi_wake_cpu_handler_update(wakeup_cpu_handler handler); 493f39642d0SKuppuswamy Sathyanarayanan #endif 494f39642d0SKuppuswamy Sathyanarayanan 495a774635dSLi RongQing extern int default_apic_id_valid(u32 apicid); 496a491cc90SJiang Liu extern int default_acpi_madt_oem_check(char *, char *); 497e2780a68SIngo Molnar extern void default_setup_apic_routing(void); 4989f9e3bb1SThomas Gleixner 4999f9e3bb1SThomas Gleixner extern u32 apic_default_calc_apicid(unsigned int cpu); 5009f9e3bb1SThomas Gleixner extern u32 apic_flat_calc_apicid(unsigned int cpu); 5019f9e3bb1SThomas Gleixner 50283a10522SThomas Gleixner extern bool default_check_apicid_used(physid_mask_t *map, int apicid); 50383a10522SThomas Gleixner extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap); 504e2780a68SIngo Molnar extern int default_cpu_present_to_apicid(int mps_cpu); 505e11dadabSThomas Gleixner extern int default_check_phys_apicid_present(int phys_apicid); 506e2780a68SIngo Molnar 507e2780a68SIngo Molnar #endif /* CONFIG_X86_LOCAL_APIC */ 50883a10522SThomas Gleixner 5096a4d2657SThomas Gleixner #ifdef CONFIG_SMP 5106a4d2657SThomas Gleixner bool apic_id_is_primary_thread(unsigned int id); 5116a1cb5f5SThomas Gleixner void apic_smt_update(void); 5126a4d2657SThomas Gleixner #else 5136a4d2657SThomas Gleixner static inline bool apic_id_is_primary_thread(unsigned int id) { return false; } 5146a1cb5f5SThomas Gleixner static inline void apic_smt_update(void) { } 5156a4d2657SThomas Gleixner #endif 5166a4d2657SThomas Gleixner 517b0a19555SThomas Gleixner struct msi_msg; 518f598181aSDavid Woodhouse struct irq_cfg; 519b0a19555SThomas Gleixner 520f598181aSDavid Woodhouse extern void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg, 521f598181aSDavid Woodhouse bool dmar); 522b0a19555SThomas Gleixner 52317405453SYoshihiro YUNOMAE extern void ioapic_zap_locks(void); 52417405453SYoshihiro YUNOMAE 5251965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 526