11965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 21965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 3bb898558SAl Viro 4e2780a68SIngo Molnar #include <linux/cpumask.h> 5bb898558SAl Viro #include <linux/delay.h> 6e2780a68SIngo Molnar #include <linux/pm.h> 7bb898558SAl Viro 8bb898558SAl Viro #include <asm/alternative.h> 9bb898558SAl Viro #include <asm/cpufeature.h> 10e2780a68SIngo Molnar #include <asm/processor.h> 11e2780a68SIngo Molnar #include <asm/apicdef.h> 12e2780a68SIngo Molnar #include <asm/atomic.h> 13e2780a68SIngo Molnar #include <asm/fixmap.h> 14e2780a68SIngo Molnar #include <asm/mpspec.h> 15e2780a68SIngo Molnar #include <asm/system.h> 16bb898558SAl Viro #include <asm/msr.h> 17bb898558SAl Viro 18bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 19bb898558SAl Viro 20bb898558SAl Viro /* 21bb898558SAl Viro * Debugging macros 22bb898558SAl Viro */ 23bb898558SAl Viro #define APIC_QUIET 0 24bb898558SAl Viro #define APIC_VERBOSE 1 25bb898558SAl Viro #define APIC_DEBUG 2 26bb898558SAl Viro 27bb898558SAl Viro /* 28bb898558SAl Viro * Define the default level of output to be very little 29bb898558SAl Viro * This can be turned up by using apic=verbose for more 30bb898558SAl Viro * information and apic=debug for _lots_ of information. 31bb898558SAl Viro * apic_verbosity is defined in apic.c 32bb898558SAl Viro */ 33bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 34bb898558SAl Viro if ((v) <= apic_verbosity) \ 35bb898558SAl Viro printk(s, ##a); \ 36bb898558SAl Viro } while (0) 37bb898558SAl Viro 38bb898558SAl Viro 39160d8dacSIngo Molnar #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 40bb898558SAl Viro extern void generic_apic_probe(void); 41160d8dacSIngo Molnar #else 42160d8dacSIngo Molnar static inline void generic_apic_probe(void) 43160d8dacSIngo Molnar { 44160d8dacSIngo Molnar } 45160d8dacSIngo Molnar #endif 46bb898558SAl Viro 47bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 48bb898558SAl Viro 49bb898558SAl Viro extern unsigned int apic_verbosity; 50bb898558SAl Viro extern int local_apic_timer_c2_ok; 51bb898558SAl Viro 52bb898558SAl Viro extern int disable_apic; 530939e4fdSIngo Molnar 540939e4fdSIngo Molnar #ifdef CONFIG_SMP 550939e4fdSIngo Molnar extern void __inquire_remote_apic(int apicid); 560939e4fdSIngo Molnar #else /* CONFIG_SMP */ 570939e4fdSIngo Molnar static inline void __inquire_remote_apic(int apicid) 580939e4fdSIngo Molnar { 590939e4fdSIngo Molnar } 600939e4fdSIngo Molnar #endif /* CONFIG_SMP */ 610939e4fdSIngo Molnar 620939e4fdSIngo Molnar static inline void default_inquire_remote_apic(int apicid) 630939e4fdSIngo Molnar { 640939e4fdSIngo Molnar if (apic_verbosity >= APIC_DEBUG) 650939e4fdSIngo Molnar __inquire_remote_apic(apicid); 660939e4fdSIngo Molnar } 670939e4fdSIngo Molnar 68bb898558SAl Viro /* 69bb898558SAl Viro * Basic functions accessing APICs. 70bb898558SAl Viro */ 71bb898558SAl Viro #ifdef CONFIG_PARAVIRT 72bb898558SAl Viro #include <asm/paravirt.h> 73bb898558SAl Viro #else 74bb898558SAl Viro #define setup_boot_clock setup_boot_APIC_clock 75bb898558SAl Viro #define setup_secondary_clock setup_secondary_APIC_clock 76bb898558SAl Viro #endif 77bb898558SAl Viro 78bb898558SAl Viro extern int is_vsmp_box(void); 79bb898558SAl Viro extern void xapic_wait_icr_idle(void); 80bb898558SAl Viro extern u32 safe_xapic_wait_icr_idle(void); 81bb898558SAl Viro extern void xapic_icr_write(u32, u32); 82bb898558SAl Viro extern int setup_profiling_timer(unsigned int); 83bb898558SAl Viro 84bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 85bb898558SAl Viro { 86bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 87bb898558SAl Viro 88bb898558SAl Viro alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP, 89bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 90bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 91bb898558SAl Viro } 92bb898558SAl Viro 93bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 94bb898558SAl Viro { 95bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 96bb898558SAl Viro } 97bb898558SAl Viro 98c1eeb2deSYinghai Lu extern void native_apic_wait_icr_idle(void); 99c1eeb2deSYinghai Lu extern u32 native_safe_apic_wait_icr_idle(void); 100c1eeb2deSYinghai Lu extern void native_apic_icr_write(u32 low, u32 id); 101c1eeb2deSYinghai Lu extern u64 native_apic_icr_read(void); 102c1eeb2deSYinghai Lu 103c1eeb2deSYinghai Lu #ifdef CONFIG_X86_X2APIC 104bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 105bb898558SAl Viro { 106bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 107bb898558SAl Viro reg == APIC_LVR) 108bb898558SAl Viro return; 109bb898558SAl Viro 110bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 111bb898558SAl Viro } 112bb898558SAl Viro 113bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 114bb898558SAl Viro { 115bb898558SAl Viro u32 low, high; 116bb898558SAl Viro 117bb898558SAl Viro if (reg == APIC_DFR) 118bb898558SAl Viro return -1; 119bb898558SAl Viro 120bb898558SAl Viro rdmsr(APIC_BASE_MSR + (reg >> 4), low, high); 121bb898558SAl Viro return low; 122bb898558SAl Viro } 123bb898558SAl Viro 124c1eeb2deSYinghai Lu static inline void native_x2apic_wait_icr_idle(void) 125c1eeb2deSYinghai Lu { 126c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 127c1eeb2deSYinghai Lu return; 128c1eeb2deSYinghai Lu } 129c1eeb2deSYinghai Lu 130c1eeb2deSYinghai Lu static inline u32 native_safe_x2apic_wait_icr_idle(void) 131c1eeb2deSYinghai Lu { 132c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 133c1eeb2deSYinghai Lu return 0; 134c1eeb2deSYinghai Lu } 135c1eeb2deSYinghai Lu 136c1eeb2deSYinghai Lu static inline void native_x2apic_icr_write(u32 low, u32 id) 137c1eeb2deSYinghai Lu { 138c1eeb2deSYinghai Lu wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); 139c1eeb2deSYinghai Lu } 140c1eeb2deSYinghai Lu 141c1eeb2deSYinghai Lu static inline u64 native_x2apic_icr_read(void) 142c1eeb2deSYinghai Lu { 143c1eeb2deSYinghai Lu unsigned long val; 144c1eeb2deSYinghai Lu 145c1eeb2deSYinghai Lu rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); 146c1eeb2deSYinghai Lu return val; 147c1eeb2deSYinghai Lu } 148c1eeb2deSYinghai Lu 149b6b301aaSJaswinder Singh extern int x2apic; 150bb898558SAl Viro extern void check_x2apic(void); 151bb898558SAl Viro extern void enable_x2apic(void); 152bb898558SAl Viro extern void enable_IR_x2apic(void); 153bb898558SAl Viro extern void x2apic_icr_write(u32 low, u32 id); 154bb898558SAl Viro static inline int x2apic_enabled(void) 155bb898558SAl Viro { 156bb898558SAl Viro int msr, msr2; 157bb898558SAl Viro 158bb898558SAl Viro if (!cpu_has_x2apic) 159bb898558SAl Viro return 0; 160bb898558SAl Viro 161bb898558SAl Viro rdmsr(MSR_IA32_APICBASE, msr, msr2); 162bb898558SAl Viro if (msr & X2APIC_ENABLE) 163bb898558SAl Viro return 1; 164bb898558SAl Viro return 0; 165bb898558SAl Viro } 166bb898558SAl Viro #else 16706cd9a7dSYinghai Lu static inline void check_x2apic(void) 16806cd9a7dSYinghai Lu { 16906cd9a7dSYinghai Lu } 17006cd9a7dSYinghai Lu static inline void enable_x2apic(void) 17106cd9a7dSYinghai Lu { 17206cd9a7dSYinghai Lu } 17306cd9a7dSYinghai Lu static inline void enable_IR_x2apic(void) 17406cd9a7dSYinghai Lu { 17506cd9a7dSYinghai Lu } 17606cd9a7dSYinghai Lu static inline int x2apic_enabled(void) 17706cd9a7dSYinghai Lu { 17806cd9a7dSYinghai Lu return 0; 17906cd9a7dSYinghai Lu } 180bb898558SAl Viro #endif 181bb898558SAl Viro 182bb898558SAl Viro extern int get_physical_broadcast(void); 183bb898558SAl Viro 18406cd9a7dSYinghai Lu #ifdef CONFIG_X86_X2APIC 185bb898558SAl Viro static inline void ack_x2APIC_irq(void) 186bb898558SAl Viro { 187bb898558SAl Viro /* Docs say use 0 for future compatibility */ 188bb898558SAl Viro native_apic_msr_write(APIC_EOI, 0); 189bb898558SAl Viro } 190bb898558SAl Viro #endif 191bb898558SAl Viro 192bb898558SAl Viro extern int lapic_get_maxlvt(void); 193bb898558SAl Viro extern void clear_local_APIC(void); 194bb898558SAl Viro extern void connect_bsp_APIC(void); 195bb898558SAl Viro extern void disconnect_bsp_APIC(int virt_wire_setup); 196bb898558SAl Viro extern void disable_local_APIC(void); 197bb898558SAl Viro extern void lapic_shutdown(void); 198bb898558SAl Viro extern int verify_local_APIC(void); 199bb898558SAl Viro extern void cache_APIC_registers(void); 200bb898558SAl Viro extern void sync_Arb_IDs(void); 201bb898558SAl Viro extern void init_bsp_APIC(void); 202bb898558SAl Viro extern void setup_local_APIC(void); 203bb898558SAl Viro extern void end_local_APIC_setup(void); 204bb898558SAl Viro extern void init_apic_mappings(void); 205bb898558SAl Viro extern void setup_boot_APIC_clock(void); 206bb898558SAl Viro extern void setup_secondary_APIC_clock(void); 207bb898558SAl Viro extern int APIC_init_uniprocessor(void); 208bb898558SAl Viro extern void enable_NMI_through_LVT0(void); 209bb898558SAl Viro 210bb898558SAl Viro /* 211bb898558SAl Viro * On 32bit this is mach-xxx local 212bb898558SAl Viro */ 213bb898558SAl Viro #ifdef CONFIG_X86_64 214bb898558SAl Viro extern void early_init_lapic_mapping(void); 215bb898558SAl Viro extern int apic_is_clustered_box(void); 216bb898558SAl Viro #else 217bb898558SAl Viro static inline int apic_is_clustered_box(void) 218bb898558SAl Viro { 219bb898558SAl Viro return 0; 220bb898558SAl Viro } 221bb898558SAl Viro #endif 222bb898558SAl Viro 223bb898558SAl Viro extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); 224bb898558SAl Viro extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); 225bb898558SAl Viro 226bb898558SAl Viro 227bb898558SAl Viro #else /* !CONFIG_X86_LOCAL_APIC */ 228bb898558SAl Viro static inline void lapic_shutdown(void) { } 229bb898558SAl Viro #define local_apic_timer_c2_ok 1 230bb898558SAl Viro static inline void init_apic_mappings(void) { } 231d3ec5caeSIvan Vecera static inline void disable_local_APIC(void) { } 232bb898558SAl Viro 233bb898558SAl Viro #endif /* !CONFIG_X86_LOCAL_APIC */ 234bb898558SAl Viro 2351f75ed0cSIngo Molnar #ifdef CONFIG_X86_64 2361f75ed0cSIngo Molnar #define SET_APIC_ID(x) (apic->set_apic_id(x)) 2371f75ed0cSIngo Molnar #else 2381f75ed0cSIngo Molnar 2391f75ed0cSIngo Molnar #endif 2401f75ed0cSIngo Molnar 241e2780a68SIngo Molnar /* 242e2780a68SIngo Molnar * Copyright 2004 James Cleverdon, IBM. 243e2780a68SIngo Molnar * Subject to the GNU Public License, v.2 244e2780a68SIngo Molnar * 245e2780a68SIngo Molnar * Generic APIC sub-arch data struct. 246e2780a68SIngo Molnar * 247e2780a68SIngo Molnar * Hacked for x86-64 by James Cleverdon from i386 architecture code by 248e2780a68SIngo Molnar * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and 249e2780a68SIngo Molnar * James Cleverdon. 250e2780a68SIngo Molnar */ 251e2780a68SIngo Molnar struct genapic { 252e2780a68SIngo Molnar char *name; 253e2780a68SIngo Molnar 254e2780a68SIngo Molnar int (*probe)(void); 255e2780a68SIngo Molnar int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); 256e2780a68SIngo Molnar int (*apic_id_registered)(void); 257e2780a68SIngo Molnar 258e2780a68SIngo Molnar u32 irq_delivery_mode; 259e2780a68SIngo Molnar u32 irq_dest_mode; 260e2780a68SIngo Molnar 261e2780a68SIngo Molnar const struct cpumask *(*target_cpus)(void); 262e2780a68SIngo Molnar 263e2780a68SIngo Molnar int disable_esr; 264e2780a68SIngo Molnar 265e2780a68SIngo Molnar int dest_logical; 266e2780a68SIngo Molnar unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid); 267e2780a68SIngo Molnar unsigned long (*check_apicid_present)(int apicid); 268e2780a68SIngo Molnar 269e2780a68SIngo Molnar void (*vector_allocation_domain)(int cpu, struct cpumask *retmask); 270e2780a68SIngo Molnar void (*init_apic_ldr)(void); 271e2780a68SIngo Molnar 272e2780a68SIngo Molnar physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map); 273e2780a68SIngo Molnar 274e2780a68SIngo Molnar void (*setup_apic_routing)(void); 275e2780a68SIngo Molnar int (*multi_timer_check)(int apic, int irq); 276e2780a68SIngo Molnar int (*apicid_to_node)(int logical_apicid); 277e2780a68SIngo Molnar int (*cpu_to_logical_apicid)(int cpu); 278e2780a68SIngo Molnar int (*cpu_present_to_apicid)(int mps_cpu); 279e2780a68SIngo Molnar physid_mask_t (*apicid_to_cpu_present)(int phys_apicid); 280e2780a68SIngo Molnar void (*setup_portio_remap)(void); 281e2780a68SIngo Molnar int (*check_phys_apicid_present)(int boot_cpu_physical_apicid); 282e2780a68SIngo Molnar void (*enable_apic_mode)(void); 283e2780a68SIngo Molnar int (*phys_pkg_id)(int cpuid_apic, int index_msb); 284e2780a68SIngo Molnar 285e2780a68SIngo Molnar /* 286e2780a68SIngo Molnar * When one of the next two hooks returns 1 the genapic 287e2780a68SIngo Molnar * is switched to this. Essentially they are additional 288e2780a68SIngo Molnar * probe functions: 289e2780a68SIngo Molnar */ 290e2780a68SIngo Molnar int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid); 291e2780a68SIngo Molnar 292e2780a68SIngo Molnar unsigned int (*get_apic_id)(unsigned long x); 293e2780a68SIngo Molnar unsigned long (*set_apic_id)(unsigned int id); 294e2780a68SIngo Molnar unsigned long apic_id_mask; 295e2780a68SIngo Molnar 296e2780a68SIngo Molnar unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask); 297e2780a68SIngo Molnar unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask, 298e2780a68SIngo Molnar const struct cpumask *andmask); 299e2780a68SIngo Molnar 300e2780a68SIngo Molnar /* ipi */ 301e2780a68SIngo Molnar void (*send_IPI_mask)(const struct cpumask *mask, int vector); 302e2780a68SIngo Molnar void (*send_IPI_mask_allbutself)(const struct cpumask *mask, 303e2780a68SIngo Molnar int vector); 304e2780a68SIngo Molnar void (*send_IPI_allbutself)(int vector); 305e2780a68SIngo Molnar void (*send_IPI_all)(int vector); 306e2780a68SIngo Molnar void (*send_IPI_self)(int vector); 307e2780a68SIngo Molnar 308e2780a68SIngo Molnar /* wakeup_secondary_cpu */ 309e2780a68SIngo Molnar int (*wakeup_cpu)(int apicid, unsigned long start_eip); 310e2780a68SIngo Molnar 311e2780a68SIngo Molnar int trampoline_phys_low; 312e2780a68SIngo Molnar int trampoline_phys_high; 313e2780a68SIngo Molnar 314e2780a68SIngo Molnar void (*wait_for_init_deassert)(atomic_t *deassert); 315e2780a68SIngo Molnar void (*smp_callin_clear_local_apic)(void); 316e2780a68SIngo Molnar void (*store_NMI_vector)(unsigned short *high, unsigned short *low); 317e2780a68SIngo Molnar void (*inquire_remote_apic)(int apicid); 318e2780a68SIngo Molnar 319e2780a68SIngo Molnar /* apic ops */ 320e2780a68SIngo Molnar u32 (*read)(u32 reg); 321e2780a68SIngo Molnar void (*write)(u32 reg, u32 v); 322e2780a68SIngo Molnar u64 (*icr_read)(void); 323e2780a68SIngo Molnar void (*icr_write)(u32 low, u32 high); 324e2780a68SIngo Molnar void (*wait_icr_idle)(void); 325e2780a68SIngo Molnar u32 (*safe_wait_icr_idle)(void); 326e2780a68SIngo Molnar }; 327e2780a68SIngo Molnar 328e2780a68SIngo Molnar extern struct genapic *apic; 329e2780a68SIngo Molnar 330e2780a68SIngo Molnar static inline u32 apic_read(u32 reg) 331e2780a68SIngo Molnar { 332e2780a68SIngo Molnar return apic->read(reg); 333e2780a68SIngo Molnar } 334e2780a68SIngo Molnar 335e2780a68SIngo Molnar static inline void apic_write(u32 reg, u32 val) 336e2780a68SIngo Molnar { 337e2780a68SIngo Molnar apic->write(reg, val); 338e2780a68SIngo Molnar } 339e2780a68SIngo Molnar 340e2780a68SIngo Molnar static inline u64 apic_icr_read(void) 341e2780a68SIngo Molnar { 342e2780a68SIngo Molnar return apic->icr_read(); 343e2780a68SIngo Molnar } 344e2780a68SIngo Molnar 345e2780a68SIngo Molnar static inline void apic_icr_write(u32 low, u32 high) 346e2780a68SIngo Molnar { 347e2780a68SIngo Molnar apic->icr_write(low, high); 348e2780a68SIngo Molnar } 349e2780a68SIngo Molnar 350e2780a68SIngo Molnar static inline void apic_wait_icr_idle(void) 351e2780a68SIngo Molnar { 352e2780a68SIngo Molnar apic->wait_icr_idle(); 353e2780a68SIngo Molnar } 354e2780a68SIngo Molnar 355e2780a68SIngo Molnar static inline u32 safe_apic_wait_icr_idle(void) 356e2780a68SIngo Molnar { 357e2780a68SIngo Molnar return apic->safe_wait_icr_idle(); 358e2780a68SIngo Molnar } 359e2780a68SIngo Molnar 360e2780a68SIngo Molnar 361e2780a68SIngo Molnar static inline void ack_APIC_irq(void) 362e2780a68SIngo Molnar { 363e2780a68SIngo Molnar /* 364e2780a68SIngo Molnar * ack_APIC_irq() actually gets compiled as a single instruction 365e2780a68SIngo Molnar * ... yummie. 366e2780a68SIngo Molnar */ 367e2780a68SIngo Molnar 368e2780a68SIngo Molnar /* Docs say use 0 for future compatibility */ 369e2780a68SIngo Molnar apic_write(APIC_EOI, 0); 370e2780a68SIngo Molnar } 371e2780a68SIngo Molnar 372e2780a68SIngo Molnar static inline unsigned default_get_apic_id(unsigned long x) 373e2780a68SIngo Molnar { 374e2780a68SIngo Molnar unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 375e2780a68SIngo Molnar 376e2780a68SIngo Molnar if (APIC_XAPIC(ver)) 377e2780a68SIngo Molnar return (x >> 24) & 0xFF; 378e2780a68SIngo Molnar else 379e2780a68SIngo Molnar return (x >> 24) & 0x0F; 380e2780a68SIngo Molnar } 381e2780a68SIngo Molnar 382e2780a68SIngo Molnar /* 383e2780a68SIngo Molnar * Warm reset vector default position: 384e2780a68SIngo Molnar */ 385e2780a68SIngo Molnar #define DEFAULT_TRAMPOLINE_PHYS_LOW 0x467 386e2780a68SIngo Molnar #define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469 387e2780a68SIngo Molnar 388e2780a68SIngo Molnar #ifdef CONFIG_X86_32 389e2780a68SIngo Molnar extern void es7000_update_genapic_to_cluster(void); 390e2780a68SIngo Molnar #else 391e2780a68SIngo Molnar extern struct genapic apic_flat; 392e2780a68SIngo Molnar extern struct genapic apic_physflat; 393e2780a68SIngo Molnar extern struct genapic apic_x2apic_cluster; 394e2780a68SIngo Molnar extern struct genapic apic_x2apic_phys; 395e2780a68SIngo Molnar extern int default_acpi_madt_oem_check(char *, char *); 396e2780a68SIngo Molnar 397e2780a68SIngo Molnar extern void apic_send_IPI_self(int vector); 398e2780a68SIngo Molnar 399e2780a68SIngo Molnar extern struct genapic apic_x2apic_uv_x; 400e2780a68SIngo Molnar DECLARE_PER_CPU(int, x2apic_extra_bits); 401e2780a68SIngo Molnar 402e2780a68SIngo Molnar extern int default_cpu_present_to_apicid(int mps_cpu); 403e2780a68SIngo Molnar extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid); 404e2780a68SIngo Molnar #endif 405e2780a68SIngo Molnar 406e2780a68SIngo Molnar static inline void default_wait_for_init_deassert(atomic_t *deassert) 407e2780a68SIngo Molnar { 408e2780a68SIngo Molnar while (!atomic_read(deassert)) 409e2780a68SIngo Molnar cpu_relax(); 410e2780a68SIngo Molnar return; 411e2780a68SIngo Molnar } 412e2780a68SIngo Molnar 413e2780a68SIngo Molnar extern void generic_bigsmp_probe(void); 414e2780a68SIngo Molnar 415e2780a68SIngo Molnar 416e2780a68SIngo Molnar #ifdef CONFIG_X86_LOCAL_APIC 417e2780a68SIngo Molnar 418e2780a68SIngo Molnar #include <asm/smp.h> 419e2780a68SIngo Molnar 420e2780a68SIngo Molnar #define APIC_DFR_VALUE (APIC_DFR_FLAT) 421e2780a68SIngo Molnar 422e2780a68SIngo Molnar static inline const struct cpumask *default_target_cpus(void) 423e2780a68SIngo Molnar { 424e2780a68SIngo Molnar #ifdef CONFIG_SMP 425e2780a68SIngo Molnar return cpu_online_mask; 426e2780a68SIngo Molnar #else 427e2780a68SIngo Molnar return cpumask_of(0); 428e2780a68SIngo Molnar #endif 429e2780a68SIngo Molnar } 430e2780a68SIngo Molnar 431e2780a68SIngo Molnar DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid); 432e2780a68SIngo Molnar 433e2780a68SIngo Molnar 434e2780a68SIngo Molnar static inline unsigned int read_apic_id(void) 435e2780a68SIngo Molnar { 436e2780a68SIngo Molnar unsigned int reg; 437e2780a68SIngo Molnar 438e2780a68SIngo Molnar reg = apic_read(APIC_ID); 439e2780a68SIngo Molnar 440e2780a68SIngo Molnar return apic->get_apic_id(reg); 441e2780a68SIngo Molnar } 442e2780a68SIngo Molnar 443e2780a68SIngo Molnar extern void default_setup_apic_routing(void); 444e2780a68SIngo Molnar 445e2780a68SIngo Molnar #ifdef CONFIG_X86_32 446e2780a68SIngo Molnar /* 447e2780a68SIngo Molnar * Set up the logical destination ID. 448e2780a68SIngo Molnar * 449e2780a68SIngo Molnar * Intel recommends to set DFR, LDR and TPR before enabling 450e2780a68SIngo Molnar * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel 451e2780a68SIngo Molnar * document number 292116). So here it goes... 452e2780a68SIngo Molnar */ 453e2780a68SIngo Molnar extern void default_init_apic_ldr(void); 454e2780a68SIngo Molnar 455e2780a68SIngo Molnar static inline int default_apic_id_registered(void) 456e2780a68SIngo Molnar { 457e2780a68SIngo Molnar return physid_isset(read_apic_id(), phys_cpu_present_map); 458e2780a68SIngo Molnar } 459e2780a68SIngo Molnar 460e2780a68SIngo Molnar static inline unsigned int 461e2780a68SIngo Molnar default_cpu_mask_to_apicid(const struct cpumask *cpumask) 462e2780a68SIngo Molnar { 463e2780a68SIngo Molnar return cpumask_bits(cpumask)[0]; 464e2780a68SIngo Molnar } 465e2780a68SIngo Molnar 466e2780a68SIngo Molnar static inline unsigned int 467e2780a68SIngo Molnar default_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 468e2780a68SIngo Molnar const struct cpumask *andmask) 469e2780a68SIngo Molnar { 470e2780a68SIngo Molnar unsigned long mask1 = cpumask_bits(cpumask)[0]; 471e2780a68SIngo Molnar unsigned long mask2 = cpumask_bits(andmask)[0]; 472e2780a68SIngo Molnar unsigned long mask3 = cpumask_bits(cpu_online_mask)[0]; 473e2780a68SIngo Molnar 474e2780a68SIngo Molnar return (unsigned int)(mask1 & mask2 & mask3); 475e2780a68SIngo Molnar } 476e2780a68SIngo Molnar 477e2780a68SIngo Molnar static inline int default_phys_pkg_id(int cpuid_apic, int index_msb) 478e2780a68SIngo Molnar { 479e2780a68SIngo Molnar return cpuid_apic >> index_msb; 480e2780a68SIngo Molnar } 481e2780a68SIngo Molnar 482e2780a68SIngo Molnar extern int default_apicid_to_node(int logical_apicid); 483e2780a68SIngo Molnar 484e2780a68SIngo Molnar #endif 485e2780a68SIngo Molnar 486e2780a68SIngo Molnar static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid) 487e2780a68SIngo Molnar { 488e2780a68SIngo Molnar return physid_isset(apicid, bitmap); 489e2780a68SIngo Molnar } 490e2780a68SIngo Molnar 491e2780a68SIngo Molnar static inline unsigned long default_check_apicid_present(int bit) 492e2780a68SIngo Molnar { 493e2780a68SIngo Molnar return physid_isset(bit, phys_cpu_present_map); 494e2780a68SIngo Molnar } 495e2780a68SIngo Molnar 496e2780a68SIngo Molnar static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map) 497e2780a68SIngo Molnar { 498e2780a68SIngo Molnar return phys_map; 499e2780a68SIngo Molnar } 500e2780a68SIngo Molnar 501e2780a68SIngo Molnar /* Mapping from cpu number to logical apicid */ 502e2780a68SIngo Molnar static inline int default_cpu_to_logical_apicid(int cpu) 503e2780a68SIngo Molnar { 504e2780a68SIngo Molnar return 1 << cpu; 505e2780a68SIngo Molnar } 506e2780a68SIngo Molnar 507e2780a68SIngo Molnar static inline int __default_cpu_present_to_apicid(int mps_cpu) 508e2780a68SIngo Molnar { 509e2780a68SIngo Molnar if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu)) 510e2780a68SIngo Molnar return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); 511e2780a68SIngo Molnar else 512e2780a68SIngo Molnar return BAD_APICID; 513e2780a68SIngo Molnar } 514e2780a68SIngo Molnar 515e2780a68SIngo Molnar static inline int 516e2780a68SIngo Molnar __default_check_phys_apicid_present(int boot_cpu_physical_apicid) 517e2780a68SIngo Molnar { 518e2780a68SIngo Molnar return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map); 519e2780a68SIngo Molnar } 520e2780a68SIngo Molnar 521e2780a68SIngo Molnar #ifdef CONFIG_X86_32 522e2780a68SIngo Molnar static inline int default_cpu_present_to_apicid(int mps_cpu) 523e2780a68SIngo Molnar { 524e2780a68SIngo Molnar return __default_cpu_present_to_apicid(mps_cpu); 525e2780a68SIngo Molnar } 526e2780a68SIngo Molnar 527e2780a68SIngo Molnar static inline int 528e2780a68SIngo Molnar default_check_phys_apicid_present(int boot_cpu_physical_apicid) 529e2780a68SIngo Molnar { 530e2780a68SIngo Molnar return __default_check_phys_apicid_present(boot_cpu_physical_apicid); 531e2780a68SIngo Molnar } 532e2780a68SIngo Molnar #else 533e2780a68SIngo Molnar extern int default_cpu_present_to_apicid(int mps_cpu); 534e2780a68SIngo Molnar extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid); 535e2780a68SIngo Molnar #endif 536e2780a68SIngo Molnar 537e2780a68SIngo Molnar static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid) 538e2780a68SIngo Molnar { 539e2780a68SIngo Molnar return physid_mask_of_physid(phys_apicid); 540e2780a68SIngo Molnar } 541e2780a68SIngo Molnar 542e2780a68SIngo Molnar #endif /* CONFIG_X86_LOCAL_APIC */ 543e2780a68SIngo Molnar 5441965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 545