17e300dabSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 21965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 31965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 4bb898558SAl Viro 5e2780a68SIngo Molnar #include <linux/cpumask.h> 6bb898558SAl Viro 7bb898558SAl Viro #include <asm/alternative.h> 8bb898558SAl Viro #include <asm/cpufeature.h> 9e2780a68SIngo Molnar #include <asm/apicdef.h> 1060063497SArun Sharma #include <linux/atomic.h> 11e2780a68SIngo Molnar #include <asm/fixmap.h> 12e2780a68SIngo Molnar #include <asm/mpspec.h> 13bb898558SAl Viro #include <asm/msr.h> 14ffcba43fSNicolai Stange #include <asm/hardirq.h> 15bb898558SAl Viro 16bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 17bb898558SAl Viro 18bb898558SAl Viro /* 19bb898558SAl Viro * Debugging macros 20bb898558SAl Viro */ 21bb898558SAl Viro #define APIC_QUIET 0 22bb898558SAl Viro #define APIC_VERBOSE 1 23bb898558SAl Viro #define APIC_DEBUG 2 24bb898558SAl Viro 25b7c4948eSHidehiro Kawai /* Macros for apic_extnmi which controls external NMI masking */ 26b7c4948eSHidehiro Kawai #define APIC_EXTNMI_BSP 0 /* Default */ 27b7c4948eSHidehiro Kawai #define APIC_EXTNMI_ALL 1 28b7c4948eSHidehiro Kawai #define APIC_EXTNMI_NONE 2 29b7c4948eSHidehiro Kawai 30bb898558SAl Viro /* 31bb898558SAl Viro * Define the default level of output to be very little 32bb898558SAl Viro * This can be turned up by using apic=verbose for more 33bb898558SAl Viro * information and apic=debug for _lots_ of information. 34bb898558SAl Viro * apic_verbosity is defined in apic.c 35bb898558SAl Viro */ 36bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 37bb898558SAl Viro if ((v) <= apic_verbosity) \ 38bb898558SAl Viro printk(s, ##a); \ 39bb898558SAl Viro } while (0) 40bb898558SAl Viro 41bb898558SAl Viro 42160d8dacSIngo Molnar #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 43bb898558SAl Viro extern void generic_apic_probe(void); 44160d8dacSIngo Molnar #else 45160d8dacSIngo Molnar static inline void generic_apic_probe(void) 46160d8dacSIngo Molnar { 47160d8dacSIngo Molnar } 48160d8dacSIngo Molnar #endif 49bb898558SAl Viro 50bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 51bb898558SAl Viro 52ec633558SQian Cai extern int apic_verbosity; 53bb898558SAl Viro extern int local_apic_timer_c2_ok; 54bb898558SAl Viro 5549062454SThomas Gleixner extern bool apic_is_disabled; 5652ae346bSDaniel Drake extern unsigned int lapic_timer_period; 570939e4fdSIngo Molnar 587e75178aSDavid Woodhouse extern int cpuid_to_apicid[]; 597e75178aSDavid Woodhouse 604f45ed9fSDou Liyang extern enum apic_intr_mode_id apic_intr_mode; 614f45ed9fSDou Liyang enum apic_intr_mode_id { 624f45ed9fSDou Liyang APIC_PIC, 634f45ed9fSDou Liyang APIC_VIRTUAL_WIRE, 644f45ed9fSDou Liyang APIC_VIRTUAL_WIRE_NO_CONFIG, 654f45ed9fSDou Liyang APIC_SYMMETRIC_IO, 664f45ed9fSDou Liyang APIC_SYMMETRIC_IO_NO_ROUTING 674f45ed9fSDou Liyang }; 684f45ed9fSDou Liyang 69bb898558SAl Viro /* 708312136fSCyrill Gorcunov * With 82489DX we can't rely on apic feature bit 718312136fSCyrill Gorcunov * retrieved via cpuid but still have to deal with 728312136fSCyrill Gorcunov * such an apic chip so we assume that SMP configuration 738312136fSCyrill Gorcunov * is found from MP table (64bit case uses ACPI mostly 748312136fSCyrill Gorcunov * which set smp presence flag as well so we are safe 758312136fSCyrill Gorcunov * to use this helper too). 768312136fSCyrill Gorcunov */ 778312136fSCyrill Gorcunov static inline bool apic_from_smp_config(void) 788312136fSCyrill Gorcunov { 7949062454SThomas Gleixner return smp_found_config && !apic_is_disabled; 808312136fSCyrill Gorcunov } 818312136fSCyrill Gorcunov 828312136fSCyrill Gorcunov /* 83bb898558SAl Viro * Basic functions accessing APICs. 84bb898558SAl Viro */ 85bb898558SAl Viro #ifdef CONFIG_PARAVIRT 86bb898558SAl Viro #include <asm/paravirt.h> 87bb898558SAl Viro #endif 88bb898558SAl Viro 89bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 90bb898558SAl Viro { 91bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 92bb898558SAl Viro 93a930dc45SBorislav Petkov alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP, 94bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 95bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 96bb898558SAl Viro } 97bb898558SAl Viro 98bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 99bb898558SAl Viro { 100bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 101bb898558SAl Viro } 102bb898558SAl Viro 103c1eeb2deSYinghai Lu extern void native_apic_wait_icr_idle(void); 104c1eeb2deSYinghai Lu extern u32 native_safe_apic_wait_icr_idle(void); 105c1eeb2deSYinghai Lu extern void native_apic_icr_write(u32 low, u32 id); 106c1eeb2deSYinghai Lu extern u64 native_apic_icr_read(void); 107c1eeb2deSYinghai Lu 1088d806960SThomas Gleixner static inline bool apic_is_x2apic_enabled(void) 1098d806960SThomas Gleixner { 1108d806960SThomas Gleixner u64 msr; 1118d806960SThomas Gleixner 1128d806960SThomas Gleixner if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) 1138d806960SThomas Gleixner return false; 1148d806960SThomas Gleixner return msr & X2APIC_ENABLE; 1158d806960SThomas Gleixner } 1168d806960SThomas Gleixner 117e02ae387SPaolo Bonzini extern void enable_IR_x2apic(void); 118e02ae387SPaolo Bonzini 119e02ae387SPaolo Bonzini extern int get_physical_broadcast(void); 120e02ae387SPaolo Bonzini 121e02ae387SPaolo Bonzini extern int lapic_get_maxlvt(void); 122e02ae387SPaolo Bonzini extern void clear_local_APIC(void); 123e02ae387SPaolo Bonzini extern void disconnect_bsp_APIC(int virt_wire_setup); 124e02ae387SPaolo Bonzini extern void disable_local_APIC(void); 12560dcaad5SThomas Gleixner extern void apic_soft_disable(void); 126e02ae387SPaolo Bonzini extern void lapic_shutdown(void); 127e02ae387SPaolo Bonzini extern void sync_Arb_IDs(void); 128fc90ccfdSVille Syrjälä extern void init_bsp_APIC(void); 12997992387SThomas Gleixner extern void apic_intr_mode_select(void); 1304b1669e8SDou Liyang extern void apic_intr_mode_init(void); 131e02ae387SPaolo Bonzini extern void init_apic_mappings(void); 132e02ae387SPaolo Bonzini void register_lapic_address(unsigned long address); 133e02ae387SPaolo Bonzini extern void setup_boot_APIC_clock(void); 134e02ae387SPaolo Bonzini extern void setup_secondary_APIC_clock(void); 1356731b0d6SNicolai Stange extern void lapic_update_tsc_freq(void); 136e02ae387SPaolo Bonzini 137e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 138e02ae387SPaolo Bonzini static inline int apic_force_enable(unsigned long addr) 139e02ae387SPaolo Bonzini { 140e02ae387SPaolo Bonzini return -1; 141e02ae387SPaolo Bonzini } 142e02ae387SPaolo Bonzini #else 143e02ae387SPaolo Bonzini extern int apic_force_enable(unsigned long addr); 144e02ae387SPaolo Bonzini #endif 145e02ae387SPaolo Bonzini 146e02ae387SPaolo Bonzini extern void apic_ap_setup(void); 147e02ae387SPaolo Bonzini 148e02ae387SPaolo Bonzini /* 149e02ae387SPaolo Bonzini * On 32bit this is mach-xxx local 150e02ae387SPaolo Bonzini */ 151e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 152e02ae387SPaolo Bonzini extern int apic_is_clustered_box(void); 153e02ae387SPaolo Bonzini #else 154e02ae387SPaolo Bonzini static inline int apic_is_clustered_box(void) 155e02ae387SPaolo Bonzini { 156e02ae387SPaolo Bonzini return 0; 157e02ae387SPaolo Bonzini } 158e02ae387SPaolo Bonzini #endif 159e02ae387SPaolo Bonzini 160e02ae387SPaolo Bonzini extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask); 1610fa115daSThomas Gleixner extern void lapic_assign_system_vectors(void); 1620fa115daSThomas Gleixner extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace); 1637d65f9e8SThomas Gleixner extern void lapic_update_legacy_vectors(void); 1640fa115daSThomas Gleixner extern void lapic_online(void); 1650fa115daSThomas Gleixner extern void lapic_offline(void); 166c8c40767SThomas Gleixner extern bool apic_needs_pit(void); 167e02ae387SPaolo Bonzini 16822ca7ee9SThomas Gleixner extern void apic_send_IPI_allbutself(unsigned int vector); 16922ca7ee9SThomas Gleixner 170e02ae387SPaolo Bonzini #else /* !CONFIG_X86_LOCAL_APIC */ 171e02ae387SPaolo Bonzini static inline void lapic_shutdown(void) { } 172e02ae387SPaolo Bonzini #define local_apic_timer_c2_ok 1 173e02ae387SPaolo Bonzini static inline void init_apic_mappings(void) { } 174e02ae387SPaolo Bonzini static inline void disable_local_APIC(void) { } 175e02ae387SPaolo Bonzini # define setup_boot_APIC_clock x86_init_noop 176e02ae387SPaolo Bonzini # define setup_secondary_APIC_clock x86_init_noop 1776731b0d6SNicolai Stange static inline void lapic_update_tsc_freq(void) { } 178ccf5355dSDou Liyang static inline void init_bsp_APIC(void) { } 17997992387SThomas Gleixner static inline void apic_intr_mode_select(void) { } 1804b1669e8SDou Liyang static inline void apic_intr_mode_init(void) { } 1810fa115daSThomas Gleixner static inline void lapic_assign_system_vectors(void) { } 1820fa115daSThomas Gleixner static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { } 183c8c40767SThomas Gleixner static inline bool apic_needs_pit(void) { return true; } 184e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_LOCAL_APIC */ 185e02ae387SPaolo Bonzini 186d0b03bd1SHan, Weidong #ifdef CONFIG_X86_X2APIC 187bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 188bb898558SAl Viro { 189bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 190bb898558SAl Viro reg == APIC_LVR) 191bb898558SAl Viro return; 192bb898558SAl Viro 193bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 194bb898558SAl Viro } 195bb898558SAl Viro 1960ab711aeSMichael S. Tsirkin static inline void native_apic_msr_eoi_write(u32 reg, u32 v) 1970ab711aeSMichael S. Tsirkin { 198a585df8eSBorislav Petkov __wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0); 1990ab711aeSMichael S. Tsirkin } 2000ab711aeSMichael S. Tsirkin 201bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 202bb898558SAl Viro { 2030059b243SAndi Kleen u64 msr; 204bb898558SAl Viro 205bb898558SAl Viro if (reg == APIC_DFR) 206bb898558SAl Viro return -1; 207bb898558SAl Viro 2080059b243SAndi Kleen rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); 2090059b243SAndi Kleen return (u32)msr; 210bb898558SAl Viro } 211bb898558SAl Viro 212c1eeb2deSYinghai Lu static inline void native_x2apic_wait_icr_idle(void) 213c1eeb2deSYinghai Lu { 214c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 215c1eeb2deSYinghai Lu return; 216c1eeb2deSYinghai Lu } 217c1eeb2deSYinghai Lu 218c1eeb2deSYinghai Lu static inline u32 native_safe_x2apic_wait_icr_idle(void) 219c1eeb2deSYinghai Lu { 220c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 221c1eeb2deSYinghai Lu return 0; 222c1eeb2deSYinghai Lu } 223c1eeb2deSYinghai Lu 224c1eeb2deSYinghai Lu static inline void native_x2apic_icr_write(u32 low, u32 id) 225c1eeb2deSYinghai Lu { 226c1eeb2deSYinghai Lu wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); 227c1eeb2deSYinghai Lu } 228c1eeb2deSYinghai Lu 229c1eeb2deSYinghai Lu static inline u64 native_x2apic_icr_read(void) 230c1eeb2deSYinghai Lu { 231c1eeb2deSYinghai Lu unsigned long val; 232c1eeb2deSYinghai Lu 233c1eeb2deSYinghai Lu rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); 234c1eeb2deSYinghai Lu return val; 235c1eeb2deSYinghai Lu } 236c1eeb2deSYinghai Lu 23781a46dd8SThomas Gleixner extern int x2apic_mode; 238fc1edaf9SSuresh Siddha extern int x2apic_phys; 23926573a97SDavid Woodhouse extern void __init x2apic_set_max_apicid(u32 apicid); 240659006bfSThomas Gleixner extern void x2apic_setup(void); 241bb898558SAl Viro static inline int x2apic_enabled(void) 242bb898558SAl Viro { 24362436a4dSBorislav Petkov return boot_cpu_has(X86_FEATURE_X2APIC) && apic_is_x2apic_enabled(); 244bb898558SAl Viro } 245fc1edaf9SSuresh Siddha 24662436a4dSBorislav Petkov #define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC)) 247e02ae387SPaolo Bonzini #else /* !CONFIG_X86_X2APIC */ 248659006bfSThomas Gleixner static inline void x2apic_setup(void) { } 24955eae7deSThomas Gleixner static inline int x2apic_enabled(void) { return 0; } 250*d10a9044SThomas Gleixner static inline u32 native_apic_msr_read(u32 reg) { BUG(); } 25181a46dd8SThomas Gleixner #define x2apic_mode (0) 25281a46dd8SThomas Gleixner #define x2apic_supported() (0) 253e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_X2APIC */ 254e3998434SMateusz Jończyk extern void __init check_x2apic(void); 255bb898558SAl Viro 2560e24f7c9SThomas Gleixner struct irq_data; 2570e24f7c9SThomas Gleixner 258e2780a68SIngo Molnar /* 259e2780a68SIngo Molnar * Copyright 2004 James Cleverdon, IBM. 260e2780a68SIngo Molnar * 261e2780a68SIngo Molnar * Generic APIC sub-arch data struct. 262e2780a68SIngo Molnar * 263e2780a68SIngo Molnar * Hacked for x86-64 by James Cleverdon from i386 architecture code by 264e2780a68SIngo Molnar * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and 265e2780a68SIngo Molnar * James Cleverdon. 266e2780a68SIngo Molnar */ 267be163a15SIngo Molnar struct apic { 26872f48a38SThomas Gleixner /* Hotpath functions first */ 26972f48a38SThomas Gleixner void (*eoi_write)(u32 reg, u32 v); 27072f48a38SThomas Gleixner void (*native_eoi_write)(u32 reg, u32 v); 27172f48a38SThomas Gleixner void (*write)(u32 reg, u32 v); 27272f48a38SThomas Gleixner u32 (*read)(u32 reg); 273e2780a68SIngo Molnar 27472f48a38SThomas Gleixner /* IPI related functions */ 27572f48a38SThomas Gleixner void (*wait_icr_idle)(void); 27672f48a38SThomas Gleixner u32 (*safe_wait_icr_idle)(void); 27772f48a38SThomas Gleixner 27872f48a38SThomas Gleixner void (*send_IPI)(int cpu, int vector); 27972f48a38SThomas Gleixner void (*send_IPI_mask)(const struct cpumask *mask, int vector); 28072f48a38SThomas Gleixner void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); 28172f48a38SThomas Gleixner void (*send_IPI_allbutself)(int vector); 28272f48a38SThomas Gleixner void (*send_IPI_all)(int vector); 28372f48a38SThomas Gleixner void (*send_IPI_self)(int vector); 28472f48a38SThomas Gleixner 28572f48a38SThomas Gleixner u32 disable_esr; 28672161299SThomas Gleixner 28772161299SThomas Gleixner enum apic_delivery_modes delivery_mode; 2888c44963bSThomas Gleixner bool dest_mode_logical; 28972f48a38SThomas Gleixner 2909f9e3bb1SThomas Gleixner u32 (*calc_dest_apicid)(unsigned int cpu); 29172f48a38SThomas Gleixner 29272f48a38SThomas Gleixner /* ICR related functions */ 29372f48a38SThomas Gleixner u64 (*icr_read)(void); 29472f48a38SThomas Gleixner void (*icr_write)(u32 low, u32 high); 29572f48a38SThomas Gleixner 29672f48a38SThomas Gleixner /* Probe, setup and smpboot functions */ 297e2780a68SIngo Molnar int (*probe)(void); 298e2780a68SIngo Molnar int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); 299a774635dSLi RongQing int (*apic_id_valid)(u32 apicid); 300e2780a68SIngo Molnar int (*apic_id_registered)(void); 301e2780a68SIngo Molnar 30257e0aa44SThomas Gleixner bool (*check_apicid_used)(physid_mask_t *map, int apicid); 303e2780a68SIngo Molnar void (*init_apic_ldr)(void); 3047abc0753SCyrill Gorcunov void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); 305e2780a68SIngo Molnar void (*setup_apic_routing)(void); 306e2780a68SIngo Molnar int (*cpu_present_to_apicid)(int mps_cpu); 3077abc0753SCyrill Gorcunov void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap); 308e11dadabSThomas Gleixner int (*check_phys_apicid_present)(int phys_apicid); 309e2780a68SIngo Molnar int (*phys_pkg_id)(int cpuid_apic, int index_msb); 310e2780a68SIngo Molnar 31172f48a38SThomas Gleixner u32 (*get_apic_id)(unsigned long x); 312727657e6SThomas Gleixner u32 (*set_apic_id)(unsigned int id); 313e2780a68SIngo Molnar 314e2780a68SIngo Molnar /* wakeup_secondary_cpu */ 3151f5bcabfSIngo Molnar int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); 316ff2e6468SSean Christopherson /* wakeup secondary CPU using 64-bit wakeup point */ 317ff2e6468SSean Christopherson int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); 318e2780a68SIngo Molnar 319acb8bc09STejun Heo #ifdef CONFIG_X86_32 320acb8bc09STejun Heo /* 321acb8bc09STejun Heo * Called very early during boot from get_smp_config(). It should 322acb8bc09STejun Heo * return the logical apicid. x86_[bios]_cpu_to_apicid is 323acb8bc09STejun Heo * initialized before this function is called. 324acb8bc09STejun Heo * 325acb8bc09STejun Heo * If logical apicid can't be determined that early, the function 326acb8bc09STejun Heo * may return BAD_APICID. Logical apicid will be configured after 327acb8bc09STejun Heo * init_apic_ldr() while bringing up CPUs. Note that NUMA affinity 328acb8bc09STejun Heo * won't be applied properly during early boot in this case. 329acb8bc09STejun Heo */ 330acb8bc09STejun Heo int (*x86_32_early_logical_apicid)(int cpu); 331acb8bc09STejun Heo #endif 33272f48a38SThomas Gleixner char *name; 333e2780a68SIngo Molnar }; 334e2780a68SIngo Molnar 3350917c01fSIngo Molnar /* 3360917c01fSIngo Molnar * Pointer to the local APIC driver in use on this system (there's 3370917c01fSIngo Molnar * always just one such driver in use - the kernel decides via an 3380917c01fSIngo Molnar * early probing process which one it picks - and then sticks to it): 3390917c01fSIngo Molnar */ 340be163a15SIngo Molnar extern struct apic *apic; 3410917c01fSIngo Molnar 3420917c01fSIngo Molnar /* 343107e0e0cSSuresh Siddha * APIC drivers are probed based on how they are listed in the .apicdrivers 344107e0e0cSSuresh Siddha * section. So the order is important and enforced by the ordering 345107e0e0cSSuresh Siddha * of different apic driver files in the Makefile. 346107e0e0cSSuresh Siddha * 347107e0e0cSSuresh Siddha * For the files having two apic drivers, we use apic_drivers() 348107e0e0cSSuresh Siddha * to enforce the order with in them. 349107e0e0cSSuresh Siddha */ 350107e0e0cSSuresh Siddha #define apic_driver(sym) \ 35175fdd155SAndi Kleen static const struct apic *__apicdrivers_##sym __used \ 352107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 35333def849SJoe Perches __section(".apicdrivers") = { &sym } 354107e0e0cSSuresh Siddha 355107e0e0cSSuresh Siddha #define apic_drivers(sym1, sym2) \ 356107e0e0cSSuresh Siddha static struct apic *__apicdrivers_##sym1##sym2[2] __used \ 357107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 35833def849SJoe Perches __section(".apicdrivers") = { &sym1, &sym2 } 359107e0e0cSSuresh Siddha 360107e0e0cSSuresh Siddha extern struct apic *__apicdrivers[], *__apicdrivers_end[]; 361107e0e0cSSuresh Siddha 362107e0e0cSSuresh Siddha /* 3630917c01fSIngo Molnar * APIC functionality to boot other CPUs - only used on SMP: 3640917c01fSIngo Molnar */ 3650917c01fSIngo Molnar #ifdef CONFIG_SMP 3662cffad7bSThomas Gleixner extern int lapic_can_unplug_cpu(void); 3670917c01fSIngo Molnar #endif 368e2780a68SIngo Molnar 369d674cd19SCyrill Gorcunov #ifdef CONFIG_X86_LOCAL_APIC 370346b46beSFernando Luis Vázquez Cao 371e2780a68SIngo Molnar static inline u32 apic_read(u32 reg) 372e2780a68SIngo Molnar { 373e2780a68SIngo Molnar return apic->read(reg); 374e2780a68SIngo Molnar } 375e2780a68SIngo Molnar 376e2780a68SIngo Molnar static inline void apic_write(u32 reg, u32 val) 377e2780a68SIngo Molnar { 378e2780a68SIngo Molnar apic->write(reg, val); 379e2780a68SIngo Molnar } 380e2780a68SIngo Molnar 3812a43195dSMichael S. Tsirkin static inline void apic_eoi(void) 3822a43195dSMichael S. Tsirkin { 3832a43195dSMichael S. Tsirkin apic->eoi_write(APIC_EOI, APIC_EOI_ACK); 3842a43195dSMichael S. Tsirkin } 3852a43195dSMichael S. Tsirkin 386e2780a68SIngo Molnar static inline u64 apic_icr_read(void) 387e2780a68SIngo Molnar { 388e2780a68SIngo Molnar return apic->icr_read(); 389e2780a68SIngo Molnar } 390e2780a68SIngo Molnar 391e2780a68SIngo Molnar static inline void apic_icr_write(u32 low, u32 high) 392e2780a68SIngo Molnar { 393e2780a68SIngo Molnar apic->icr_write(low, high); 394e2780a68SIngo Molnar } 395e2780a68SIngo Molnar 396e2780a68SIngo Molnar static inline void apic_wait_icr_idle(void) 397e2780a68SIngo Molnar { 398e2780a68SIngo Molnar apic->wait_icr_idle(); 399e2780a68SIngo Molnar } 400e2780a68SIngo Molnar 401e2780a68SIngo Molnar static inline u32 safe_apic_wait_icr_idle(void) 402e2780a68SIngo Molnar { 403e2780a68SIngo Molnar return apic->safe_wait_icr_idle(); 404e2780a68SIngo Molnar } 405e2780a68SIngo Molnar 4061551df64SMichael S. Tsirkin extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); 4071551df64SMichael S. Tsirkin 408d674cd19SCyrill Gorcunov #else /* CONFIG_X86_LOCAL_APIC */ 409d674cd19SCyrill Gorcunov 410d674cd19SCyrill Gorcunov static inline u32 apic_read(u32 reg) { return 0; } 411d674cd19SCyrill Gorcunov static inline void apic_write(u32 reg, u32 val) { } 4122a43195dSMichael S. Tsirkin static inline void apic_eoi(void) { } 413d674cd19SCyrill Gorcunov static inline u64 apic_icr_read(void) { return 0; } 414d674cd19SCyrill Gorcunov static inline void apic_icr_write(u32 low, u32 high) { } 415d674cd19SCyrill Gorcunov static inline void apic_wait_icr_idle(void) { } 416d674cd19SCyrill Gorcunov static inline u32 safe_apic_wait_icr_idle(void) { return 0; } 4171551df64SMichael S. Tsirkin static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {} 418d674cd19SCyrill Gorcunov 419d674cd19SCyrill Gorcunov #endif /* CONFIG_X86_LOCAL_APIC */ 420e2780a68SIngo Molnar 421c0255770SThomas Gleixner extern void apic_ack_irq(struct irq_data *data); 422c0255770SThomas Gleixner 423e2780a68SIngo Molnar static inline void ack_APIC_irq(void) 424e2780a68SIngo Molnar { 425e2780a68SIngo Molnar /* 426e2780a68SIngo Molnar * ack_APIC_irq() actually gets compiled as a single instruction 427e2780a68SIngo Molnar * ... yummie. 428e2780a68SIngo Molnar */ 4292a43195dSMichael S. Tsirkin apic_eoi(); 430e2780a68SIngo Molnar } 431e2780a68SIngo Molnar 4326f1a4891SThomas Gleixner 4336f1a4891SThomas Gleixner static inline bool lapic_vector_set_in_irr(unsigned int vector) 4346f1a4891SThomas Gleixner { 4356f1a4891SThomas Gleixner u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); 4366f1a4891SThomas Gleixner 4376f1a4891SThomas Gleixner return !!(irr & (1U << (vector % 32))); 4386f1a4891SThomas Gleixner } 4396f1a4891SThomas Gleixner 440e2780a68SIngo Molnar static inline unsigned default_get_apic_id(unsigned long x) 441e2780a68SIngo Molnar { 442e2780a68SIngo Molnar unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 443e2780a68SIngo Molnar 44442937e81SAndreas Herrmann if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID)) 445e2780a68SIngo Molnar return (x >> 24) & 0xFF; 446e2780a68SIngo Molnar else 447e2780a68SIngo Molnar return (x >> 24) & 0x0F; 448e2780a68SIngo Molnar } 449e2780a68SIngo Molnar 450e2780a68SIngo Molnar /* 4516ab1b27cSDavid Rientjes * Warm reset vector position: 452e2780a68SIngo Molnar */ 4536ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_LOW 0x467 4546ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_HIGH 0x469 455e2780a68SIngo Molnar 456838312beSJan Beulich extern void generic_bigsmp_probe(void); 457e2780a68SIngo Molnar 458e2780a68SIngo Molnar #ifdef CONFIG_X86_LOCAL_APIC 459e2780a68SIngo Molnar 460e2780a68SIngo Molnar #include <asm/smp.h> 461e2780a68SIngo Molnar 462e2780a68SIngo Molnar #define APIC_DFR_VALUE (APIC_DFR_FLAT) 463e2780a68SIngo Molnar 46483a10522SThomas Gleixner extern struct apic apic_noop; 465e2780a68SIngo Molnar 466e2780a68SIngo Molnar static inline unsigned int read_apic_id(void) 467e2780a68SIngo Molnar { 46883a10522SThomas Gleixner unsigned int reg = apic_read(APIC_ID); 469e2780a68SIngo Molnar 470e2780a68SIngo Molnar return apic->get_apic_id(reg); 471e2780a68SIngo Molnar } 472e2780a68SIngo Molnar 473f39642d0SKuppuswamy Sathyanarayanan #ifdef CONFIG_X86_64 474f39642d0SKuppuswamy Sathyanarayanan typedef int (*wakeup_cpu_handler)(int apicid, unsigned long start_eip); 475f39642d0SKuppuswamy Sathyanarayanan extern void acpi_wake_cpu_handler_update(wakeup_cpu_handler handler); 476f39642d0SKuppuswamy Sathyanarayanan #endif 477f39642d0SKuppuswamy Sathyanarayanan 478a774635dSLi RongQing extern int default_apic_id_valid(u32 apicid); 479a491cc90SJiang Liu extern int default_acpi_madt_oem_check(char *, char *); 480e2780a68SIngo Molnar extern void default_setup_apic_routing(void); 4819f9e3bb1SThomas Gleixner 4829f9e3bb1SThomas Gleixner extern u32 apic_default_calc_apicid(unsigned int cpu); 4839f9e3bb1SThomas Gleixner extern u32 apic_flat_calc_apicid(unsigned int cpu); 4849f9e3bb1SThomas Gleixner 48583a10522SThomas Gleixner extern bool default_check_apicid_used(physid_mask_t *map, int apicid); 48683a10522SThomas Gleixner extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap); 487e2780a68SIngo Molnar extern int default_cpu_present_to_apicid(int mps_cpu); 488e11dadabSThomas Gleixner extern int default_check_phys_apicid_present(int phys_apicid); 489e2780a68SIngo Molnar 490a6625b47SThomas Gleixner #else /* CONFIG_X86_LOCAL_APIC */ 491a6625b47SThomas Gleixner 492a6625b47SThomas Gleixner static inline unsigned int read_apic_id(void) { return 0; } 493a6625b47SThomas Gleixner 494a6625b47SThomas Gleixner #endif /* !CONFIG_X86_LOCAL_APIC */ 49583a10522SThomas Gleixner 4966a4d2657SThomas Gleixner #ifdef CONFIG_SMP 4976a1cb5f5SThomas Gleixner void apic_smt_update(void); 4986a4d2657SThomas Gleixner #else 4996a1cb5f5SThomas Gleixner static inline void apic_smt_update(void) { } 5006a4d2657SThomas Gleixner #endif 5016a4d2657SThomas Gleixner 502b0a19555SThomas Gleixner struct msi_msg; 503f598181aSDavid Woodhouse struct irq_cfg; 504b0a19555SThomas Gleixner 505f598181aSDavid Woodhouse extern void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg, 506f598181aSDavid Woodhouse bool dmar); 507b0a19555SThomas Gleixner 50817405453SYoshihiro YUNOMAE extern void ioapic_zap_locks(void); 50917405453SYoshihiro YUNOMAE 5101965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 511