11965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 21965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 3bb898558SAl Viro 4bb898558SAl Viro #include <linux/pm.h> 5bb898558SAl Viro #include <linux/delay.h> 6bb898558SAl Viro 7bb898558SAl Viro #include <asm/alternative.h> 8bb898558SAl Viro #include <asm/fixmap.h> 9bb898558SAl Viro #include <asm/apicdef.h> 10bb898558SAl Viro #include <asm/processor.h> 11bb898558SAl Viro #include <asm/system.h> 12bb898558SAl Viro #include <asm/cpufeature.h> 13bb898558SAl Viro #include <asm/msr.h> 14bb898558SAl Viro 15bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 16bb898558SAl Viro 17bb898558SAl Viro /* 18bb898558SAl Viro * Debugging macros 19bb898558SAl Viro */ 20bb898558SAl Viro #define APIC_QUIET 0 21bb898558SAl Viro #define APIC_VERBOSE 1 22bb898558SAl Viro #define APIC_DEBUG 2 23bb898558SAl Viro 24bb898558SAl Viro /* 25bb898558SAl Viro * Define the default level of output to be very little 26bb898558SAl Viro * This can be turned up by using apic=verbose for more 27bb898558SAl Viro * information and apic=debug for _lots_ of information. 28bb898558SAl Viro * apic_verbosity is defined in apic.c 29bb898558SAl Viro */ 30bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 31bb898558SAl Viro if ((v) <= apic_verbosity) \ 32bb898558SAl Viro printk(s, ##a); \ 33bb898558SAl Viro } while (0) 34bb898558SAl Viro 35bb898558SAl Viro 36160d8dacSIngo Molnar #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 37bb898558SAl Viro extern void generic_apic_probe(void); 38160d8dacSIngo Molnar #else 39160d8dacSIngo Molnar static inline void generic_apic_probe(void) 40160d8dacSIngo Molnar { 41160d8dacSIngo Molnar } 42160d8dacSIngo Molnar #endif 43bb898558SAl Viro 44bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 45bb898558SAl Viro 46bb898558SAl Viro extern unsigned int apic_verbosity; 47bb898558SAl Viro extern int local_apic_timer_c2_ok; 48bb898558SAl Viro 49bb898558SAl Viro extern int disable_apic; 500939e4fdSIngo Molnar 510939e4fdSIngo Molnar #ifdef CONFIG_SMP 520939e4fdSIngo Molnar extern void __inquire_remote_apic(int apicid); 530939e4fdSIngo Molnar #else /* CONFIG_SMP */ 540939e4fdSIngo Molnar static inline void __inquire_remote_apic(int apicid) 550939e4fdSIngo Molnar { 560939e4fdSIngo Molnar } 570939e4fdSIngo Molnar #endif /* CONFIG_SMP */ 580939e4fdSIngo Molnar 590939e4fdSIngo Molnar static inline void default_inquire_remote_apic(int apicid) 600939e4fdSIngo Molnar { 610939e4fdSIngo Molnar if (apic_verbosity >= APIC_DEBUG) 620939e4fdSIngo Molnar __inquire_remote_apic(apicid); 630939e4fdSIngo Molnar } 640939e4fdSIngo Molnar 65bb898558SAl Viro /* 66bb898558SAl Viro * Basic functions accessing APICs. 67bb898558SAl Viro */ 68bb898558SAl Viro #ifdef CONFIG_PARAVIRT 69bb898558SAl Viro #include <asm/paravirt.h> 70bb898558SAl Viro #else 71bb898558SAl Viro #define setup_boot_clock setup_boot_APIC_clock 72bb898558SAl Viro #define setup_secondary_clock setup_secondary_APIC_clock 73bb898558SAl Viro #endif 74bb898558SAl Viro 75bb898558SAl Viro extern int is_vsmp_box(void); 76bb898558SAl Viro extern void xapic_wait_icr_idle(void); 77bb898558SAl Viro extern u32 safe_xapic_wait_icr_idle(void); 78bb898558SAl Viro extern void xapic_icr_write(u32, u32); 79bb898558SAl Viro extern int setup_profiling_timer(unsigned int); 80bb898558SAl Viro 81bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 82bb898558SAl Viro { 83bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 84bb898558SAl Viro 85bb898558SAl Viro alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP, 86bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 87bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 88bb898558SAl Viro } 89bb898558SAl Viro 90bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 91bb898558SAl Viro { 92bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 93bb898558SAl Viro } 94bb898558SAl Viro 95c1eeb2deSYinghai Lu extern void native_apic_wait_icr_idle(void); 96c1eeb2deSYinghai Lu extern u32 native_safe_apic_wait_icr_idle(void); 97c1eeb2deSYinghai Lu extern void native_apic_icr_write(u32 low, u32 id); 98c1eeb2deSYinghai Lu extern u64 native_apic_icr_read(void); 99c1eeb2deSYinghai Lu 100c1eeb2deSYinghai Lu #ifdef CONFIG_X86_X2APIC 101bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 102bb898558SAl Viro { 103bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 104bb898558SAl Viro reg == APIC_LVR) 105bb898558SAl Viro return; 106bb898558SAl Viro 107bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 108bb898558SAl Viro } 109bb898558SAl Viro 110bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 111bb898558SAl Viro { 112bb898558SAl Viro u32 low, high; 113bb898558SAl Viro 114bb898558SAl Viro if (reg == APIC_DFR) 115bb898558SAl Viro return -1; 116bb898558SAl Viro 117bb898558SAl Viro rdmsr(APIC_BASE_MSR + (reg >> 4), low, high); 118bb898558SAl Viro return low; 119bb898558SAl Viro } 120bb898558SAl Viro 121c1eeb2deSYinghai Lu static inline void native_x2apic_wait_icr_idle(void) 122c1eeb2deSYinghai Lu { 123c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 124c1eeb2deSYinghai Lu return; 125c1eeb2deSYinghai Lu } 126c1eeb2deSYinghai Lu 127c1eeb2deSYinghai Lu static inline u32 native_safe_x2apic_wait_icr_idle(void) 128c1eeb2deSYinghai Lu { 129c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 130c1eeb2deSYinghai Lu return 0; 131c1eeb2deSYinghai Lu } 132c1eeb2deSYinghai Lu 133c1eeb2deSYinghai Lu static inline void native_x2apic_icr_write(u32 low, u32 id) 134c1eeb2deSYinghai Lu { 135c1eeb2deSYinghai Lu wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); 136c1eeb2deSYinghai Lu } 137c1eeb2deSYinghai Lu 138c1eeb2deSYinghai Lu static inline u64 native_x2apic_icr_read(void) 139c1eeb2deSYinghai Lu { 140c1eeb2deSYinghai Lu unsigned long val; 141c1eeb2deSYinghai Lu 142c1eeb2deSYinghai Lu rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); 143c1eeb2deSYinghai Lu return val; 144c1eeb2deSYinghai Lu } 145c1eeb2deSYinghai Lu 146b6b301aaSJaswinder Singh extern int x2apic; 147bb898558SAl Viro extern void check_x2apic(void); 148bb898558SAl Viro extern void enable_x2apic(void); 149bb898558SAl Viro extern void enable_IR_x2apic(void); 150bb898558SAl Viro extern void x2apic_icr_write(u32 low, u32 id); 151bb898558SAl Viro static inline int x2apic_enabled(void) 152bb898558SAl Viro { 153bb898558SAl Viro int msr, msr2; 154bb898558SAl Viro 155bb898558SAl Viro if (!cpu_has_x2apic) 156bb898558SAl Viro return 0; 157bb898558SAl Viro 158bb898558SAl Viro rdmsr(MSR_IA32_APICBASE, msr, msr2); 159bb898558SAl Viro if (msr & X2APIC_ENABLE) 160bb898558SAl Viro return 1; 161bb898558SAl Viro return 0; 162bb898558SAl Viro } 163bb898558SAl Viro #else 16406cd9a7dSYinghai Lu static inline void check_x2apic(void) 16506cd9a7dSYinghai Lu { 16606cd9a7dSYinghai Lu } 16706cd9a7dSYinghai Lu static inline void enable_x2apic(void) 16806cd9a7dSYinghai Lu { 16906cd9a7dSYinghai Lu } 17006cd9a7dSYinghai Lu static inline void enable_IR_x2apic(void) 17106cd9a7dSYinghai Lu { 17206cd9a7dSYinghai Lu } 17306cd9a7dSYinghai Lu static inline int x2apic_enabled(void) 17406cd9a7dSYinghai Lu { 17506cd9a7dSYinghai Lu return 0; 17606cd9a7dSYinghai Lu } 177bb898558SAl Viro #endif 178bb898558SAl Viro 179bb898558SAl Viro extern int get_physical_broadcast(void); 180bb898558SAl Viro 18106cd9a7dSYinghai Lu #ifdef CONFIG_X86_X2APIC 182bb898558SAl Viro static inline void ack_x2APIC_irq(void) 183bb898558SAl Viro { 184bb898558SAl Viro /* Docs say use 0 for future compatibility */ 185bb898558SAl Viro native_apic_msr_write(APIC_EOI, 0); 186bb898558SAl Viro } 187bb898558SAl Viro #endif 188bb898558SAl Viro 189bb898558SAl Viro extern int lapic_get_maxlvt(void); 190bb898558SAl Viro extern void clear_local_APIC(void); 191bb898558SAl Viro extern void connect_bsp_APIC(void); 192bb898558SAl Viro extern void disconnect_bsp_APIC(int virt_wire_setup); 193bb898558SAl Viro extern void disable_local_APIC(void); 194bb898558SAl Viro extern void lapic_shutdown(void); 195bb898558SAl Viro extern int verify_local_APIC(void); 196bb898558SAl Viro extern void cache_APIC_registers(void); 197bb898558SAl Viro extern void sync_Arb_IDs(void); 198bb898558SAl Viro extern void init_bsp_APIC(void); 199bb898558SAl Viro extern void setup_local_APIC(void); 200bb898558SAl Viro extern void end_local_APIC_setup(void); 201bb898558SAl Viro extern void init_apic_mappings(void); 202bb898558SAl Viro extern void setup_boot_APIC_clock(void); 203bb898558SAl Viro extern void setup_secondary_APIC_clock(void); 204bb898558SAl Viro extern int APIC_init_uniprocessor(void); 205bb898558SAl Viro extern void enable_NMI_through_LVT0(void); 206bb898558SAl Viro 207bb898558SAl Viro /* 208bb898558SAl Viro * On 32bit this is mach-xxx local 209bb898558SAl Viro */ 210bb898558SAl Viro #ifdef CONFIG_X86_64 211bb898558SAl Viro extern void early_init_lapic_mapping(void); 212bb898558SAl Viro extern int apic_is_clustered_box(void); 213bb898558SAl Viro #else 214bb898558SAl Viro static inline int apic_is_clustered_box(void) 215bb898558SAl Viro { 216bb898558SAl Viro return 0; 217bb898558SAl Viro } 218bb898558SAl Viro #endif 219bb898558SAl Viro 220bb898558SAl Viro extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); 221bb898558SAl Viro extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); 222bb898558SAl Viro 223bb898558SAl Viro 224bb898558SAl Viro #else /* !CONFIG_X86_LOCAL_APIC */ 225bb898558SAl Viro static inline void lapic_shutdown(void) { } 226bb898558SAl Viro #define local_apic_timer_c2_ok 1 227bb898558SAl Viro static inline void init_apic_mappings(void) { } 228d3ec5caeSIvan Vecera static inline void disable_local_APIC(void) { } 229bb898558SAl Viro 230bb898558SAl Viro #endif /* !CONFIG_X86_LOCAL_APIC */ 231bb898558SAl Viro 2321f75ed0cSIngo Molnar #ifdef CONFIG_X86_64 2331f75ed0cSIngo Molnar #define SET_APIC_ID(x) (apic->set_apic_id(x)) 2341f75ed0cSIngo Molnar #else 2351f75ed0cSIngo Molnar 2361f75ed0cSIngo Molnar #endif 2371f75ed0cSIngo Molnar 2381965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 239