17e300dabSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 21965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 31965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 4bb898558SAl Viro 5e2780a68SIngo Molnar #include <linux/cpumask.h> 6bb898558SAl Viro 7bb898558SAl Viro #include <asm/alternative.h> 8bb898558SAl Viro #include <asm/cpufeature.h> 9e2780a68SIngo Molnar #include <asm/apicdef.h> 1060063497SArun Sharma #include <linux/atomic.h> 11e2780a68SIngo Molnar #include <asm/fixmap.h> 12e2780a68SIngo Molnar #include <asm/mpspec.h> 13bb898558SAl Viro #include <asm/msr.h> 14ffcba43fSNicolai Stange #include <asm/hardirq.h> 15bb898558SAl Viro 16bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 17bb898558SAl Viro 18bb898558SAl Viro /* 19bb898558SAl Viro * Debugging macros 20bb898558SAl Viro */ 21bb898558SAl Viro #define APIC_QUIET 0 22bb898558SAl Viro #define APIC_VERBOSE 1 23bb898558SAl Viro #define APIC_DEBUG 2 24bb898558SAl Viro 25b7c4948eSHidehiro Kawai /* Macros for apic_extnmi which controls external NMI masking */ 26b7c4948eSHidehiro Kawai #define APIC_EXTNMI_BSP 0 /* Default */ 27b7c4948eSHidehiro Kawai #define APIC_EXTNMI_ALL 1 28b7c4948eSHidehiro Kawai #define APIC_EXTNMI_NONE 2 29b7c4948eSHidehiro Kawai 30bb898558SAl Viro /* 31bb898558SAl Viro * Define the default level of output to be very little 32bb898558SAl Viro * This can be turned up by using apic=verbose for more 33bb898558SAl Viro * information and apic=debug for _lots_ of information. 34bb898558SAl Viro * apic_verbosity is defined in apic.c 35bb898558SAl Viro */ 36bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 37bb898558SAl Viro if ((v) <= apic_verbosity) \ 38bb898558SAl Viro printk(s, ##a); \ 39bb898558SAl Viro } while (0) 40bb898558SAl Viro 41bb898558SAl Viro 42160d8dacSIngo Molnar #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 439d87f5b6SThomas Gleixner extern void x86_32_probe_apic(void); 44160d8dacSIngo Molnar #else 459d87f5b6SThomas Gleixner static inline void x86_32_probe_apic(void) { } 46160d8dacSIngo Molnar #endif 47bb898558SAl Viro 48bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 49bb898558SAl Viro 50ec633558SQian Cai extern int apic_verbosity; 51bb898558SAl Viro extern int local_apic_timer_c2_ok; 52bb898558SAl Viro 5349062454SThomas Gleixner extern bool apic_is_disabled; 5452ae346bSDaniel Drake extern unsigned int lapic_timer_period; 550939e4fdSIngo Molnar 567e75178aSDavid Woodhouse extern int cpuid_to_apicid[]; 577e75178aSDavid Woodhouse 584f45ed9fSDou Liyang extern enum apic_intr_mode_id apic_intr_mode; 594f45ed9fSDou Liyang enum apic_intr_mode_id { 604f45ed9fSDou Liyang APIC_PIC, 614f45ed9fSDou Liyang APIC_VIRTUAL_WIRE, 624f45ed9fSDou Liyang APIC_VIRTUAL_WIRE_NO_CONFIG, 634f45ed9fSDou Liyang APIC_SYMMETRIC_IO, 644f45ed9fSDou Liyang APIC_SYMMETRIC_IO_NO_ROUTING 654f45ed9fSDou Liyang }; 664f45ed9fSDou Liyang 67bb898558SAl Viro /* 688312136fSCyrill Gorcunov * With 82489DX we can't rely on apic feature bit 698312136fSCyrill Gorcunov * retrieved via cpuid but still have to deal with 708312136fSCyrill Gorcunov * such an apic chip so we assume that SMP configuration 718312136fSCyrill Gorcunov * is found from MP table (64bit case uses ACPI mostly 728312136fSCyrill Gorcunov * which set smp presence flag as well so we are safe 738312136fSCyrill Gorcunov * to use this helper too). 748312136fSCyrill Gorcunov */ 758312136fSCyrill Gorcunov static inline bool apic_from_smp_config(void) 768312136fSCyrill Gorcunov { 7749062454SThomas Gleixner return smp_found_config && !apic_is_disabled; 788312136fSCyrill Gorcunov } 798312136fSCyrill Gorcunov 808312136fSCyrill Gorcunov /* 81bb898558SAl Viro * Basic functions accessing APICs. 82bb898558SAl Viro */ 83bb898558SAl Viro #ifdef CONFIG_PARAVIRT 84bb898558SAl Viro #include <asm/paravirt.h> 85bb898558SAl Viro #endif 86bb898558SAl Viro 87bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 88bb898558SAl Viro { 89bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 90bb898558SAl Viro 91a930dc45SBorislav Petkov alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP, 92bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 93bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 94bb898558SAl Viro } 95bb898558SAl Viro 96bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 97bb898558SAl Viro { 98bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 99bb898558SAl Viro } 100bb898558SAl Viro 101185c8f33SThomas Gleixner static inline void native_apic_mem_eoi(void) 102185c8f33SThomas Gleixner { 103185c8f33SThomas Gleixner native_apic_mem_write(APIC_EOI, APIC_EOI_ACK); 104185c8f33SThomas Gleixner } 105185c8f33SThomas Gleixner 106c1eeb2deSYinghai Lu extern void native_apic_icr_write(u32 low, u32 id); 107c1eeb2deSYinghai Lu extern u64 native_apic_icr_read(void); 108c1eeb2deSYinghai Lu 1098d806960SThomas Gleixner static inline bool apic_is_x2apic_enabled(void) 1108d806960SThomas Gleixner { 1118d806960SThomas Gleixner u64 msr; 1128d806960SThomas Gleixner 1138d806960SThomas Gleixner if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) 1148d806960SThomas Gleixner return false; 1158d806960SThomas Gleixner return msr & X2APIC_ENABLE; 1168d806960SThomas Gleixner } 1178d806960SThomas Gleixner 118e02ae387SPaolo Bonzini extern void enable_IR_x2apic(void); 119e02ae387SPaolo Bonzini 120e02ae387SPaolo Bonzini extern int get_physical_broadcast(void); 121e02ae387SPaolo Bonzini 122e02ae387SPaolo Bonzini extern int lapic_get_maxlvt(void); 123e02ae387SPaolo Bonzini extern void clear_local_APIC(void); 124e02ae387SPaolo Bonzini extern void disconnect_bsp_APIC(int virt_wire_setup); 125e02ae387SPaolo Bonzini extern void disable_local_APIC(void); 12660dcaad5SThomas Gleixner extern void apic_soft_disable(void); 127e02ae387SPaolo Bonzini extern void lapic_shutdown(void); 128e02ae387SPaolo Bonzini extern void sync_Arb_IDs(void); 129fc90ccfdSVille Syrjälä extern void init_bsp_APIC(void); 13097992387SThomas Gleixner extern void apic_intr_mode_select(void); 1314b1669e8SDou Liyang extern void apic_intr_mode_init(void); 132e02ae387SPaolo Bonzini extern void init_apic_mappings(void); 133e02ae387SPaolo Bonzini void register_lapic_address(unsigned long address); 134e02ae387SPaolo Bonzini extern void setup_boot_APIC_clock(void); 135e02ae387SPaolo Bonzini extern void setup_secondary_APIC_clock(void); 1366731b0d6SNicolai Stange extern void lapic_update_tsc_freq(void); 137e02ae387SPaolo Bonzini 138e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 1391751adedSThomas Gleixner static inline bool apic_force_enable(unsigned long addr) 140e02ae387SPaolo Bonzini { 1411751adedSThomas Gleixner return false; 142e02ae387SPaolo Bonzini } 143e02ae387SPaolo Bonzini #else 1441751adedSThomas Gleixner extern bool apic_force_enable(unsigned long addr); 145e02ae387SPaolo Bonzini #endif 146e02ae387SPaolo Bonzini 147e02ae387SPaolo Bonzini extern void apic_ap_setup(void); 148e02ae387SPaolo Bonzini 149e02ae387SPaolo Bonzini /* 150e02ae387SPaolo Bonzini * On 32bit this is mach-xxx local 151e02ae387SPaolo Bonzini */ 152e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 153e02ae387SPaolo Bonzini extern int apic_is_clustered_box(void); 154e02ae387SPaolo Bonzini #else 155e02ae387SPaolo Bonzini static inline int apic_is_clustered_box(void) 156e02ae387SPaolo Bonzini { 157e02ae387SPaolo Bonzini return 0; 158e02ae387SPaolo Bonzini } 159e02ae387SPaolo Bonzini #endif 160e02ae387SPaolo Bonzini 161e02ae387SPaolo Bonzini extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask); 1620fa115daSThomas Gleixner extern void lapic_assign_system_vectors(void); 1630fa115daSThomas Gleixner extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace); 1647d65f9e8SThomas Gleixner extern void lapic_update_legacy_vectors(void); 1650fa115daSThomas Gleixner extern void lapic_online(void); 1660fa115daSThomas Gleixner extern void lapic_offline(void); 167c8c40767SThomas Gleixner extern bool apic_needs_pit(void); 168e02ae387SPaolo Bonzini 16922ca7ee9SThomas Gleixner extern void apic_send_IPI_allbutself(unsigned int vector); 17022ca7ee9SThomas Gleixner 171e02ae387SPaolo Bonzini #else /* !CONFIG_X86_LOCAL_APIC */ 172e02ae387SPaolo Bonzini static inline void lapic_shutdown(void) { } 173e02ae387SPaolo Bonzini #define local_apic_timer_c2_ok 1 174e02ae387SPaolo Bonzini static inline void init_apic_mappings(void) { } 175e02ae387SPaolo Bonzini static inline void disable_local_APIC(void) { } 176e02ae387SPaolo Bonzini # define setup_boot_APIC_clock x86_init_noop 177e02ae387SPaolo Bonzini # define setup_secondary_APIC_clock x86_init_noop 1786731b0d6SNicolai Stange static inline void lapic_update_tsc_freq(void) { } 179ccf5355dSDou Liyang static inline void init_bsp_APIC(void) { } 18097992387SThomas Gleixner static inline void apic_intr_mode_select(void) { } 1814b1669e8SDou Liyang static inline void apic_intr_mode_init(void) { } 1820fa115daSThomas Gleixner static inline void lapic_assign_system_vectors(void) { } 1830fa115daSThomas Gleixner static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { } 184c8c40767SThomas Gleixner static inline bool apic_needs_pit(void) { return true; } 185e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_LOCAL_APIC */ 186e02ae387SPaolo Bonzini 187d0b03bd1SHan, Weidong #ifdef CONFIG_X86_X2APIC 188bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 189bb898558SAl Viro { 190bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 191bb898558SAl Viro reg == APIC_LVR) 192bb898558SAl Viro return; 193bb898558SAl Viro 194bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 195bb898558SAl Viro } 196bb898558SAl Viro 197185c8f33SThomas Gleixner static inline void native_apic_msr_eoi(void) 1980ab711aeSMichael S. Tsirkin { 199a585df8eSBorislav Petkov __wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0); 2000ab711aeSMichael S. Tsirkin } 2010ab711aeSMichael S. Tsirkin 202bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 203bb898558SAl Viro { 2040059b243SAndi Kleen u64 msr; 205bb898558SAl Viro 206bb898558SAl Viro if (reg == APIC_DFR) 207bb898558SAl Viro return -1; 208bb898558SAl Viro 2090059b243SAndi Kleen rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); 2100059b243SAndi Kleen return (u32)msr; 211bb898558SAl Viro } 212bb898558SAl Viro 213c1eeb2deSYinghai Lu static inline void native_x2apic_icr_write(u32 low, u32 id) 214c1eeb2deSYinghai Lu { 215c1eeb2deSYinghai Lu wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); 216c1eeb2deSYinghai Lu } 217c1eeb2deSYinghai Lu 218c1eeb2deSYinghai Lu static inline u64 native_x2apic_icr_read(void) 219c1eeb2deSYinghai Lu { 220c1eeb2deSYinghai Lu unsigned long val; 221c1eeb2deSYinghai Lu 222c1eeb2deSYinghai Lu rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); 223c1eeb2deSYinghai Lu return val; 224c1eeb2deSYinghai Lu } 225c1eeb2deSYinghai Lu 22681a46dd8SThomas Gleixner extern int x2apic_mode; 227fc1edaf9SSuresh Siddha extern int x2apic_phys; 22826573a97SDavid Woodhouse extern void __init x2apic_set_max_apicid(u32 apicid); 229659006bfSThomas Gleixner extern void x2apic_setup(void); 230bb898558SAl Viro static inline int x2apic_enabled(void) 231bb898558SAl Viro { 23262436a4dSBorislav Petkov return boot_cpu_has(X86_FEATURE_X2APIC) && apic_is_x2apic_enabled(); 233bb898558SAl Viro } 234fc1edaf9SSuresh Siddha 23562436a4dSBorislav Petkov #define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC)) 236e02ae387SPaolo Bonzini #else /* !CONFIG_X86_X2APIC */ 237659006bfSThomas Gleixner static inline void x2apic_setup(void) { } 23855eae7deSThomas Gleixner static inline int x2apic_enabled(void) { return 0; } 239d10a9044SThomas Gleixner static inline u32 native_apic_msr_read(u32 reg) { BUG(); } 24081a46dd8SThomas Gleixner #define x2apic_mode (0) 24181a46dd8SThomas Gleixner #define x2apic_supported() (0) 242e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_X2APIC */ 243e3998434SMateusz Jończyk extern void __init check_x2apic(void); 244bb898558SAl Viro 2450e24f7c9SThomas Gleixner struct irq_data; 2460e24f7c9SThomas Gleixner 247e2780a68SIngo Molnar /* 248e2780a68SIngo Molnar * Copyright 2004 James Cleverdon, IBM. 249e2780a68SIngo Molnar * 250e2780a68SIngo Molnar * Generic APIC sub-arch data struct. 251e2780a68SIngo Molnar * 252e2780a68SIngo Molnar * Hacked for x86-64 by James Cleverdon from i386 architecture code by 253e2780a68SIngo Molnar * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and 254e2780a68SIngo Molnar * James Cleverdon. 255e2780a68SIngo Molnar */ 256be163a15SIngo Molnar struct apic { 25772f48a38SThomas Gleixner /* Hotpath functions first */ 258185c8f33SThomas Gleixner void (*eoi)(void); 259185c8f33SThomas Gleixner void (*native_eoi)(void); 26072f48a38SThomas Gleixner void (*write)(u32 reg, u32 v); 26172f48a38SThomas Gleixner u32 (*read)(u32 reg); 262e2780a68SIngo Molnar 26372f48a38SThomas Gleixner /* IPI related functions */ 26472f48a38SThomas Gleixner void (*wait_icr_idle)(void); 26572f48a38SThomas Gleixner u32 (*safe_wait_icr_idle)(void); 26672f48a38SThomas Gleixner 26772f48a38SThomas Gleixner void (*send_IPI)(int cpu, int vector); 26872f48a38SThomas Gleixner void (*send_IPI_mask)(const struct cpumask *mask, int vector); 26972f48a38SThomas Gleixner void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); 27072f48a38SThomas Gleixner void (*send_IPI_allbutself)(int vector); 27172f48a38SThomas Gleixner void (*send_IPI_all)(int vector); 27272f48a38SThomas Gleixner void (*send_IPI_self)(int vector); 27372f48a38SThomas Gleixner 27472161299SThomas Gleixner enum apic_delivery_modes delivery_mode; 275b5a5ce58SThomas Gleixner 276b5a5ce58SThomas Gleixner u32 disable_esr : 1, 277b5a5ce58SThomas Gleixner dest_mode_logical : 1, 278b5a5ce58SThomas Gleixner x2apic_set_max_apicid : 1; 27972f48a38SThomas Gleixner 2809f9e3bb1SThomas Gleixner u32 (*calc_dest_apicid)(unsigned int cpu); 28172f48a38SThomas Gleixner 28272f48a38SThomas Gleixner /* ICR related functions */ 28372f48a38SThomas Gleixner u64 (*icr_read)(void); 28472f48a38SThomas Gleixner void (*icr_write)(u32 low, u32 high); 28572f48a38SThomas Gleixner 286d92e5e7cSThomas Gleixner /* The limit of the APIC ID space. */ 287d92e5e7cSThomas Gleixner u32 max_apic_id; 288d92e5e7cSThomas Gleixner 28972f48a38SThomas Gleixner /* Probe, setup and smpboot functions */ 290e2780a68SIngo Molnar int (*probe)(void); 291e2780a68SIngo Molnar int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); 2925a3a46bdSThomas Gleixner bool (*apic_id_registered)(void); 293e2780a68SIngo Molnar 29457e0aa44SThomas Gleixner bool (*check_apicid_used)(physid_mask_t *map, int apicid); 295e2780a68SIngo Molnar void (*init_apic_ldr)(void); 2967abc0753SCyrill Gorcunov void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); 297e2780a68SIngo Molnar int (*cpu_present_to_apicid)(int mps_cpu); 298e2780a68SIngo Molnar int (*phys_pkg_id)(int cpuid_apic, int index_msb); 299e2780a68SIngo Molnar 30072f48a38SThomas Gleixner u32 (*get_apic_id)(unsigned long x); 301727657e6SThomas Gleixner u32 (*set_apic_id)(unsigned int id); 302e2780a68SIngo Molnar 303e2780a68SIngo Molnar /* wakeup_secondary_cpu */ 3041f5bcabfSIngo Molnar int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); 305ff2e6468SSean Christopherson /* wakeup secondary CPU using 64-bit wakeup point */ 306ff2e6468SSean Christopherson int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); 307e2780a68SIngo Molnar 30872f48a38SThomas Gleixner char *name; 309e2780a68SIngo Molnar }; 310e2780a68SIngo Molnar 311*bef4f379SThomas Gleixner struct apic_override { 312*bef4f379SThomas Gleixner void (*eoi)(void); 313*bef4f379SThomas Gleixner void (*native_eoi)(void); 314*bef4f379SThomas Gleixner void (*write)(u32 reg, u32 v); 315*bef4f379SThomas Gleixner u32 (*read)(u32 reg); 316*bef4f379SThomas Gleixner void (*send_IPI)(int cpu, int vector); 317*bef4f379SThomas Gleixner void (*send_IPI_mask)(const struct cpumask *mask, int vector); 318*bef4f379SThomas Gleixner void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); 319*bef4f379SThomas Gleixner void (*send_IPI_allbutself)(int vector); 320*bef4f379SThomas Gleixner void (*send_IPI_all)(int vector); 321*bef4f379SThomas Gleixner void (*send_IPI_self)(int vector); 322*bef4f379SThomas Gleixner u64 (*icr_read)(void); 323*bef4f379SThomas Gleixner void (*icr_write)(u32 low, u32 high); 324*bef4f379SThomas Gleixner int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); 325*bef4f379SThomas Gleixner int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); 326*bef4f379SThomas Gleixner }; 327*bef4f379SThomas Gleixner 3280917c01fSIngo Molnar /* 3290917c01fSIngo Molnar * Pointer to the local APIC driver in use on this system (there's 3300917c01fSIngo Molnar * always just one such driver in use - the kernel decides via an 3310917c01fSIngo Molnar * early probing process which one it picks - and then sticks to it): 3320917c01fSIngo Molnar */ 333be163a15SIngo Molnar extern struct apic *apic; 3340917c01fSIngo Molnar 3350917c01fSIngo Molnar /* 336107e0e0cSSuresh Siddha * APIC drivers are probed based on how they are listed in the .apicdrivers 337107e0e0cSSuresh Siddha * section. So the order is important and enforced by the ordering 338107e0e0cSSuresh Siddha * of different apic driver files in the Makefile. 339107e0e0cSSuresh Siddha * 340107e0e0cSSuresh Siddha * For the files having two apic drivers, we use apic_drivers() 341107e0e0cSSuresh Siddha * to enforce the order with in them. 342107e0e0cSSuresh Siddha */ 343107e0e0cSSuresh Siddha #define apic_driver(sym) \ 34475fdd155SAndi Kleen static const struct apic *__apicdrivers_##sym __used \ 345107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 34633def849SJoe Perches __section(".apicdrivers") = { &sym } 347107e0e0cSSuresh Siddha 348107e0e0cSSuresh Siddha #define apic_drivers(sym1, sym2) \ 349107e0e0cSSuresh Siddha static struct apic *__apicdrivers_##sym1##sym2[2] __used \ 350107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 35133def849SJoe Perches __section(".apicdrivers") = { &sym1, &sym2 } 352107e0e0cSSuresh Siddha 353107e0e0cSSuresh Siddha extern struct apic *__apicdrivers[], *__apicdrivers_end[]; 354107e0e0cSSuresh Siddha 355107e0e0cSSuresh Siddha /* 3560917c01fSIngo Molnar * APIC functionality to boot other CPUs - only used on SMP: 3570917c01fSIngo Molnar */ 3580917c01fSIngo Molnar #ifdef CONFIG_SMP 3592cffad7bSThomas Gleixner extern int lapic_can_unplug_cpu(void); 3600917c01fSIngo Molnar #endif 361e2780a68SIngo Molnar 362d674cd19SCyrill Gorcunov #ifdef CONFIG_X86_LOCAL_APIC 363*bef4f379SThomas Gleixner extern struct apic_override __x86_apic_override; 364346b46beSFernando Luis Vázquez Cao 365*bef4f379SThomas Gleixner void __init apic_setup_apic_calls(void); 3663af1e415SThomas Gleixner void __init apic_install_driver(struct apic *driver); 3673af1e415SThomas Gleixner 368*bef4f379SThomas Gleixner #define apic_update_callback(_callback, _fn) { \ 369*bef4f379SThomas Gleixner __x86_apic_override._callback = _fn; \ 370*bef4f379SThomas Gleixner apic->_callback = _fn; \ 371*bef4f379SThomas Gleixner pr_info("APIC: %s() replaced with %ps()\n", #_callback, _fn); \ 372*bef4f379SThomas Gleixner } 373*bef4f379SThomas Gleixner 374e2780a68SIngo Molnar static inline u32 apic_read(u32 reg) 375e2780a68SIngo Molnar { 376e2780a68SIngo Molnar return apic->read(reg); 377e2780a68SIngo Molnar } 378e2780a68SIngo Molnar 379e2780a68SIngo Molnar static inline void apic_write(u32 reg, u32 val) 380e2780a68SIngo Molnar { 381e2780a68SIngo Molnar apic->write(reg, val); 382e2780a68SIngo Molnar } 383e2780a68SIngo Molnar 3842a43195dSMichael S. Tsirkin static inline void apic_eoi(void) 3852a43195dSMichael S. Tsirkin { 386185c8f33SThomas Gleixner apic->eoi(); 3872a43195dSMichael S. Tsirkin } 3882a43195dSMichael S. Tsirkin 3890fa07576SThomas Gleixner static inline void apic_native_eoi(void) 3900fa07576SThomas Gleixner { 3910fa07576SThomas Gleixner apic->native_eoi(); 3920fa07576SThomas Gleixner } 3930fa07576SThomas Gleixner 394e2780a68SIngo Molnar static inline u64 apic_icr_read(void) 395e2780a68SIngo Molnar { 396e2780a68SIngo Molnar return apic->icr_read(); 397e2780a68SIngo Molnar } 398e2780a68SIngo Molnar 399e2780a68SIngo Molnar static inline void apic_icr_write(u32 low, u32 high) 400e2780a68SIngo Molnar { 401e2780a68SIngo Molnar apic->icr_write(low, high); 402e2780a68SIngo Molnar } 403e2780a68SIngo Molnar 404e2780a68SIngo Molnar static inline void apic_wait_icr_idle(void) 405e2780a68SIngo Molnar { 406ee513d9dSThomas Gleixner if (apic->wait_icr_idle) 407e2780a68SIngo Molnar apic->wait_icr_idle(); 408e2780a68SIngo Molnar } 409e2780a68SIngo Molnar 410e2780a68SIngo Molnar static inline u32 safe_apic_wait_icr_idle(void) 411e2780a68SIngo Molnar { 41213d779fdSThomas Gleixner return apic->safe_wait_icr_idle ? apic->safe_wait_icr_idle() : 0; 413e2780a68SIngo Molnar } 414e2780a68SIngo Molnar 4159132d720SThomas Gleixner static inline bool apic_id_valid(u32 apic_id) 4169132d720SThomas Gleixner { 417d8666cf7SThomas Gleixner return apic_id <= apic->max_apic_id; 4189132d720SThomas Gleixner } 4199132d720SThomas Gleixner 420185c8f33SThomas Gleixner extern void __init apic_set_eoi_cb(void (*eoi)(void)); 4211551df64SMichael S. Tsirkin 422d674cd19SCyrill Gorcunov #else /* CONFIG_X86_LOCAL_APIC */ 423d674cd19SCyrill Gorcunov 424d674cd19SCyrill Gorcunov static inline u32 apic_read(u32 reg) { return 0; } 425d674cd19SCyrill Gorcunov static inline void apic_write(u32 reg, u32 val) { } 4262a43195dSMichael S. Tsirkin static inline void apic_eoi(void) { } 427d674cd19SCyrill Gorcunov static inline u64 apic_icr_read(void) { return 0; } 428d674cd19SCyrill Gorcunov static inline void apic_icr_write(u32 low, u32 high) { } 429d674cd19SCyrill Gorcunov static inline void apic_wait_icr_idle(void) { } 430d674cd19SCyrill Gorcunov static inline u32 safe_apic_wait_icr_idle(void) { return 0; } 431185c8f33SThomas Gleixner static inline void apic_set_eoi_cb(void (*eoi)(void)) {} 4320fa07576SThomas Gleixner static inline void apic_native_eoi(void) { WARN_ON_ONCE(1); } 433*bef4f379SThomas Gleixner static inline void apic_setup_apic_calls(void) { } 434*bef4f379SThomas Gleixner 435*bef4f379SThomas Gleixner #define apic_update_callback(_callback, _fn) do { } while (0) 436d674cd19SCyrill Gorcunov 437d674cd19SCyrill Gorcunov #endif /* CONFIG_X86_LOCAL_APIC */ 438e2780a68SIngo Molnar 439c0255770SThomas Gleixner extern void apic_ack_irq(struct irq_data *data); 440c0255770SThomas Gleixner 4416f1a4891SThomas Gleixner static inline bool lapic_vector_set_in_irr(unsigned int vector) 4426f1a4891SThomas Gleixner { 4436f1a4891SThomas Gleixner u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); 4446f1a4891SThomas Gleixner 4456f1a4891SThomas Gleixner return !!(irr & (1U << (vector % 32))); 4466f1a4891SThomas Gleixner } 4476f1a4891SThomas Gleixner 448e2780a68SIngo Molnar static inline unsigned default_get_apic_id(unsigned long x) 449e2780a68SIngo Molnar { 450e2780a68SIngo Molnar unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 451e2780a68SIngo Molnar 45242937e81SAndreas Herrmann if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID)) 453e2780a68SIngo Molnar return (x >> 24) & 0xFF; 454e2780a68SIngo Molnar else 455e2780a68SIngo Molnar return (x >> 24) & 0x0F; 456e2780a68SIngo Molnar } 457e2780a68SIngo Molnar 458e2780a68SIngo Molnar /* 4596ab1b27cSDavid Rientjes * Warm reset vector position: 460e2780a68SIngo Molnar */ 4616ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_LOW 0x467 4626ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_HIGH 0x469 463e2780a68SIngo Molnar 464838312beSJan Beulich extern void generic_bigsmp_probe(void); 465e2780a68SIngo Molnar 466e2780a68SIngo Molnar #ifdef CONFIG_X86_LOCAL_APIC 467e2780a68SIngo Molnar 468e2780a68SIngo Molnar #include <asm/smp.h> 469e2780a68SIngo Molnar 47083a10522SThomas Gleixner extern struct apic apic_noop; 471e2780a68SIngo Molnar 472e2780a68SIngo Molnar static inline unsigned int read_apic_id(void) 473e2780a68SIngo Molnar { 47483a10522SThomas Gleixner unsigned int reg = apic_read(APIC_ID); 475e2780a68SIngo Molnar 476e2780a68SIngo Molnar return apic->get_apic_id(reg); 477e2780a68SIngo Molnar } 478e2780a68SIngo Molnar 479f39642d0SKuppuswamy Sathyanarayanan #ifdef CONFIG_X86_64 480f39642d0SKuppuswamy Sathyanarayanan typedef int (*wakeup_cpu_handler)(int apicid, unsigned long start_eip); 481f39642d0SKuppuswamy Sathyanarayanan extern void acpi_wake_cpu_handler_update(wakeup_cpu_handler handler); 482d75baa26SThomas Gleixner extern int default_acpi_madt_oem_check(char *, char *); 4839d87f5b6SThomas Gleixner extern void x86_64_probe_apic(void); 484d75baa26SThomas Gleixner #else 485d75baa26SThomas Gleixner static inline int default_acpi_madt_oem_check(char *a, char *b) { return 0; } 4869d87f5b6SThomas Gleixner static inline void x86_64_probe_apic(void) { } 487f39642d0SKuppuswamy Sathyanarayanan #endif 488f39642d0SKuppuswamy Sathyanarayanan 489a774635dSLi RongQing extern int default_apic_id_valid(u32 apicid); 4909f9e3bb1SThomas Gleixner 4919f9e3bb1SThomas Gleixner extern u32 apic_default_calc_apicid(unsigned int cpu); 4929f9e3bb1SThomas Gleixner extern u32 apic_flat_calc_apicid(unsigned int cpu); 4939f9e3bb1SThomas Gleixner 49483a10522SThomas Gleixner extern bool default_check_apicid_used(physid_mask_t *map, int apicid); 49583a10522SThomas Gleixner extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap); 496e2780a68SIngo Molnar extern int default_cpu_present_to_apicid(int mps_cpu); 497e2780a68SIngo Molnar 498a6625b47SThomas Gleixner #else /* CONFIG_X86_LOCAL_APIC */ 499a6625b47SThomas Gleixner 500a6625b47SThomas Gleixner static inline unsigned int read_apic_id(void) { return 0; } 501a6625b47SThomas Gleixner 502a6625b47SThomas Gleixner #endif /* !CONFIG_X86_LOCAL_APIC */ 50383a10522SThomas Gleixner 5046a4d2657SThomas Gleixner #ifdef CONFIG_SMP 5056a1cb5f5SThomas Gleixner void apic_smt_update(void); 5066a4d2657SThomas Gleixner #else 5076a1cb5f5SThomas Gleixner static inline void apic_smt_update(void) { } 5086a4d2657SThomas Gleixner #endif 5096a4d2657SThomas Gleixner 510b0a19555SThomas Gleixner struct msi_msg; 511f598181aSDavid Woodhouse struct irq_cfg; 512b0a19555SThomas Gleixner 513f598181aSDavid Woodhouse extern void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg, 514f598181aSDavid Woodhouse bool dmar); 515b0a19555SThomas Gleixner 51617405453SYoshihiro YUNOMAE extern void ioapic_zap_locks(void); 51717405453SYoshihiro YUNOMAE 5181965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 519