17e300dabSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 21965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 31965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 4bb898558SAl Viro 5e2780a68SIngo Molnar #include <linux/cpumask.h> 6bb898558SAl Viro 7bb898558SAl Viro #include <asm/alternative.h> 8bb898558SAl Viro #include <asm/cpufeature.h> 9e2780a68SIngo Molnar #include <asm/apicdef.h> 1060063497SArun Sharma #include <linux/atomic.h> 11e2780a68SIngo Molnar #include <asm/fixmap.h> 12e2780a68SIngo Molnar #include <asm/mpspec.h> 13bb898558SAl Viro #include <asm/msr.h> 14ffcba43fSNicolai Stange #include <asm/hardirq.h> 15bb898558SAl Viro 16bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 17bb898558SAl Viro 18bb898558SAl Viro /* 19bb898558SAl Viro * Debugging macros 20bb898558SAl Viro */ 21bb898558SAl Viro #define APIC_QUIET 0 22bb898558SAl Viro #define APIC_VERBOSE 1 23bb898558SAl Viro #define APIC_DEBUG 2 24bb898558SAl Viro 25b7c4948eSHidehiro Kawai /* Macros for apic_extnmi which controls external NMI masking */ 26b7c4948eSHidehiro Kawai #define APIC_EXTNMI_BSP 0 /* Default */ 27b7c4948eSHidehiro Kawai #define APIC_EXTNMI_ALL 1 28b7c4948eSHidehiro Kawai #define APIC_EXTNMI_NONE 2 29b7c4948eSHidehiro Kawai 30bb898558SAl Viro /* 31bb898558SAl Viro * Define the default level of output to be very little 32bb898558SAl Viro * This can be turned up by using apic=verbose for more 33bb898558SAl Viro * information and apic=debug for _lots_ of information. 34bb898558SAl Viro * apic_verbosity is defined in apic.c 35bb898558SAl Viro */ 36bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 37bb898558SAl Viro if ((v) <= apic_verbosity) \ 38bb898558SAl Viro printk(s, ##a); \ 39bb898558SAl Viro } while (0) 40bb898558SAl Viro 41bb898558SAl Viro 42160d8dacSIngo Molnar #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 43bb898558SAl Viro extern void generic_apic_probe(void); 44160d8dacSIngo Molnar #else 45160d8dacSIngo Molnar static inline void generic_apic_probe(void) 46160d8dacSIngo Molnar { 47160d8dacSIngo Molnar } 48160d8dacSIngo Molnar #endif 49bb898558SAl Viro 50bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 51bb898558SAl Viro 52ec633558SQian Cai extern int apic_verbosity; 53bb898558SAl Viro extern int local_apic_timer_c2_ok; 54bb898558SAl Viro 55bb898558SAl Viro extern int disable_apic; 5652ae346bSDaniel Drake extern unsigned int lapic_timer_period; 570939e4fdSIngo Molnar 584f45ed9fSDou Liyang extern enum apic_intr_mode_id apic_intr_mode; 594f45ed9fSDou Liyang enum apic_intr_mode_id { 604f45ed9fSDou Liyang APIC_PIC, 614f45ed9fSDou Liyang APIC_VIRTUAL_WIRE, 624f45ed9fSDou Liyang APIC_VIRTUAL_WIRE_NO_CONFIG, 634f45ed9fSDou Liyang APIC_SYMMETRIC_IO, 644f45ed9fSDou Liyang APIC_SYMMETRIC_IO_NO_ROUTING 654f45ed9fSDou Liyang }; 664f45ed9fSDou Liyang 670939e4fdSIngo Molnar #ifdef CONFIG_SMP 680939e4fdSIngo Molnar extern void __inquire_remote_apic(int apicid); 690939e4fdSIngo Molnar #else /* CONFIG_SMP */ 700939e4fdSIngo Molnar static inline void __inquire_remote_apic(int apicid) 710939e4fdSIngo Molnar { 720939e4fdSIngo Molnar } 730939e4fdSIngo Molnar #endif /* CONFIG_SMP */ 740939e4fdSIngo Molnar 750939e4fdSIngo Molnar static inline void default_inquire_remote_apic(int apicid) 760939e4fdSIngo Molnar { 770939e4fdSIngo Molnar if (apic_verbosity >= APIC_DEBUG) 780939e4fdSIngo Molnar __inquire_remote_apic(apicid); 790939e4fdSIngo Molnar } 800939e4fdSIngo Molnar 81bb898558SAl Viro /* 828312136fSCyrill Gorcunov * With 82489DX we can't rely on apic feature bit 838312136fSCyrill Gorcunov * retrieved via cpuid but still have to deal with 848312136fSCyrill Gorcunov * such an apic chip so we assume that SMP configuration 858312136fSCyrill Gorcunov * is found from MP table (64bit case uses ACPI mostly 868312136fSCyrill Gorcunov * which set smp presence flag as well so we are safe 878312136fSCyrill Gorcunov * to use this helper too). 888312136fSCyrill Gorcunov */ 898312136fSCyrill Gorcunov static inline bool apic_from_smp_config(void) 908312136fSCyrill Gorcunov { 918312136fSCyrill Gorcunov return smp_found_config && !disable_apic; 928312136fSCyrill Gorcunov } 938312136fSCyrill Gorcunov 948312136fSCyrill Gorcunov /* 95bb898558SAl Viro * Basic functions accessing APICs. 96bb898558SAl Viro */ 97bb898558SAl Viro #ifdef CONFIG_PARAVIRT 98bb898558SAl Viro #include <asm/paravirt.h> 99bb898558SAl Viro #endif 100bb898558SAl Viro 101bb898558SAl Viro extern int setup_profiling_timer(unsigned int); 102bb898558SAl Viro 103bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 104bb898558SAl Viro { 105bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 106bb898558SAl Viro 107a930dc45SBorislav Petkov alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP, 108bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 109bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 110bb898558SAl Viro } 111bb898558SAl Viro 112bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 113bb898558SAl Viro { 114bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 115bb898558SAl Viro } 116bb898558SAl Viro 117c1eeb2deSYinghai Lu extern void native_apic_wait_icr_idle(void); 118c1eeb2deSYinghai Lu extern u32 native_safe_apic_wait_icr_idle(void); 119c1eeb2deSYinghai Lu extern void native_apic_icr_write(u32 low, u32 id); 120c1eeb2deSYinghai Lu extern u64 native_apic_icr_read(void); 121c1eeb2deSYinghai Lu 1228d806960SThomas Gleixner static inline bool apic_is_x2apic_enabled(void) 1238d806960SThomas Gleixner { 1248d806960SThomas Gleixner u64 msr; 1258d806960SThomas Gleixner 1268d806960SThomas Gleixner if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) 1278d806960SThomas Gleixner return false; 1288d806960SThomas Gleixner return msr & X2APIC_ENABLE; 1298d806960SThomas Gleixner } 1308d806960SThomas Gleixner 131e02ae387SPaolo Bonzini extern void enable_IR_x2apic(void); 132e02ae387SPaolo Bonzini 133e02ae387SPaolo Bonzini extern int get_physical_broadcast(void); 134e02ae387SPaolo Bonzini 135e02ae387SPaolo Bonzini extern int lapic_get_maxlvt(void); 136e02ae387SPaolo Bonzini extern void clear_local_APIC(void); 137e02ae387SPaolo Bonzini extern void disconnect_bsp_APIC(int virt_wire_setup); 138e02ae387SPaolo Bonzini extern void disable_local_APIC(void); 13960dcaad5SThomas Gleixner extern void apic_soft_disable(void); 140e02ae387SPaolo Bonzini extern void lapic_shutdown(void); 141e02ae387SPaolo Bonzini extern void sync_Arb_IDs(void); 142fc90ccfdSVille Syrjälä extern void init_bsp_APIC(void); 14397992387SThomas Gleixner extern void apic_intr_mode_select(void); 1444b1669e8SDou Liyang extern void apic_intr_mode_init(void); 145e02ae387SPaolo Bonzini extern void init_apic_mappings(void); 146e02ae387SPaolo Bonzini void register_lapic_address(unsigned long address); 147e02ae387SPaolo Bonzini extern void setup_boot_APIC_clock(void); 148e02ae387SPaolo Bonzini extern void setup_secondary_APIC_clock(void); 1496731b0d6SNicolai Stange extern void lapic_update_tsc_freq(void); 150e02ae387SPaolo Bonzini 151e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 152e02ae387SPaolo Bonzini static inline int apic_force_enable(unsigned long addr) 153e02ae387SPaolo Bonzini { 154e02ae387SPaolo Bonzini return -1; 155e02ae387SPaolo Bonzini } 156e02ae387SPaolo Bonzini #else 157e02ae387SPaolo Bonzini extern int apic_force_enable(unsigned long addr); 158e02ae387SPaolo Bonzini #endif 159e02ae387SPaolo Bonzini 160e02ae387SPaolo Bonzini extern void apic_ap_setup(void); 161e02ae387SPaolo Bonzini 162e02ae387SPaolo Bonzini /* 163e02ae387SPaolo Bonzini * On 32bit this is mach-xxx local 164e02ae387SPaolo Bonzini */ 165e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 166e02ae387SPaolo Bonzini extern int apic_is_clustered_box(void); 167e02ae387SPaolo Bonzini #else 168e02ae387SPaolo Bonzini static inline int apic_is_clustered_box(void) 169e02ae387SPaolo Bonzini { 170e02ae387SPaolo Bonzini return 0; 171e02ae387SPaolo Bonzini } 172e02ae387SPaolo Bonzini #endif 173e02ae387SPaolo Bonzini 174e02ae387SPaolo Bonzini extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask); 1750fa115daSThomas Gleixner extern void lapic_assign_system_vectors(void); 1760fa115daSThomas Gleixner extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace); 1770fa115daSThomas Gleixner extern void lapic_online(void); 1780fa115daSThomas Gleixner extern void lapic_offline(void); 179c8c40767SThomas Gleixner extern bool apic_needs_pit(void); 180e02ae387SPaolo Bonzini 18122ca7ee9SThomas Gleixner extern void apic_send_IPI_allbutself(unsigned int vector); 18222ca7ee9SThomas Gleixner 183e02ae387SPaolo Bonzini #else /* !CONFIG_X86_LOCAL_APIC */ 184e02ae387SPaolo Bonzini static inline void lapic_shutdown(void) { } 185e02ae387SPaolo Bonzini #define local_apic_timer_c2_ok 1 186e02ae387SPaolo Bonzini static inline void init_apic_mappings(void) { } 187e02ae387SPaolo Bonzini static inline void disable_local_APIC(void) { } 188e02ae387SPaolo Bonzini # define setup_boot_APIC_clock x86_init_noop 189e02ae387SPaolo Bonzini # define setup_secondary_APIC_clock x86_init_noop 1906731b0d6SNicolai Stange static inline void lapic_update_tsc_freq(void) { } 191ccf5355dSDou Liyang static inline void init_bsp_APIC(void) { } 19297992387SThomas Gleixner static inline void apic_intr_mode_select(void) { } 1934b1669e8SDou Liyang static inline void apic_intr_mode_init(void) { } 1940fa115daSThomas Gleixner static inline void lapic_assign_system_vectors(void) { } 1950fa115daSThomas Gleixner static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { } 196c8c40767SThomas Gleixner static inline bool apic_needs_pit(void) { return true; } 197e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_LOCAL_APIC */ 198e02ae387SPaolo Bonzini 199d0b03bd1SHan, Weidong #ifdef CONFIG_X86_X2APIC 200ce4e240cSSuresh Siddha /* 201ce4e240cSSuresh Siddha * Make previous memory operations globally visible before 202ce4e240cSSuresh Siddha * sending the IPI through x2apic wrmsr. We need a serializing instruction or 203ce4e240cSSuresh Siddha * mfence for this. 204ce4e240cSSuresh Siddha */ 205ce4e240cSSuresh Siddha static inline void x2apic_wrmsr_fence(void) 206ce4e240cSSuresh Siddha { 207ce4e240cSSuresh Siddha asm volatile("mfence" : : : "memory"); 208ce4e240cSSuresh Siddha } 209ce4e240cSSuresh Siddha 210bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 211bb898558SAl Viro { 212bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 213bb898558SAl Viro reg == APIC_LVR) 214bb898558SAl Viro return; 215bb898558SAl Viro 216bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 217bb898558SAl Viro } 218bb898558SAl Viro 2190ab711aeSMichael S. Tsirkin static inline void native_apic_msr_eoi_write(u32 reg, u32 v) 2200ab711aeSMichael S. Tsirkin { 221a585df8eSBorislav Petkov __wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0); 2220ab711aeSMichael S. Tsirkin } 2230ab711aeSMichael S. Tsirkin 224bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 225bb898558SAl Viro { 2260059b243SAndi Kleen u64 msr; 227bb898558SAl Viro 228bb898558SAl Viro if (reg == APIC_DFR) 229bb898558SAl Viro return -1; 230bb898558SAl Viro 2310059b243SAndi Kleen rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); 2320059b243SAndi Kleen return (u32)msr; 233bb898558SAl Viro } 234bb898558SAl Viro 235c1eeb2deSYinghai Lu static inline void native_x2apic_wait_icr_idle(void) 236c1eeb2deSYinghai Lu { 237c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 238c1eeb2deSYinghai Lu return; 239c1eeb2deSYinghai Lu } 240c1eeb2deSYinghai Lu 241c1eeb2deSYinghai Lu static inline u32 native_safe_x2apic_wait_icr_idle(void) 242c1eeb2deSYinghai Lu { 243c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 244c1eeb2deSYinghai Lu return 0; 245c1eeb2deSYinghai Lu } 246c1eeb2deSYinghai Lu 247c1eeb2deSYinghai Lu static inline void native_x2apic_icr_write(u32 low, u32 id) 248c1eeb2deSYinghai Lu { 249c1eeb2deSYinghai Lu wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); 250c1eeb2deSYinghai Lu } 251c1eeb2deSYinghai Lu 252c1eeb2deSYinghai Lu static inline u64 native_x2apic_icr_read(void) 253c1eeb2deSYinghai Lu { 254c1eeb2deSYinghai Lu unsigned long val; 255c1eeb2deSYinghai Lu 256c1eeb2deSYinghai Lu rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); 257c1eeb2deSYinghai Lu return val; 258c1eeb2deSYinghai Lu } 259c1eeb2deSYinghai Lu 26081a46dd8SThomas Gleixner extern int x2apic_mode; 261fc1edaf9SSuresh Siddha extern int x2apic_phys; 262d524165cSThomas Gleixner extern void __init check_x2apic(void); 263659006bfSThomas Gleixner extern void x2apic_setup(void); 264bb898558SAl Viro static inline int x2apic_enabled(void) 265bb898558SAl Viro { 26662436a4dSBorislav Petkov return boot_cpu_has(X86_FEATURE_X2APIC) && apic_is_x2apic_enabled(); 267bb898558SAl Viro } 268fc1edaf9SSuresh Siddha 26962436a4dSBorislav Petkov #define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC)) 270e02ae387SPaolo Bonzini #else /* !CONFIG_X86_X2APIC */ 27155eae7deSThomas Gleixner static inline void check_x2apic(void) { } 272659006bfSThomas Gleixner static inline void x2apic_setup(void) { } 27355eae7deSThomas Gleixner static inline int x2apic_enabled(void) { return 0; } 274cf6567feSSuresh Siddha 27581a46dd8SThomas Gleixner #define x2apic_mode (0) 27681a46dd8SThomas Gleixner #define x2apic_supported() (0) 277e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_X2APIC */ 278bb898558SAl Viro 2790e24f7c9SThomas Gleixner struct irq_data; 2800e24f7c9SThomas Gleixner 281e2780a68SIngo Molnar /* 282e2780a68SIngo Molnar * Copyright 2004 James Cleverdon, IBM. 283e2780a68SIngo Molnar * 284e2780a68SIngo Molnar * Generic APIC sub-arch data struct. 285e2780a68SIngo Molnar * 286e2780a68SIngo Molnar * Hacked for x86-64 by James Cleverdon from i386 architecture code by 287e2780a68SIngo Molnar * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and 288e2780a68SIngo Molnar * James Cleverdon. 289e2780a68SIngo Molnar */ 290be163a15SIngo Molnar struct apic { 29172f48a38SThomas Gleixner /* Hotpath functions first */ 29272f48a38SThomas Gleixner void (*eoi_write)(u32 reg, u32 v); 29372f48a38SThomas Gleixner void (*native_eoi_write)(u32 reg, u32 v); 29472f48a38SThomas Gleixner void (*write)(u32 reg, u32 v); 29572f48a38SThomas Gleixner u32 (*read)(u32 reg); 296e2780a68SIngo Molnar 29772f48a38SThomas Gleixner /* IPI related functions */ 29872f48a38SThomas Gleixner void (*wait_icr_idle)(void); 29972f48a38SThomas Gleixner u32 (*safe_wait_icr_idle)(void); 30072f48a38SThomas Gleixner 30172f48a38SThomas Gleixner void (*send_IPI)(int cpu, int vector); 30272f48a38SThomas Gleixner void (*send_IPI_mask)(const struct cpumask *mask, int vector); 30372f48a38SThomas Gleixner void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); 30472f48a38SThomas Gleixner void (*send_IPI_allbutself)(int vector); 30572f48a38SThomas Gleixner void (*send_IPI_all)(int vector); 30672f48a38SThomas Gleixner void (*send_IPI_self)(int vector); 30772f48a38SThomas Gleixner 30872f48a38SThomas Gleixner /* dest_logical is used by the IPI functions */ 30972f48a38SThomas Gleixner u32 dest_logical; 31072f48a38SThomas Gleixner u32 disable_esr; 31172f48a38SThomas Gleixner u32 irq_delivery_mode; 31272f48a38SThomas Gleixner u32 irq_dest_mode; 31372f48a38SThomas Gleixner 3149f9e3bb1SThomas Gleixner u32 (*calc_dest_apicid)(unsigned int cpu); 31572f48a38SThomas Gleixner 31672f48a38SThomas Gleixner /* ICR related functions */ 31772f48a38SThomas Gleixner u64 (*icr_read)(void); 31872f48a38SThomas Gleixner void (*icr_write)(u32 low, u32 high); 31972f48a38SThomas Gleixner 32072f48a38SThomas Gleixner /* Probe, setup and smpboot functions */ 321e2780a68SIngo Molnar int (*probe)(void); 322e2780a68SIngo Molnar int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); 323a774635dSLi RongQing int (*apic_id_valid)(u32 apicid); 324e2780a68SIngo Molnar int (*apic_id_registered)(void); 325e2780a68SIngo Molnar 32657e0aa44SThomas Gleixner bool (*check_apicid_used)(physid_mask_t *map, int apicid); 327e2780a68SIngo Molnar void (*init_apic_ldr)(void); 3287abc0753SCyrill Gorcunov void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); 329e2780a68SIngo Molnar void (*setup_apic_routing)(void); 330e2780a68SIngo Molnar int (*cpu_present_to_apicid)(int mps_cpu); 3317abc0753SCyrill Gorcunov void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap); 332e11dadabSThomas Gleixner int (*check_phys_apicid_present)(int phys_apicid); 333e2780a68SIngo Molnar int (*phys_pkg_id)(int cpuid_apic, int index_msb); 334e2780a68SIngo Molnar 33572f48a38SThomas Gleixner u32 (*get_apic_id)(unsigned long x); 336727657e6SThomas Gleixner u32 (*set_apic_id)(unsigned int id); 337e2780a68SIngo Molnar 338e2780a68SIngo Molnar /* wakeup_secondary_cpu */ 3391f5bcabfSIngo Molnar int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); 340e2780a68SIngo Molnar 341e2780a68SIngo Molnar void (*inquire_remote_apic)(int apicid); 342e2780a68SIngo Molnar 343acb8bc09STejun Heo #ifdef CONFIG_X86_32 344acb8bc09STejun Heo /* 345acb8bc09STejun Heo * Called very early during boot from get_smp_config(). It should 346acb8bc09STejun Heo * return the logical apicid. x86_[bios]_cpu_to_apicid is 347acb8bc09STejun Heo * initialized before this function is called. 348acb8bc09STejun Heo * 349acb8bc09STejun Heo * If logical apicid can't be determined that early, the function 350acb8bc09STejun Heo * may return BAD_APICID. Logical apicid will be configured after 351acb8bc09STejun Heo * init_apic_ldr() while bringing up CPUs. Note that NUMA affinity 352acb8bc09STejun Heo * won't be applied properly during early boot in this case. 353acb8bc09STejun Heo */ 354acb8bc09STejun Heo int (*x86_32_early_logical_apicid)(int cpu); 355acb8bc09STejun Heo #endif 35672f48a38SThomas Gleixner char *name; 357e2780a68SIngo Molnar }; 358e2780a68SIngo Molnar 3590917c01fSIngo Molnar /* 3600917c01fSIngo Molnar * Pointer to the local APIC driver in use on this system (there's 3610917c01fSIngo Molnar * always just one such driver in use - the kernel decides via an 3620917c01fSIngo Molnar * early probing process which one it picks - and then sticks to it): 3630917c01fSIngo Molnar */ 364be163a15SIngo Molnar extern struct apic *apic; 3650917c01fSIngo Molnar 3660917c01fSIngo Molnar /* 367107e0e0cSSuresh Siddha * APIC drivers are probed based on how they are listed in the .apicdrivers 368107e0e0cSSuresh Siddha * section. So the order is important and enforced by the ordering 369107e0e0cSSuresh Siddha * of different apic driver files in the Makefile. 370107e0e0cSSuresh Siddha * 371107e0e0cSSuresh Siddha * For the files having two apic drivers, we use apic_drivers() 372107e0e0cSSuresh Siddha * to enforce the order with in them. 373107e0e0cSSuresh Siddha */ 374107e0e0cSSuresh Siddha #define apic_driver(sym) \ 37575fdd155SAndi Kleen static const struct apic *__apicdrivers_##sym __used \ 376107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 377107e0e0cSSuresh Siddha __section(.apicdrivers) = { &sym } 378107e0e0cSSuresh Siddha 379107e0e0cSSuresh Siddha #define apic_drivers(sym1, sym2) \ 380107e0e0cSSuresh Siddha static struct apic *__apicdrivers_##sym1##sym2[2] __used \ 381107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 382107e0e0cSSuresh Siddha __section(.apicdrivers) = { &sym1, &sym2 } 383107e0e0cSSuresh Siddha 384107e0e0cSSuresh Siddha extern struct apic *__apicdrivers[], *__apicdrivers_end[]; 385107e0e0cSSuresh Siddha 386107e0e0cSSuresh Siddha /* 3870917c01fSIngo Molnar * APIC functionality to boot other CPUs - only used on SMP: 3880917c01fSIngo Molnar */ 3890917c01fSIngo Molnar #ifdef CONFIG_SMP 3902b6163bfSYinghai Lu extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip); 3912cffad7bSThomas Gleixner extern int lapic_can_unplug_cpu(void); 3920917c01fSIngo Molnar #endif 393e2780a68SIngo Molnar 394d674cd19SCyrill Gorcunov #ifdef CONFIG_X86_LOCAL_APIC 395346b46beSFernando Luis Vázquez Cao 396e2780a68SIngo Molnar static inline u32 apic_read(u32 reg) 397e2780a68SIngo Molnar { 398e2780a68SIngo Molnar return apic->read(reg); 399e2780a68SIngo Molnar } 400e2780a68SIngo Molnar 401e2780a68SIngo Molnar static inline void apic_write(u32 reg, u32 val) 402e2780a68SIngo Molnar { 403e2780a68SIngo Molnar apic->write(reg, val); 404e2780a68SIngo Molnar } 405e2780a68SIngo Molnar 4062a43195dSMichael S. Tsirkin static inline void apic_eoi(void) 4072a43195dSMichael S. Tsirkin { 4082a43195dSMichael S. Tsirkin apic->eoi_write(APIC_EOI, APIC_EOI_ACK); 4092a43195dSMichael S. Tsirkin } 4102a43195dSMichael S. Tsirkin 411e2780a68SIngo Molnar static inline u64 apic_icr_read(void) 412e2780a68SIngo Molnar { 413e2780a68SIngo Molnar return apic->icr_read(); 414e2780a68SIngo Molnar } 415e2780a68SIngo Molnar 416e2780a68SIngo Molnar static inline void apic_icr_write(u32 low, u32 high) 417e2780a68SIngo Molnar { 418e2780a68SIngo Molnar apic->icr_write(low, high); 419e2780a68SIngo Molnar } 420e2780a68SIngo Molnar 421e2780a68SIngo Molnar static inline void apic_wait_icr_idle(void) 422e2780a68SIngo Molnar { 423e2780a68SIngo Molnar apic->wait_icr_idle(); 424e2780a68SIngo Molnar } 425e2780a68SIngo Molnar 426e2780a68SIngo Molnar static inline u32 safe_apic_wait_icr_idle(void) 427e2780a68SIngo Molnar { 428e2780a68SIngo Molnar return apic->safe_wait_icr_idle(); 429e2780a68SIngo Molnar } 430e2780a68SIngo Molnar 4311551df64SMichael S. Tsirkin extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); 4321551df64SMichael S. Tsirkin 433d674cd19SCyrill Gorcunov #else /* CONFIG_X86_LOCAL_APIC */ 434d674cd19SCyrill Gorcunov 435d674cd19SCyrill Gorcunov static inline u32 apic_read(u32 reg) { return 0; } 436d674cd19SCyrill Gorcunov static inline void apic_write(u32 reg, u32 val) { } 4372a43195dSMichael S. Tsirkin static inline void apic_eoi(void) { } 438d674cd19SCyrill Gorcunov static inline u64 apic_icr_read(void) { return 0; } 439d674cd19SCyrill Gorcunov static inline void apic_icr_write(u32 low, u32 high) { } 440d674cd19SCyrill Gorcunov static inline void apic_wait_icr_idle(void) { } 441d674cd19SCyrill Gorcunov static inline u32 safe_apic_wait_icr_idle(void) { return 0; } 4421551df64SMichael S. Tsirkin static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {} 443d674cd19SCyrill Gorcunov 444d674cd19SCyrill Gorcunov #endif /* CONFIG_X86_LOCAL_APIC */ 445e2780a68SIngo Molnar 446c0255770SThomas Gleixner extern void apic_ack_irq(struct irq_data *data); 447c0255770SThomas Gleixner 448e2780a68SIngo Molnar static inline void ack_APIC_irq(void) 449e2780a68SIngo Molnar { 450e2780a68SIngo Molnar /* 451e2780a68SIngo Molnar * ack_APIC_irq() actually gets compiled as a single instruction 452e2780a68SIngo Molnar * ... yummie. 453e2780a68SIngo Molnar */ 4542a43195dSMichael S. Tsirkin apic_eoi(); 455e2780a68SIngo Molnar } 456e2780a68SIngo Molnar 4576f1a4891SThomas Gleixner 4586f1a4891SThomas Gleixner static inline bool lapic_vector_set_in_irr(unsigned int vector) 4596f1a4891SThomas Gleixner { 4606f1a4891SThomas Gleixner u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); 4616f1a4891SThomas Gleixner 4626f1a4891SThomas Gleixner return !!(irr & (1U << (vector % 32))); 4636f1a4891SThomas Gleixner } 4646f1a4891SThomas Gleixner 465e2780a68SIngo Molnar static inline unsigned default_get_apic_id(unsigned long x) 466e2780a68SIngo Molnar { 467e2780a68SIngo Molnar unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 468e2780a68SIngo Molnar 46942937e81SAndreas Herrmann if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID)) 470e2780a68SIngo Molnar return (x >> 24) & 0xFF; 471e2780a68SIngo Molnar else 472e2780a68SIngo Molnar return (x >> 24) & 0x0F; 473e2780a68SIngo Molnar } 474e2780a68SIngo Molnar 475e2780a68SIngo Molnar /* 4766ab1b27cSDavid Rientjes * Warm reset vector position: 477e2780a68SIngo Molnar */ 4786ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_LOW 0x467 4796ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_HIGH 0x469 480e2780a68SIngo Molnar 481838312beSJan Beulich extern void generic_bigsmp_probe(void); 482e2780a68SIngo Molnar 483e2780a68SIngo Molnar #ifdef CONFIG_X86_LOCAL_APIC 484e2780a68SIngo Molnar 485e2780a68SIngo Molnar #include <asm/smp.h> 486e2780a68SIngo Molnar 487e2780a68SIngo Molnar #define APIC_DFR_VALUE (APIC_DFR_FLAT) 488e2780a68SIngo Molnar 4890816b0f0SVlad Zolotarov DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid); 490e2780a68SIngo Molnar 49183a10522SThomas Gleixner extern struct apic apic_noop; 492e2780a68SIngo Molnar 493e2780a68SIngo Molnar static inline unsigned int read_apic_id(void) 494e2780a68SIngo Molnar { 49583a10522SThomas Gleixner unsigned int reg = apic_read(APIC_ID); 496e2780a68SIngo Molnar 497e2780a68SIngo Molnar return apic->get_apic_id(reg); 498e2780a68SIngo Molnar } 499e2780a68SIngo Molnar 500a774635dSLi RongQing extern int default_apic_id_valid(u32 apicid); 501a491cc90SJiang Liu extern int default_acpi_madt_oem_check(char *, char *); 502e2780a68SIngo Molnar extern void default_setup_apic_routing(void); 5039f9e3bb1SThomas Gleixner 5049f9e3bb1SThomas Gleixner extern u32 apic_default_calc_apicid(unsigned int cpu); 5059f9e3bb1SThomas Gleixner extern u32 apic_flat_calc_apicid(unsigned int cpu); 5069f9e3bb1SThomas Gleixner 50783a10522SThomas Gleixner extern bool default_check_apicid_used(physid_mask_t *map, int apicid); 50883a10522SThomas Gleixner extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap); 509e2780a68SIngo Molnar extern int default_cpu_present_to_apicid(int mps_cpu); 510e11dadabSThomas Gleixner extern int default_check_phys_apicid_present(int phys_apicid); 511e2780a68SIngo Molnar 512e2780a68SIngo Molnar #endif /* CONFIG_X86_LOCAL_APIC */ 51383a10522SThomas Gleixner 5146a4d2657SThomas Gleixner #ifdef CONFIG_SMP 5156a4d2657SThomas Gleixner bool apic_id_is_primary_thread(unsigned int id); 5166a1cb5f5SThomas Gleixner void apic_smt_update(void); 5176a4d2657SThomas Gleixner #else 5186a4d2657SThomas Gleixner static inline bool apic_id_is_primary_thread(unsigned int id) { return false; } 5196a1cb5f5SThomas Gleixner static inline void apic_smt_update(void) { } 5206a4d2657SThomas Gleixner #endif 5216a4d2657SThomas Gleixner 522b0a19555SThomas Gleixner struct msi_msg; 523b0a19555SThomas Gleixner 524b0a19555SThomas Gleixner #ifdef CONFIG_PCI_MSI 525b0a19555SThomas Gleixner void x86_vector_msi_compose_msg(struct irq_data *data, struct msi_msg *msg); 526b0a19555SThomas Gleixner #else 527b0a19555SThomas Gleixner # define x86_vector_msi_compose_msg NULL 528b0a19555SThomas Gleixner #endif 529b0a19555SThomas Gleixner 53017405453SYoshihiro YUNOMAE extern void ioapic_zap_locks(void); 53117405453SYoshihiro YUNOMAE 5321965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 533