11965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 21965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 3bb898558SAl Viro 4e2780a68SIngo Molnar #include <linux/cpumask.h> 5e2780a68SIngo Molnar #include <linux/pm.h> 6bb898558SAl Viro 7bb898558SAl Viro #include <asm/alternative.h> 8bb898558SAl Viro #include <asm/cpufeature.h> 9e2780a68SIngo Molnar #include <asm/processor.h> 10e2780a68SIngo Molnar #include <asm/apicdef.h> 1160063497SArun Sharma #include <linux/atomic.h> 12e2780a68SIngo Molnar #include <asm/fixmap.h> 13e2780a68SIngo Molnar #include <asm/mpspec.h> 14bb898558SAl Viro #include <asm/msr.h> 15eddc0e92SSeiji Aguchi #include <asm/idle.h> 16bb898558SAl Viro 17bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 18bb898558SAl Viro 19bb898558SAl Viro /* 20bb898558SAl Viro * Debugging macros 21bb898558SAl Viro */ 22bb898558SAl Viro #define APIC_QUIET 0 23bb898558SAl Viro #define APIC_VERBOSE 1 24bb898558SAl Viro #define APIC_DEBUG 2 25bb898558SAl Viro 26bb898558SAl Viro /* 27bb898558SAl Viro * Define the default level of output to be very little 28bb898558SAl Viro * This can be turned up by using apic=verbose for more 29bb898558SAl Viro * information and apic=debug for _lots_ of information. 30bb898558SAl Viro * apic_verbosity is defined in apic.c 31bb898558SAl Viro */ 32bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 33bb898558SAl Viro if ((v) <= apic_verbosity) \ 34bb898558SAl Viro printk(s, ##a); \ 35bb898558SAl Viro } while (0) 36bb898558SAl Viro 37bb898558SAl Viro 38160d8dacSIngo Molnar #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 39bb898558SAl Viro extern void generic_apic_probe(void); 40160d8dacSIngo Molnar #else 41160d8dacSIngo Molnar static inline void generic_apic_probe(void) 42160d8dacSIngo Molnar { 43160d8dacSIngo Molnar } 44160d8dacSIngo Molnar #endif 45bb898558SAl Viro 46bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 47bb898558SAl Viro 48bb898558SAl Viro extern unsigned int apic_verbosity; 49bb898558SAl Viro extern int local_apic_timer_c2_ok; 50bb898558SAl Viro 51bb898558SAl Viro extern int disable_apic; 521ade93efSJacob Pan extern unsigned int lapic_timer_frequency; 530939e4fdSIngo Molnar 540939e4fdSIngo Molnar #ifdef CONFIG_SMP 550939e4fdSIngo Molnar extern void __inquire_remote_apic(int apicid); 560939e4fdSIngo Molnar #else /* CONFIG_SMP */ 570939e4fdSIngo Molnar static inline void __inquire_remote_apic(int apicid) 580939e4fdSIngo Molnar { 590939e4fdSIngo Molnar } 600939e4fdSIngo Molnar #endif /* CONFIG_SMP */ 610939e4fdSIngo Molnar 620939e4fdSIngo Molnar static inline void default_inquire_remote_apic(int apicid) 630939e4fdSIngo Molnar { 640939e4fdSIngo Molnar if (apic_verbosity >= APIC_DEBUG) 650939e4fdSIngo Molnar __inquire_remote_apic(apicid); 660939e4fdSIngo Molnar } 670939e4fdSIngo Molnar 68bb898558SAl Viro /* 698312136fSCyrill Gorcunov * With 82489DX we can't rely on apic feature bit 708312136fSCyrill Gorcunov * retrieved via cpuid but still have to deal with 718312136fSCyrill Gorcunov * such an apic chip so we assume that SMP configuration 728312136fSCyrill Gorcunov * is found from MP table (64bit case uses ACPI mostly 738312136fSCyrill Gorcunov * which set smp presence flag as well so we are safe 748312136fSCyrill Gorcunov * to use this helper too). 758312136fSCyrill Gorcunov */ 768312136fSCyrill Gorcunov static inline bool apic_from_smp_config(void) 778312136fSCyrill Gorcunov { 788312136fSCyrill Gorcunov return smp_found_config && !disable_apic; 798312136fSCyrill Gorcunov } 808312136fSCyrill Gorcunov 818312136fSCyrill Gorcunov /* 82bb898558SAl Viro * Basic functions accessing APICs. 83bb898558SAl Viro */ 84bb898558SAl Viro #ifdef CONFIG_PARAVIRT 85bb898558SAl Viro #include <asm/paravirt.h> 86bb898558SAl Viro #endif 87bb898558SAl Viro 88bb898558SAl Viro extern int setup_profiling_timer(unsigned int); 89bb898558SAl Viro 90bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 91bb898558SAl Viro { 92bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 93bb898558SAl Viro 94bb898558SAl Viro alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP, 95bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 96bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 97bb898558SAl Viro } 98bb898558SAl Viro 99bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 100bb898558SAl Viro { 101bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 102bb898558SAl Viro } 103bb898558SAl Viro 104c1eeb2deSYinghai Lu extern void native_apic_wait_icr_idle(void); 105c1eeb2deSYinghai Lu extern u32 native_safe_apic_wait_icr_idle(void); 106c1eeb2deSYinghai Lu extern void native_apic_icr_write(u32 low, u32 id); 107c1eeb2deSYinghai Lu extern u64 native_apic_icr_read(void); 108c1eeb2deSYinghai Lu 109fc1edaf9SSuresh Siddha extern int x2apic_mode; 110b24696bcSFenghua Yu 111d0b03bd1SHan, Weidong #ifdef CONFIG_X86_X2APIC 112ce4e240cSSuresh Siddha /* 113ce4e240cSSuresh Siddha * Make previous memory operations globally visible before 114ce4e240cSSuresh Siddha * sending the IPI through x2apic wrmsr. We need a serializing instruction or 115ce4e240cSSuresh Siddha * mfence for this. 116ce4e240cSSuresh Siddha */ 117ce4e240cSSuresh Siddha static inline void x2apic_wrmsr_fence(void) 118ce4e240cSSuresh Siddha { 119ce4e240cSSuresh Siddha asm volatile("mfence" : : : "memory"); 120ce4e240cSSuresh Siddha } 121ce4e240cSSuresh Siddha 122bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 123bb898558SAl Viro { 124bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 125bb898558SAl Viro reg == APIC_LVR) 126bb898558SAl Viro return; 127bb898558SAl Viro 128bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 129bb898558SAl Viro } 130bb898558SAl Viro 1310ab711aeSMichael S. Tsirkin static inline void native_apic_msr_eoi_write(u32 reg, u32 v) 1320ab711aeSMichael S. Tsirkin { 1330ab711aeSMichael S. Tsirkin wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0); 1340ab711aeSMichael S. Tsirkin } 1350ab711aeSMichael S. Tsirkin 136bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 137bb898558SAl Viro { 1380059b243SAndi Kleen u64 msr; 139bb898558SAl Viro 140bb898558SAl Viro if (reg == APIC_DFR) 141bb898558SAl Viro return -1; 142bb898558SAl Viro 1430059b243SAndi Kleen rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); 1440059b243SAndi Kleen return (u32)msr; 145bb898558SAl Viro } 146bb898558SAl Viro 147c1eeb2deSYinghai Lu static inline void native_x2apic_wait_icr_idle(void) 148c1eeb2deSYinghai Lu { 149c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 150c1eeb2deSYinghai Lu return; 151c1eeb2deSYinghai Lu } 152c1eeb2deSYinghai Lu 153c1eeb2deSYinghai Lu static inline u32 native_safe_x2apic_wait_icr_idle(void) 154c1eeb2deSYinghai Lu { 155c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 156c1eeb2deSYinghai Lu return 0; 157c1eeb2deSYinghai Lu } 158c1eeb2deSYinghai Lu 159c1eeb2deSYinghai Lu static inline void native_x2apic_icr_write(u32 low, u32 id) 160c1eeb2deSYinghai Lu { 161c1eeb2deSYinghai Lu wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); 162c1eeb2deSYinghai Lu } 163c1eeb2deSYinghai Lu 164c1eeb2deSYinghai Lu static inline u64 native_x2apic_icr_read(void) 165c1eeb2deSYinghai Lu { 166c1eeb2deSYinghai Lu unsigned long val; 167c1eeb2deSYinghai Lu 168c1eeb2deSYinghai Lu rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); 169c1eeb2deSYinghai Lu return val; 170c1eeb2deSYinghai Lu } 171c1eeb2deSYinghai Lu 172fc1edaf9SSuresh Siddha extern int x2apic_phys; 173fb209bd8SYinghai Lu extern int x2apic_preenabled; 174bb898558SAl Viro extern void check_x2apic(void); 175bb898558SAl Viro extern void enable_x2apic(void); 176bb898558SAl Viro static inline int x2apic_enabled(void) 177bb898558SAl Viro { 1780059b243SAndi Kleen u64 msr; 179bb898558SAl Viro 180bb898558SAl Viro if (!cpu_has_x2apic) 181bb898558SAl Viro return 0; 182bb898558SAl Viro 1830059b243SAndi Kleen rdmsrl(MSR_IA32_APICBASE, msr); 184bb898558SAl Viro if (msr & X2APIC_ENABLE) 185bb898558SAl Viro return 1; 186bb898558SAl Viro return 0; 187bb898558SAl Viro } 188fc1edaf9SSuresh Siddha 189fc1edaf9SSuresh Siddha #define x2apic_supported() (cpu_has_x2apic) 190ce69a784SGleb Natapov static inline void x2apic_force_phys(void) 191ce69a784SGleb Natapov { 192ce69a784SGleb Natapov x2apic_phys = 1; 193ce69a784SGleb Natapov } 194bb898558SAl Viro #else 195fb209bd8SYinghai Lu static inline void disable_x2apic(void) 196fb209bd8SYinghai Lu { 197fb209bd8SYinghai Lu } 19806cd9a7dSYinghai Lu static inline void check_x2apic(void) 19906cd9a7dSYinghai Lu { 20006cd9a7dSYinghai Lu } 20106cd9a7dSYinghai Lu static inline void enable_x2apic(void) 20206cd9a7dSYinghai Lu { 20306cd9a7dSYinghai Lu } 20406cd9a7dSYinghai Lu static inline int x2apic_enabled(void) 20506cd9a7dSYinghai Lu { 20606cd9a7dSYinghai Lu return 0; 20706cd9a7dSYinghai Lu } 208ce69a784SGleb Natapov static inline void x2apic_force_phys(void) 209ce69a784SGleb Natapov { 210ce69a784SGleb Natapov } 211cf6567feSSuresh Siddha 21293758238SWeidong Han #define x2apic_preenabled 0 213fc1edaf9SSuresh Siddha #define x2apic_supported() 0 214bb898558SAl Viro #endif 215bb898558SAl Viro 21693758238SWeidong Han extern void enable_IR_x2apic(void); 21793758238SWeidong Han 218bb898558SAl Viro extern int get_physical_broadcast(void); 219bb898558SAl Viro 220bb898558SAl Viro extern int lapic_get_maxlvt(void); 221bb898558SAl Viro extern void clear_local_APIC(void); 222bb898558SAl Viro extern void connect_bsp_APIC(void); 223bb898558SAl Viro extern void disconnect_bsp_APIC(int virt_wire_setup); 224bb898558SAl Viro extern void disable_local_APIC(void); 225bb898558SAl Viro extern void lapic_shutdown(void); 226bb898558SAl Viro extern int verify_local_APIC(void); 227bb898558SAl Viro extern void sync_Arb_IDs(void); 228bb898558SAl Viro extern void init_bsp_APIC(void); 229bb898558SAl Viro extern void setup_local_APIC(void); 230bb898558SAl Viro extern void end_local_APIC_setup(void); 2312fb270f3SJan Beulich extern void bsp_end_local_APIC_setup(void); 232bb898558SAl Viro extern void init_apic_mappings(void); 233c0104d38SYinghai Lu void register_lapic_address(unsigned long address); 234bb898558SAl Viro extern void setup_boot_APIC_clock(void); 235bb898558SAl Viro extern void setup_secondary_APIC_clock(void); 236bb898558SAl Viro extern int APIC_init_uniprocessor(void); 237a906fdaaSThomas Gleixner extern int apic_force_enable(unsigned long addr); 238bb898558SAl Viro 239bb898558SAl Viro /* 240bb898558SAl Viro * On 32bit this is mach-xxx local 241bb898558SAl Viro */ 242bb898558SAl Viro #ifdef CONFIG_X86_64 243bb898558SAl Viro extern int apic_is_clustered_box(void); 244bb898558SAl Viro #else 245bb898558SAl Viro static inline int apic_is_clustered_box(void) 246bb898558SAl Viro { 247bb898558SAl Viro return 0; 248bb898558SAl Viro } 249bb898558SAl Viro #endif 250bb898558SAl Viro 25127afdf20SRobert Richter extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask); 252bb898558SAl Viro 253bb898558SAl Viro #else /* !CONFIG_X86_LOCAL_APIC */ 254bb898558SAl Viro static inline void lapic_shutdown(void) { } 255bb898558SAl Viro #define local_apic_timer_c2_ok 1 256bb898558SAl Viro static inline void init_apic_mappings(void) { } 257d3ec5caeSIvan Vecera static inline void disable_local_APIC(void) { } 258736decacSThomas Gleixner # define setup_boot_APIC_clock x86_init_noop 259736decacSThomas Gleixner # define setup_secondary_APIC_clock x86_init_noop 260bb898558SAl Viro #endif /* !CONFIG_X86_LOCAL_APIC */ 261bb898558SAl Viro 2621f75ed0cSIngo Molnar #ifdef CONFIG_X86_64 2631f75ed0cSIngo Molnar #define SET_APIC_ID(x) (apic->set_apic_id(x)) 2641f75ed0cSIngo Molnar #else 2651f75ed0cSIngo Molnar 2661f75ed0cSIngo Molnar #endif 2671f75ed0cSIngo Molnar 268e2780a68SIngo Molnar /* 269e2780a68SIngo Molnar * Copyright 2004 James Cleverdon, IBM. 270e2780a68SIngo Molnar * Subject to the GNU Public License, v.2 271e2780a68SIngo Molnar * 272e2780a68SIngo Molnar * Generic APIC sub-arch data struct. 273e2780a68SIngo Molnar * 274e2780a68SIngo Molnar * Hacked for x86-64 by James Cleverdon from i386 architecture code by 275e2780a68SIngo Molnar * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and 276e2780a68SIngo Molnar * James Cleverdon. 277e2780a68SIngo Molnar */ 278be163a15SIngo Molnar struct apic { 279e2780a68SIngo Molnar char *name; 280e2780a68SIngo Molnar 281e2780a68SIngo Molnar int (*probe)(void); 282e2780a68SIngo Molnar int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); 283fa63030eSDaniel J Blueman int (*apic_id_valid)(int apicid); 284e2780a68SIngo Molnar int (*apic_id_registered)(void); 285e2780a68SIngo Molnar 286e2780a68SIngo Molnar u32 irq_delivery_mode; 287e2780a68SIngo Molnar u32 irq_dest_mode; 288e2780a68SIngo Molnar 289e2780a68SIngo Molnar const struct cpumask *(*target_cpus)(void); 290e2780a68SIngo Molnar 291e2780a68SIngo Molnar int disable_esr; 292e2780a68SIngo Molnar 293e2780a68SIngo Molnar int dest_logical; 2947abc0753SCyrill Gorcunov unsigned long (*check_apicid_used)(physid_mask_t *map, int apicid); 295e2780a68SIngo Molnar unsigned long (*check_apicid_present)(int apicid); 296e2780a68SIngo Molnar 2971ac322d0SSuresh Siddha void (*vector_allocation_domain)(int cpu, struct cpumask *retmask, 2981ac322d0SSuresh Siddha const struct cpumask *mask); 299e2780a68SIngo Molnar void (*init_apic_ldr)(void); 300e2780a68SIngo Molnar 3017abc0753SCyrill Gorcunov void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); 302e2780a68SIngo Molnar 303e2780a68SIngo Molnar void (*setup_apic_routing)(void); 304e2780a68SIngo Molnar int (*multi_timer_check)(int apic, int irq); 305e2780a68SIngo Molnar int (*cpu_present_to_apicid)(int mps_cpu); 3067abc0753SCyrill Gorcunov void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap); 307e2780a68SIngo Molnar void (*setup_portio_remap)(void); 308e11dadabSThomas Gleixner int (*check_phys_apicid_present)(int phys_apicid); 309e2780a68SIngo Molnar void (*enable_apic_mode)(void); 310e2780a68SIngo Molnar int (*phys_pkg_id)(int cpuid_apic, int index_msb); 311e2780a68SIngo Molnar 312e2780a68SIngo Molnar /* 313be163a15SIngo Molnar * When one of the next two hooks returns 1 the apic 314e2780a68SIngo Molnar * is switched to this. Essentially they are additional 315e2780a68SIngo Molnar * probe functions: 316e2780a68SIngo Molnar */ 317e2780a68SIngo Molnar int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid); 318e2780a68SIngo Molnar 319e2780a68SIngo Molnar unsigned int (*get_apic_id)(unsigned long x); 320e2780a68SIngo Molnar unsigned long (*set_apic_id)(unsigned int id); 321e2780a68SIngo Molnar unsigned long apic_id_mask; 322e2780a68SIngo Molnar 323ff164324SAlexander Gordeev int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask, 324ff164324SAlexander Gordeev const struct cpumask *andmask, 325ff164324SAlexander Gordeev unsigned int *apicid); 326e2780a68SIngo Molnar 327e2780a68SIngo Molnar /* ipi */ 328e2780a68SIngo Molnar void (*send_IPI_mask)(const struct cpumask *mask, int vector); 329e2780a68SIngo Molnar void (*send_IPI_mask_allbutself)(const struct cpumask *mask, 330e2780a68SIngo Molnar int vector); 331e2780a68SIngo Molnar void (*send_IPI_allbutself)(int vector); 332e2780a68SIngo Molnar void (*send_IPI_all)(int vector); 333e2780a68SIngo Molnar void (*send_IPI_self)(int vector); 334e2780a68SIngo Molnar 335e2780a68SIngo Molnar /* wakeup_secondary_cpu */ 3361f5bcabfSIngo Molnar int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); 337e2780a68SIngo Molnar 338465822cfSDavid Rientjes bool wait_for_init_deassert; 339e2780a68SIngo Molnar void (*smp_callin_clear_local_apic)(void); 340e2780a68SIngo Molnar void (*inquire_remote_apic)(int apicid); 341e2780a68SIngo Molnar 342e2780a68SIngo Molnar /* apic ops */ 343e2780a68SIngo Molnar u32 (*read)(u32 reg); 344e2780a68SIngo Molnar void (*write)(u32 reg, u32 v); 3452a43195dSMichael S. Tsirkin /* 3462a43195dSMichael S. Tsirkin * ->eoi_write() has the same signature as ->write(). 3472a43195dSMichael S. Tsirkin * 3482a43195dSMichael S. Tsirkin * Drivers can support both ->eoi_write() and ->write() by passing the same 3492a43195dSMichael S. Tsirkin * callback value. Kernel can override ->eoi_write() and fall back 3502a43195dSMichael S. Tsirkin * on write for EOI. 3512a43195dSMichael S. Tsirkin */ 3522a43195dSMichael S. Tsirkin void (*eoi_write)(u32 reg, u32 v); 353e2780a68SIngo Molnar u64 (*icr_read)(void); 354e2780a68SIngo Molnar void (*icr_write)(u32 low, u32 high); 355e2780a68SIngo Molnar void (*wait_icr_idle)(void); 356e2780a68SIngo Molnar u32 (*safe_wait_icr_idle)(void); 357acb8bc09STejun Heo 358acb8bc09STejun Heo #ifdef CONFIG_X86_32 359acb8bc09STejun Heo /* 360acb8bc09STejun Heo * Called very early during boot from get_smp_config(). It should 361acb8bc09STejun Heo * return the logical apicid. x86_[bios]_cpu_to_apicid is 362acb8bc09STejun Heo * initialized before this function is called. 363acb8bc09STejun Heo * 364acb8bc09STejun Heo * If logical apicid can't be determined that early, the function 365acb8bc09STejun Heo * may return BAD_APICID. Logical apicid will be configured after 366acb8bc09STejun Heo * init_apic_ldr() while bringing up CPUs. Note that NUMA affinity 367acb8bc09STejun Heo * won't be applied properly during early boot in this case. 368acb8bc09STejun Heo */ 369acb8bc09STejun Heo int (*x86_32_early_logical_apicid)(int cpu); 370acb8bc09STejun Heo #endif 371e2780a68SIngo Molnar }; 372e2780a68SIngo Molnar 3730917c01fSIngo Molnar /* 3740917c01fSIngo Molnar * Pointer to the local APIC driver in use on this system (there's 3750917c01fSIngo Molnar * always just one such driver in use - the kernel decides via an 3760917c01fSIngo Molnar * early probing process which one it picks - and then sticks to it): 3770917c01fSIngo Molnar */ 378be163a15SIngo Molnar extern struct apic *apic; 3790917c01fSIngo Molnar 3800917c01fSIngo Molnar /* 381107e0e0cSSuresh Siddha * APIC drivers are probed based on how they are listed in the .apicdrivers 382107e0e0cSSuresh Siddha * section. So the order is important and enforced by the ordering 383107e0e0cSSuresh Siddha * of different apic driver files in the Makefile. 384107e0e0cSSuresh Siddha * 385107e0e0cSSuresh Siddha * For the files having two apic drivers, we use apic_drivers() 386107e0e0cSSuresh Siddha * to enforce the order with in them. 387107e0e0cSSuresh Siddha */ 388107e0e0cSSuresh Siddha #define apic_driver(sym) \ 38975fdd155SAndi Kleen static const struct apic *__apicdrivers_##sym __used \ 390107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 391107e0e0cSSuresh Siddha __section(.apicdrivers) = { &sym } 392107e0e0cSSuresh Siddha 393107e0e0cSSuresh Siddha #define apic_drivers(sym1, sym2) \ 394107e0e0cSSuresh Siddha static struct apic *__apicdrivers_##sym1##sym2[2] __used \ 395107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 396107e0e0cSSuresh Siddha __section(.apicdrivers) = { &sym1, &sym2 } 397107e0e0cSSuresh Siddha 398107e0e0cSSuresh Siddha extern struct apic *__apicdrivers[], *__apicdrivers_end[]; 399107e0e0cSSuresh Siddha 400107e0e0cSSuresh Siddha /* 4010917c01fSIngo Molnar * APIC functionality to boot other CPUs - only used on SMP: 4020917c01fSIngo Molnar */ 4030917c01fSIngo Molnar #ifdef CONFIG_SMP 4042b6163bfSYinghai Lu extern atomic_t init_deasserted; 4052b6163bfSYinghai Lu extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip); 4060917c01fSIngo Molnar #endif 407e2780a68SIngo Molnar 408d674cd19SCyrill Gorcunov #ifdef CONFIG_X86_LOCAL_APIC 409346b46beSFernando Luis Vázquez Cao 410e2780a68SIngo Molnar static inline u32 apic_read(u32 reg) 411e2780a68SIngo Molnar { 412e2780a68SIngo Molnar return apic->read(reg); 413e2780a68SIngo Molnar } 414e2780a68SIngo Molnar 415e2780a68SIngo Molnar static inline void apic_write(u32 reg, u32 val) 416e2780a68SIngo Molnar { 417e2780a68SIngo Molnar apic->write(reg, val); 418e2780a68SIngo Molnar } 419e2780a68SIngo Molnar 4202a43195dSMichael S. Tsirkin static inline void apic_eoi(void) 4212a43195dSMichael S. Tsirkin { 4222a43195dSMichael S. Tsirkin apic->eoi_write(APIC_EOI, APIC_EOI_ACK); 4232a43195dSMichael S. Tsirkin } 4242a43195dSMichael S. Tsirkin 425e2780a68SIngo Molnar static inline u64 apic_icr_read(void) 426e2780a68SIngo Molnar { 427e2780a68SIngo Molnar return apic->icr_read(); 428e2780a68SIngo Molnar } 429e2780a68SIngo Molnar 430e2780a68SIngo Molnar static inline void apic_icr_write(u32 low, u32 high) 431e2780a68SIngo Molnar { 432e2780a68SIngo Molnar apic->icr_write(low, high); 433e2780a68SIngo Molnar } 434e2780a68SIngo Molnar 435e2780a68SIngo Molnar static inline void apic_wait_icr_idle(void) 436e2780a68SIngo Molnar { 437e2780a68SIngo Molnar apic->wait_icr_idle(); 438e2780a68SIngo Molnar } 439e2780a68SIngo Molnar 440e2780a68SIngo Molnar static inline u32 safe_apic_wait_icr_idle(void) 441e2780a68SIngo Molnar { 442e2780a68SIngo Molnar return apic->safe_wait_icr_idle(); 443e2780a68SIngo Molnar } 444e2780a68SIngo Molnar 4451551df64SMichael S. Tsirkin extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); 4461551df64SMichael S. Tsirkin 447d674cd19SCyrill Gorcunov #else /* CONFIG_X86_LOCAL_APIC */ 448d674cd19SCyrill Gorcunov 449d674cd19SCyrill Gorcunov static inline u32 apic_read(u32 reg) { return 0; } 450d674cd19SCyrill Gorcunov static inline void apic_write(u32 reg, u32 val) { } 4512a43195dSMichael S. Tsirkin static inline void apic_eoi(void) { } 452d674cd19SCyrill Gorcunov static inline u64 apic_icr_read(void) { return 0; } 453d674cd19SCyrill Gorcunov static inline void apic_icr_write(u32 low, u32 high) { } 454d674cd19SCyrill Gorcunov static inline void apic_wait_icr_idle(void) { } 455d674cd19SCyrill Gorcunov static inline u32 safe_apic_wait_icr_idle(void) { return 0; } 4561551df64SMichael S. Tsirkin static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {} 457d674cd19SCyrill Gorcunov 458d674cd19SCyrill Gorcunov #endif /* CONFIG_X86_LOCAL_APIC */ 459e2780a68SIngo Molnar 460e2780a68SIngo Molnar static inline void ack_APIC_irq(void) 461e2780a68SIngo Molnar { 462e2780a68SIngo Molnar /* 463e2780a68SIngo Molnar * ack_APIC_irq() actually gets compiled as a single instruction 464e2780a68SIngo Molnar * ... yummie. 465e2780a68SIngo Molnar */ 4662a43195dSMichael S. Tsirkin apic_eoi(); 467e2780a68SIngo Molnar } 468e2780a68SIngo Molnar 469e2780a68SIngo Molnar static inline unsigned default_get_apic_id(unsigned long x) 470e2780a68SIngo Molnar { 471e2780a68SIngo Molnar unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 472e2780a68SIngo Molnar 47342937e81SAndreas Herrmann if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID)) 474e2780a68SIngo Molnar return (x >> 24) & 0xFF; 475e2780a68SIngo Molnar else 476e2780a68SIngo Molnar return (x >> 24) & 0x0F; 477e2780a68SIngo Molnar } 478e2780a68SIngo Molnar 479e2780a68SIngo Molnar /* 4806ab1b27cSDavid Rientjes * Warm reset vector position: 481e2780a68SIngo Molnar */ 4826ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_LOW 0x467 4836ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_HIGH 0x469 484e2780a68SIngo Molnar 4852b6163bfSYinghai Lu #ifdef CONFIG_X86_64 486e2780a68SIngo Molnar extern void apic_send_IPI_self(int vector); 487e2780a68SIngo Molnar 488e2780a68SIngo Molnar DECLARE_PER_CPU(int, x2apic_extra_bits); 489e2780a68SIngo Molnar 490e2780a68SIngo Molnar extern int default_cpu_present_to_apicid(int mps_cpu); 491e11dadabSThomas Gleixner extern int default_check_phys_apicid_present(int phys_apicid); 492e2780a68SIngo Molnar #endif 493e2780a68SIngo Molnar 494838312beSJan Beulich extern void generic_bigsmp_probe(void); 495e2780a68SIngo Molnar 496e2780a68SIngo Molnar 497e2780a68SIngo Molnar #ifdef CONFIG_X86_LOCAL_APIC 498e2780a68SIngo Molnar 499e2780a68SIngo Molnar #include <asm/smp.h> 500e2780a68SIngo Molnar 501e2780a68SIngo Molnar #define APIC_DFR_VALUE (APIC_DFR_FLAT) 502e2780a68SIngo Molnar 503e2780a68SIngo Molnar static inline const struct cpumask *default_target_cpus(void) 504e2780a68SIngo Molnar { 505e2780a68SIngo Molnar #ifdef CONFIG_SMP 506e2780a68SIngo Molnar return cpu_online_mask; 507e2780a68SIngo Molnar #else 508e2780a68SIngo Molnar return cpumask_of(0); 509e2780a68SIngo Molnar #endif 510e2780a68SIngo Molnar } 511e2780a68SIngo Molnar 512bf721d3aSAlexander Gordeev static inline const struct cpumask *online_target_cpus(void) 513bf721d3aSAlexander Gordeev { 514bf721d3aSAlexander Gordeev return cpu_online_mask; 515bf721d3aSAlexander Gordeev } 516bf721d3aSAlexander Gordeev 5170816b0f0SVlad Zolotarov DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid); 518e2780a68SIngo Molnar 519e2780a68SIngo Molnar 520e2780a68SIngo Molnar static inline unsigned int read_apic_id(void) 521e2780a68SIngo Molnar { 522e2780a68SIngo Molnar unsigned int reg; 523e2780a68SIngo Molnar 524e2780a68SIngo Molnar reg = apic_read(APIC_ID); 525e2780a68SIngo Molnar 526e2780a68SIngo Molnar return apic->get_apic_id(reg); 527e2780a68SIngo Molnar } 528e2780a68SIngo Molnar 529fa63030eSDaniel J Blueman static inline int default_apic_id_valid(int apicid) 530fa63030eSDaniel J Blueman { 531b7157acfSSteffen Persvold return (apicid < 255); 532fa63030eSDaniel J Blueman } 533fa63030eSDaniel J Blueman 534a491cc90SJiang Liu extern int default_acpi_madt_oem_check(char *, char *); 535a491cc90SJiang Liu 536e2780a68SIngo Molnar extern void default_setup_apic_routing(void); 537e2780a68SIngo Molnar 5389844ab11SCyrill Gorcunov extern struct apic apic_noop; 5399844ab11SCyrill Gorcunov 540e2780a68SIngo Molnar #ifdef CONFIG_X86_32 5412c1b284eSJaswinder Singh Rajput 542acb8bc09STejun Heo static inline int noop_x86_32_early_logical_apicid(int cpu) 543acb8bc09STejun Heo { 544acb8bc09STejun Heo return BAD_APICID; 545acb8bc09STejun Heo } 546acb8bc09STejun Heo 547e2780a68SIngo Molnar /* 548e2780a68SIngo Molnar * Set up the logical destination ID. 549e2780a68SIngo Molnar * 550e2780a68SIngo Molnar * Intel recommends to set DFR, LDR and TPR before enabling 551e2780a68SIngo Molnar * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel 552e2780a68SIngo Molnar * document number 292116). So here it goes... 553e2780a68SIngo Molnar */ 554e2780a68SIngo Molnar extern void default_init_apic_ldr(void); 555e2780a68SIngo Molnar 556e2780a68SIngo Molnar static inline int default_apic_id_registered(void) 557e2780a68SIngo Molnar { 558e2780a68SIngo Molnar return physid_isset(read_apic_id(), phys_cpu_present_map); 559e2780a68SIngo Molnar } 560e2780a68SIngo Molnar 561f56e5034SYinghai Lu static inline int default_phys_pkg_id(int cpuid_apic, int index_msb) 562f56e5034SYinghai Lu { 563f56e5034SYinghai Lu return cpuid_apic >> index_msb; 564f56e5034SYinghai Lu } 565f56e5034SYinghai Lu 566f56e5034SYinghai Lu #endif 567f56e5034SYinghai Lu 568ff164324SAlexander Gordeev static inline int 569a5a39156SAlexander Gordeev flat_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 570a5a39156SAlexander Gordeev const struct cpumask *andmask, 571a5a39156SAlexander Gordeev unsigned int *apicid) 572e2780a68SIngo Molnar { 573a5a39156SAlexander Gordeev unsigned long cpu_mask = cpumask_bits(cpumask)[0] & 574a5a39156SAlexander Gordeev cpumask_bits(andmask)[0] & 575a5a39156SAlexander Gordeev cpumask_bits(cpu_online_mask)[0] & 576a5a39156SAlexander Gordeev APIC_ALL_CPUS; 577a5a39156SAlexander Gordeev 578ff164324SAlexander Gordeev if (likely(cpu_mask)) { 579ff164324SAlexander Gordeev *apicid = (unsigned int)cpu_mask; 580ff164324SAlexander Gordeev return 0; 581ff164324SAlexander Gordeev } else { 582ff164324SAlexander Gordeev return -EINVAL; 583ff164324SAlexander Gordeev } 584e2780a68SIngo Molnar } 585e2780a68SIngo Molnar 586ff164324SAlexander Gordeev extern int 5876398268dSAlexander Gordeev default_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 588ff164324SAlexander Gordeev const struct cpumask *andmask, 589ff164324SAlexander Gordeev unsigned int *apicid); 5906398268dSAlexander Gordeev 591b39f25a8SSuresh Siddha static inline void 5921ac322d0SSuresh Siddha flat_vector_allocation_domain(int cpu, struct cpumask *retmask, 5931ac322d0SSuresh Siddha const struct cpumask *mask) 5949d8e1066SAlexander Gordeev { 5959d8e1066SAlexander Gordeev /* Careful. Some cpus do not strictly honor the set of cpus 5969d8e1066SAlexander Gordeev * specified in the interrupt destination when using lowest 5979d8e1066SAlexander Gordeev * priority interrupt delivery mode. 5989d8e1066SAlexander Gordeev * 5999d8e1066SAlexander Gordeev * In particular there was a hyperthreading cpu observed to 6009d8e1066SAlexander Gordeev * deliver interrupts to the wrong hyperthread when only one 6019d8e1066SAlexander Gordeev * hyperthread was specified in the interrupt desitination. 6029d8e1066SAlexander Gordeev */ 6039d8e1066SAlexander Gordeev cpumask_clear(retmask); 6049d8e1066SAlexander Gordeev cpumask_bits(retmask)[0] = APIC_ALL_CPUS; 6059d8e1066SAlexander Gordeev } 6069d8e1066SAlexander Gordeev 607b39f25a8SSuresh Siddha static inline void 6081ac322d0SSuresh Siddha default_vector_allocation_domain(int cpu, struct cpumask *retmask, 6091ac322d0SSuresh Siddha const struct cpumask *mask) 6109d8e1066SAlexander Gordeev { 6119d8e1066SAlexander Gordeev cpumask_copy(retmask, cpumask_of(cpu)); 6129d8e1066SAlexander Gordeev } 6139d8e1066SAlexander Gordeev 6147abc0753SCyrill Gorcunov static inline unsigned long default_check_apicid_used(physid_mask_t *map, int apicid) 615e2780a68SIngo Molnar { 6167abc0753SCyrill Gorcunov return physid_isset(apicid, *map); 617e2780a68SIngo Molnar } 618e2780a68SIngo Molnar 619e2780a68SIngo Molnar static inline unsigned long default_check_apicid_present(int bit) 620e2780a68SIngo Molnar { 621e2780a68SIngo Molnar return physid_isset(bit, phys_cpu_present_map); 622e2780a68SIngo Molnar } 623e2780a68SIngo Molnar 6247abc0753SCyrill Gorcunov static inline void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap) 625e2780a68SIngo Molnar { 6267abc0753SCyrill Gorcunov *retmap = *phys_map; 627e2780a68SIngo Molnar } 628e2780a68SIngo Molnar 629e2780a68SIngo Molnar static inline int __default_cpu_present_to_apicid(int mps_cpu) 630e2780a68SIngo Molnar { 631e2780a68SIngo Molnar if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu)) 632e2780a68SIngo Molnar return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); 633e2780a68SIngo Molnar else 634e2780a68SIngo Molnar return BAD_APICID; 635e2780a68SIngo Molnar } 636e2780a68SIngo Molnar 637e2780a68SIngo Molnar static inline int 638e11dadabSThomas Gleixner __default_check_phys_apicid_present(int phys_apicid) 639e2780a68SIngo Molnar { 640e11dadabSThomas Gleixner return physid_isset(phys_apicid, phys_cpu_present_map); 641e2780a68SIngo Molnar } 642e2780a68SIngo Molnar 643e2780a68SIngo Molnar #ifdef CONFIG_X86_32 644e2780a68SIngo Molnar static inline int default_cpu_present_to_apicid(int mps_cpu) 645e2780a68SIngo Molnar { 646e2780a68SIngo Molnar return __default_cpu_present_to_apicid(mps_cpu); 647e2780a68SIngo Molnar } 648e2780a68SIngo Molnar 649e2780a68SIngo Molnar static inline int 650e11dadabSThomas Gleixner default_check_phys_apicid_present(int phys_apicid) 651e2780a68SIngo Molnar { 652e11dadabSThomas Gleixner return __default_check_phys_apicid_present(phys_apicid); 653e2780a68SIngo Molnar } 654e2780a68SIngo Molnar #else 655e2780a68SIngo Molnar extern int default_cpu_present_to_apicid(int mps_cpu); 656e11dadabSThomas Gleixner extern int default_check_phys_apicid_present(int phys_apicid); 657e2780a68SIngo Molnar #endif 658e2780a68SIngo Molnar 659e2780a68SIngo Molnar #endif /* CONFIG_X86_LOCAL_APIC */ 660eddc0e92SSeiji Aguchi extern void irq_enter(void); 661eddc0e92SSeiji Aguchi extern void irq_exit(void); 662eddc0e92SSeiji Aguchi 663eddc0e92SSeiji Aguchi static inline void entering_irq(void) 664eddc0e92SSeiji Aguchi { 665eddc0e92SSeiji Aguchi irq_enter(); 666eddc0e92SSeiji Aguchi exit_idle(); 667eddc0e92SSeiji Aguchi } 668eddc0e92SSeiji Aguchi 669eddc0e92SSeiji Aguchi static inline void entering_ack_irq(void) 670eddc0e92SSeiji Aguchi { 671eddc0e92SSeiji Aguchi ack_APIC_irq(); 672eddc0e92SSeiji Aguchi entering_irq(); 673eddc0e92SSeiji Aguchi } 674eddc0e92SSeiji Aguchi 675eddc0e92SSeiji Aguchi static inline void exiting_irq(void) 676eddc0e92SSeiji Aguchi { 677eddc0e92SSeiji Aguchi irq_exit(); 678eddc0e92SSeiji Aguchi } 679eddc0e92SSeiji Aguchi 680eddc0e92SSeiji Aguchi static inline void exiting_ack_irq(void) 681eddc0e92SSeiji Aguchi { 682eddc0e92SSeiji Aguchi irq_exit(); 683eddc0e92SSeiji Aguchi /* Ack only at the end to avoid potential reentry */ 684eddc0e92SSeiji Aguchi ack_APIC_irq(); 685eddc0e92SSeiji Aguchi } 686e2780a68SIngo Molnar 68717405453SYoshihiro YUNOMAE extern void ioapic_zap_locks(void); 68817405453SYoshihiro YUNOMAE 6891965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 690