17e300dabSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 21965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 31965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 4bb898558SAl Viro 5e2780a68SIngo Molnar #include <linux/cpumask.h> 6*3b7c27e6SThomas Gleixner #include <linux/static_call.h> 7bb898558SAl Viro 8bb898558SAl Viro #include <asm/alternative.h> 9bb898558SAl Viro #include <asm/cpufeature.h> 10e2780a68SIngo Molnar #include <asm/apicdef.h> 1160063497SArun Sharma #include <linux/atomic.h> 12e2780a68SIngo Molnar #include <asm/fixmap.h> 13e2780a68SIngo Molnar #include <asm/mpspec.h> 14bb898558SAl Viro #include <asm/msr.h> 15ffcba43fSNicolai Stange #include <asm/hardirq.h> 16bb898558SAl Viro 17bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 18bb898558SAl Viro 19bb898558SAl Viro /* 20bb898558SAl Viro * Debugging macros 21bb898558SAl Viro */ 22bb898558SAl Viro #define APIC_QUIET 0 23bb898558SAl Viro #define APIC_VERBOSE 1 24bb898558SAl Viro #define APIC_DEBUG 2 25bb898558SAl Viro 26b7c4948eSHidehiro Kawai /* Macros for apic_extnmi which controls external NMI masking */ 27b7c4948eSHidehiro Kawai #define APIC_EXTNMI_BSP 0 /* Default */ 28b7c4948eSHidehiro Kawai #define APIC_EXTNMI_ALL 1 29b7c4948eSHidehiro Kawai #define APIC_EXTNMI_NONE 2 30b7c4948eSHidehiro Kawai 31bb898558SAl Viro /* 32bb898558SAl Viro * Define the default level of output to be very little 33bb898558SAl Viro * This can be turned up by using apic=verbose for more 34bb898558SAl Viro * information and apic=debug for _lots_ of information. 35bb898558SAl Viro * apic_verbosity is defined in apic.c 36bb898558SAl Viro */ 37bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 38bb898558SAl Viro if ((v) <= apic_verbosity) \ 39bb898558SAl Viro printk(s, ##a); \ 40bb898558SAl Viro } while (0) 41bb898558SAl Viro 42bb898558SAl Viro 43160d8dacSIngo Molnar #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 449d87f5b6SThomas Gleixner extern void x86_32_probe_apic(void); 45160d8dacSIngo Molnar #else 469d87f5b6SThomas Gleixner static inline void x86_32_probe_apic(void) { } 47160d8dacSIngo Molnar #endif 48bb898558SAl Viro 49bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 50bb898558SAl Viro 51ec633558SQian Cai extern int apic_verbosity; 52bb898558SAl Viro extern int local_apic_timer_c2_ok; 53bb898558SAl Viro 5449062454SThomas Gleixner extern bool apic_is_disabled; 5552ae346bSDaniel Drake extern unsigned int lapic_timer_period; 560939e4fdSIngo Molnar 577e75178aSDavid Woodhouse extern int cpuid_to_apicid[]; 587e75178aSDavid Woodhouse 594f45ed9fSDou Liyang extern enum apic_intr_mode_id apic_intr_mode; 604f45ed9fSDou Liyang enum apic_intr_mode_id { 614f45ed9fSDou Liyang APIC_PIC, 624f45ed9fSDou Liyang APIC_VIRTUAL_WIRE, 634f45ed9fSDou Liyang APIC_VIRTUAL_WIRE_NO_CONFIG, 644f45ed9fSDou Liyang APIC_SYMMETRIC_IO, 654f45ed9fSDou Liyang APIC_SYMMETRIC_IO_NO_ROUTING 664f45ed9fSDou Liyang }; 674f45ed9fSDou Liyang 68bb898558SAl Viro /* 698312136fSCyrill Gorcunov * With 82489DX we can't rely on apic feature bit 708312136fSCyrill Gorcunov * retrieved via cpuid but still have to deal with 718312136fSCyrill Gorcunov * such an apic chip so we assume that SMP configuration 728312136fSCyrill Gorcunov * is found from MP table (64bit case uses ACPI mostly 738312136fSCyrill Gorcunov * which set smp presence flag as well so we are safe 748312136fSCyrill Gorcunov * to use this helper too). 758312136fSCyrill Gorcunov */ 768312136fSCyrill Gorcunov static inline bool apic_from_smp_config(void) 778312136fSCyrill Gorcunov { 7849062454SThomas Gleixner return smp_found_config && !apic_is_disabled; 798312136fSCyrill Gorcunov } 808312136fSCyrill Gorcunov 818312136fSCyrill Gorcunov /* 82bb898558SAl Viro * Basic functions accessing APICs. 83bb898558SAl Viro */ 84bb898558SAl Viro #ifdef CONFIG_PARAVIRT 85bb898558SAl Viro #include <asm/paravirt.h> 86bb898558SAl Viro #endif 87bb898558SAl Viro 88bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 89bb898558SAl Viro { 90bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 91bb898558SAl Viro 92a930dc45SBorislav Petkov alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP, 93bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 94bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 95bb898558SAl Viro } 96bb898558SAl Viro 97bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 98bb898558SAl Viro { 99bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 100bb898558SAl Viro } 101bb898558SAl Viro 102185c8f33SThomas Gleixner static inline void native_apic_mem_eoi(void) 103185c8f33SThomas Gleixner { 104185c8f33SThomas Gleixner native_apic_mem_write(APIC_EOI, APIC_EOI_ACK); 105185c8f33SThomas Gleixner } 106185c8f33SThomas Gleixner 107c1eeb2deSYinghai Lu extern void native_apic_icr_write(u32 low, u32 id); 108c1eeb2deSYinghai Lu extern u64 native_apic_icr_read(void); 109c1eeb2deSYinghai Lu 1108d806960SThomas Gleixner static inline bool apic_is_x2apic_enabled(void) 1118d806960SThomas Gleixner { 1128d806960SThomas Gleixner u64 msr; 1138d806960SThomas Gleixner 1148d806960SThomas Gleixner if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) 1158d806960SThomas Gleixner return false; 1168d806960SThomas Gleixner return msr & X2APIC_ENABLE; 1178d806960SThomas Gleixner } 1188d806960SThomas Gleixner 119e02ae387SPaolo Bonzini extern void enable_IR_x2apic(void); 120e02ae387SPaolo Bonzini 121e02ae387SPaolo Bonzini extern int get_physical_broadcast(void); 122e02ae387SPaolo Bonzini 123e02ae387SPaolo Bonzini extern int lapic_get_maxlvt(void); 124e02ae387SPaolo Bonzini extern void clear_local_APIC(void); 125e02ae387SPaolo Bonzini extern void disconnect_bsp_APIC(int virt_wire_setup); 126e02ae387SPaolo Bonzini extern void disable_local_APIC(void); 12760dcaad5SThomas Gleixner extern void apic_soft_disable(void); 128e02ae387SPaolo Bonzini extern void lapic_shutdown(void); 129e02ae387SPaolo Bonzini extern void sync_Arb_IDs(void); 130fc90ccfdSVille Syrjälä extern void init_bsp_APIC(void); 13197992387SThomas Gleixner extern void apic_intr_mode_select(void); 1324b1669e8SDou Liyang extern void apic_intr_mode_init(void); 133e02ae387SPaolo Bonzini extern void init_apic_mappings(void); 134e02ae387SPaolo Bonzini void register_lapic_address(unsigned long address); 135e02ae387SPaolo Bonzini extern void setup_boot_APIC_clock(void); 136e02ae387SPaolo Bonzini extern void setup_secondary_APIC_clock(void); 1376731b0d6SNicolai Stange extern void lapic_update_tsc_freq(void); 138e02ae387SPaolo Bonzini 139e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 1401751adedSThomas Gleixner static inline bool apic_force_enable(unsigned long addr) 141e02ae387SPaolo Bonzini { 1421751adedSThomas Gleixner return false; 143e02ae387SPaolo Bonzini } 144e02ae387SPaolo Bonzini #else 1451751adedSThomas Gleixner extern bool apic_force_enable(unsigned long addr); 146e02ae387SPaolo Bonzini #endif 147e02ae387SPaolo Bonzini 148e02ae387SPaolo Bonzini extern void apic_ap_setup(void); 149e02ae387SPaolo Bonzini 150e02ae387SPaolo Bonzini /* 151e02ae387SPaolo Bonzini * On 32bit this is mach-xxx local 152e02ae387SPaolo Bonzini */ 153e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 154e02ae387SPaolo Bonzini extern int apic_is_clustered_box(void); 155e02ae387SPaolo Bonzini #else 156e02ae387SPaolo Bonzini static inline int apic_is_clustered_box(void) 157e02ae387SPaolo Bonzini { 158e02ae387SPaolo Bonzini return 0; 159e02ae387SPaolo Bonzini } 160e02ae387SPaolo Bonzini #endif 161e02ae387SPaolo Bonzini 162e02ae387SPaolo Bonzini extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask); 1630fa115daSThomas Gleixner extern void lapic_assign_system_vectors(void); 1640fa115daSThomas Gleixner extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace); 1657d65f9e8SThomas Gleixner extern void lapic_update_legacy_vectors(void); 1660fa115daSThomas Gleixner extern void lapic_online(void); 1670fa115daSThomas Gleixner extern void lapic_offline(void); 168c8c40767SThomas Gleixner extern bool apic_needs_pit(void); 169e02ae387SPaolo Bonzini 17022ca7ee9SThomas Gleixner extern void apic_send_IPI_allbutself(unsigned int vector); 17122ca7ee9SThomas Gleixner 172e02ae387SPaolo Bonzini #else /* !CONFIG_X86_LOCAL_APIC */ 173e02ae387SPaolo Bonzini static inline void lapic_shutdown(void) { } 174e02ae387SPaolo Bonzini #define local_apic_timer_c2_ok 1 175e02ae387SPaolo Bonzini static inline void init_apic_mappings(void) { } 176e02ae387SPaolo Bonzini static inline void disable_local_APIC(void) { } 177e02ae387SPaolo Bonzini # define setup_boot_APIC_clock x86_init_noop 178e02ae387SPaolo Bonzini # define setup_secondary_APIC_clock x86_init_noop 1796731b0d6SNicolai Stange static inline void lapic_update_tsc_freq(void) { } 180ccf5355dSDou Liyang static inline void init_bsp_APIC(void) { } 18197992387SThomas Gleixner static inline void apic_intr_mode_select(void) { } 1824b1669e8SDou Liyang static inline void apic_intr_mode_init(void) { } 1830fa115daSThomas Gleixner static inline void lapic_assign_system_vectors(void) { } 1840fa115daSThomas Gleixner static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { } 185c8c40767SThomas Gleixner static inline bool apic_needs_pit(void) { return true; } 186e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_LOCAL_APIC */ 187e02ae387SPaolo Bonzini 188d0b03bd1SHan, Weidong #ifdef CONFIG_X86_X2APIC 189bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 190bb898558SAl Viro { 191bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 192bb898558SAl Viro reg == APIC_LVR) 193bb898558SAl Viro return; 194bb898558SAl Viro 195bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 196bb898558SAl Viro } 197bb898558SAl Viro 198185c8f33SThomas Gleixner static inline void native_apic_msr_eoi(void) 1990ab711aeSMichael S. Tsirkin { 200a585df8eSBorislav Petkov __wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0); 2010ab711aeSMichael S. Tsirkin } 2020ab711aeSMichael S. Tsirkin 203bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 204bb898558SAl Viro { 2050059b243SAndi Kleen u64 msr; 206bb898558SAl Viro 207bb898558SAl Viro if (reg == APIC_DFR) 208bb898558SAl Viro return -1; 209bb898558SAl Viro 2100059b243SAndi Kleen rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); 2110059b243SAndi Kleen return (u32)msr; 212bb898558SAl Viro } 213bb898558SAl Viro 214c1eeb2deSYinghai Lu static inline void native_x2apic_icr_write(u32 low, u32 id) 215c1eeb2deSYinghai Lu { 216c1eeb2deSYinghai Lu wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); 217c1eeb2deSYinghai Lu } 218c1eeb2deSYinghai Lu 219c1eeb2deSYinghai Lu static inline u64 native_x2apic_icr_read(void) 220c1eeb2deSYinghai Lu { 221c1eeb2deSYinghai Lu unsigned long val; 222c1eeb2deSYinghai Lu 223c1eeb2deSYinghai Lu rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); 224c1eeb2deSYinghai Lu return val; 225c1eeb2deSYinghai Lu } 226c1eeb2deSYinghai Lu 22781a46dd8SThomas Gleixner extern int x2apic_mode; 228fc1edaf9SSuresh Siddha extern int x2apic_phys; 22926573a97SDavid Woodhouse extern void __init x2apic_set_max_apicid(u32 apicid); 230659006bfSThomas Gleixner extern void x2apic_setup(void); 231bb898558SAl Viro static inline int x2apic_enabled(void) 232bb898558SAl Viro { 23362436a4dSBorislav Petkov return boot_cpu_has(X86_FEATURE_X2APIC) && apic_is_x2apic_enabled(); 234bb898558SAl Viro } 235fc1edaf9SSuresh Siddha 23662436a4dSBorislav Petkov #define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC)) 237e02ae387SPaolo Bonzini #else /* !CONFIG_X86_X2APIC */ 238659006bfSThomas Gleixner static inline void x2apic_setup(void) { } 23955eae7deSThomas Gleixner static inline int x2apic_enabled(void) { return 0; } 240d10a9044SThomas Gleixner static inline u32 native_apic_msr_read(u32 reg) { BUG(); } 24181a46dd8SThomas Gleixner #define x2apic_mode (0) 24281a46dd8SThomas Gleixner #define x2apic_supported() (0) 243e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_X2APIC */ 244e3998434SMateusz Jończyk extern void __init check_x2apic(void); 245bb898558SAl Viro 2460e24f7c9SThomas Gleixner struct irq_data; 2470e24f7c9SThomas Gleixner 248e2780a68SIngo Molnar /* 249e2780a68SIngo Molnar * Copyright 2004 James Cleverdon, IBM. 250e2780a68SIngo Molnar * 251e2780a68SIngo Molnar * Generic APIC sub-arch data struct. 252e2780a68SIngo Molnar * 253e2780a68SIngo Molnar * Hacked for x86-64 by James Cleverdon from i386 architecture code by 254e2780a68SIngo Molnar * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and 255e2780a68SIngo Molnar * James Cleverdon. 256e2780a68SIngo Molnar */ 257be163a15SIngo Molnar struct apic { 25872f48a38SThomas Gleixner /* Hotpath functions first */ 259185c8f33SThomas Gleixner void (*eoi)(void); 260185c8f33SThomas Gleixner void (*native_eoi)(void); 26172f48a38SThomas Gleixner void (*write)(u32 reg, u32 v); 26272f48a38SThomas Gleixner u32 (*read)(u32 reg); 263e2780a68SIngo Molnar 26472f48a38SThomas Gleixner /* IPI related functions */ 26572f48a38SThomas Gleixner void (*wait_icr_idle)(void); 26672f48a38SThomas Gleixner u32 (*safe_wait_icr_idle)(void); 26772f48a38SThomas Gleixner 26872f48a38SThomas Gleixner void (*send_IPI)(int cpu, int vector); 26972f48a38SThomas Gleixner void (*send_IPI_mask)(const struct cpumask *mask, int vector); 27072f48a38SThomas Gleixner void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); 27172f48a38SThomas Gleixner void (*send_IPI_allbutself)(int vector); 27272f48a38SThomas Gleixner void (*send_IPI_all)(int vector); 27372f48a38SThomas Gleixner void (*send_IPI_self)(int vector); 27472f48a38SThomas Gleixner 27572161299SThomas Gleixner enum apic_delivery_modes delivery_mode; 276b5a5ce58SThomas Gleixner 277b5a5ce58SThomas Gleixner u32 disable_esr : 1, 278b5a5ce58SThomas Gleixner dest_mode_logical : 1, 279b5a5ce58SThomas Gleixner x2apic_set_max_apicid : 1; 28072f48a38SThomas Gleixner 2819f9e3bb1SThomas Gleixner u32 (*calc_dest_apicid)(unsigned int cpu); 28272f48a38SThomas Gleixner 28372f48a38SThomas Gleixner /* ICR related functions */ 28472f48a38SThomas Gleixner u64 (*icr_read)(void); 28572f48a38SThomas Gleixner void (*icr_write)(u32 low, u32 high); 28672f48a38SThomas Gleixner 287d92e5e7cSThomas Gleixner /* The limit of the APIC ID space. */ 288d92e5e7cSThomas Gleixner u32 max_apic_id; 289d92e5e7cSThomas Gleixner 29072f48a38SThomas Gleixner /* Probe, setup and smpboot functions */ 291e2780a68SIngo Molnar int (*probe)(void); 292e2780a68SIngo Molnar int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); 2935a3a46bdSThomas Gleixner bool (*apic_id_registered)(void); 294e2780a68SIngo Molnar 29557e0aa44SThomas Gleixner bool (*check_apicid_used)(physid_mask_t *map, int apicid); 296e2780a68SIngo Molnar void (*init_apic_ldr)(void); 2977abc0753SCyrill Gorcunov void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); 298e2780a68SIngo Molnar int (*cpu_present_to_apicid)(int mps_cpu); 299e2780a68SIngo Molnar int (*phys_pkg_id)(int cpuid_apic, int index_msb); 300e2780a68SIngo Molnar 30172f48a38SThomas Gleixner u32 (*get_apic_id)(unsigned long x); 302727657e6SThomas Gleixner u32 (*set_apic_id)(unsigned int id); 303e2780a68SIngo Molnar 304e2780a68SIngo Molnar /* wakeup_secondary_cpu */ 3051f5bcabfSIngo Molnar int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); 306ff2e6468SSean Christopherson /* wakeup secondary CPU using 64-bit wakeup point */ 307ff2e6468SSean Christopherson int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); 308e2780a68SIngo Molnar 30972f48a38SThomas Gleixner char *name; 310e2780a68SIngo Molnar }; 311e2780a68SIngo Molnar 312bef4f379SThomas Gleixner struct apic_override { 313bef4f379SThomas Gleixner void (*eoi)(void); 314bef4f379SThomas Gleixner void (*native_eoi)(void); 315bef4f379SThomas Gleixner void (*write)(u32 reg, u32 v); 316bef4f379SThomas Gleixner u32 (*read)(u32 reg); 317bef4f379SThomas Gleixner void (*send_IPI)(int cpu, int vector); 318bef4f379SThomas Gleixner void (*send_IPI_mask)(const struct cpumask *mask, int vector); 319bef4f379SThomas Gleixner void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); 320bef4f379SThomas Gleixner void (*send_IPI_allbutself)(int vector); 321bef4f379SThomas Gleixner void (*send_IPI_all)(int vector); 322bef4f379SThomas Gleixner void (*send_IPI_self)(int vector); 323bef4f379SThomas Gleixner u64 (*icr_read)(void); 324bef4f379SThomas Gleixner void (*icr_write)(u32 low, u32 high); 325bef4f379SThomas Gleixner int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); 326bef4f379SThomas Gleixner int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); 327bef4f379SThomas Gleixner }; 328bef4f379SThomas Gleixner 3290917c01fSIngo Molnar /* 3300917c01fSIngo Molnar * Pointer to the local APIC driver in use on this system (there's 3310917c01fSIngo Molnar * always just one such driver in use - the kernel decides via an 3320917c01fSIngo Molnar * early probing process which one it picks - and then sticks to it): 3330917c01fSIngo Molnar */ 334be163a15SIngo Molnar extern struct apic *apic; 3350917c01fSIngo Molnar 3360917c01fSIngo Molnar /* 337107e0e0cSSuresh Siddha * APIC drivers are probed based on how they are listed in the .apicdrivers 338107e0e0cSSuresh Siddha * section. So the order is important and enforced by the ordering 339107e0e0cSSuresh Siddha * of different apic driver files in the Makefile. 340107e0e0cSSuresh Siddha * 341107e0e0cSSuresh Siddha * For the files having two apic drivers, we use apic_drivers() 342107e0e0cSSuresh Siddha * to enforce the order with in them. 343107e0e0cSSuresh Siddha */ 344107e0e0cSSuresh Siddha #define apic_driver(sym) \ 34575fdd155SAndi Kleen static const struct apic *__apicdrivers_##sym __used \ 346107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 34733def849SJoe Perches __section(".apicdrivers") = { &sym } 348107e0e0cSSuresh Siddha 349107e0e0cSSuresh Siddha #define apic_drivers(sym1, sym2) \ 350107e0e0cSSuresh Siddha static struct apic *__apicdrivers_##sym1##sym2[2] __used \ 351107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 35233def849SJoe Perches __section(".apicdrivers") = { &sym1, &sym2 } 353107e0e0cSSuresh Siddha 354107e0e0cSSuresh Siddha extern struct apic *__apicdrivers[], *__apicdrivers_end[]; 355107e0e0cSSuresh Siddha 356107e0e0cSSuresh Siddha /* 3570917c01fSIngo Molnar * APIC functionality to boot other CPUs - only used on SMP: 3580917c01fSIngo Molnar */ 3590917c01fSIngo Molnar #ifdef CONFIG_SMP 3602cffad7bSThomas Gleixner extern int lapic_can_unplug_cpu(void); 3610917c01fSIngo Molnar #endif 362e2780a68SIngo Molnar 363d674cd19SCyrill Gorcunov #ifdef CONFIG_X86_LOCAL_APIC 364bef4f379SThomas Gleixner extern struct apic_override __x86_apic_override; 365346b46beSFernando Luis Vázquez Cao 366bef4f379SThomas Gleixner void __init apic_setup_apic_calls(void); 3673af1e415SThomas Gleixner void __init apic_install_driver(struct apic *driver); 3683af1e415SThomas Gleixner 369bef4f379SThomas Gleixner #define apic_update_callback(_callback, _fn) { \ 370bef4f379SThomas Gleixner __x86_apic_override._callback = _fn; \ 371bef4f379SThomas Gleixner apic->_callback = _fn; \ 372*3b7c27e6SThomas Gleixner static_call_update(apic_call_##_callback, _fn); \ 373bef4f379SThomas Gleixner pr_info("APIC: %s() replaced with %ps()\n", #_callback, _fn); \ 374bef4f379SThomas Gleixner } 375bef4f379SThomas Gleixner 376*3b7c27e6SThomas Gleixner #define DECLARE_APIC_CALL(__cb) \ 377*3b7c27e6SThomas Gleixner DECLARE_STATIC_CALL(apic_call_##__cb, *apic->__cb) 378*3b7c27e6SThomas Gleixner 379*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(eoi); 380*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(native_eoi); 381*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(icr_read); 382*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(icr_write); 383*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(read); 384*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(send_IPI); 385*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(send_IPI_mask); 386*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(send_IPI_mask_allbutself); 387*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(send_IPI_allbutself); 388*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(send_IPI_all); 389*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(send_IPI_self); 390*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(wait_icr_idle); 391*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(wakeup_secondary_cpu); 392*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(wakeup_secondary_cpu_64); 393*3b7c27e6SThomas Gleixner DECLARE_APIC_CALL(write); 394*3b7c27e6SThomas Gleixner 39554271fb0SThomas Gleixner static __always_inline u32 apic_read(u32 reg) 396e2780a68SIngo Molnar { 397e2780a68SIngo Molnar return apic->read(reg); 398e2780a68SIngo Molnar } 399e2780a68SIngo Molnar 40054271fb0SThomas Gleixner static __always_inline void apic_write(u32 reg, u32 val) 401e2780a68SIngo Molnar { 402e2780a68SIngo Molnar apic->write(reg, val); 403e2780a68SIngo Molnar } 404e2780a68SIngo Molnar 40554271fb0SThomas Gleixner static __always_inline void apic_eoi(void) 4062a43195dSMichael S. Tsirkin { 407185c8f33SThomas Gleixner apic->eoi(); 4082a43195dSMichael S. Tsirkin } 4092a43195dSMichael S. Tsirkin 41054271fb0SThomas Gleixner static __always_inline void apic_native_eoi(void) 4110fa07576SThomas Gleixner { 4120fa07576SThomas Gleixner apic->native_eoi(); 4130fa07576SThomas Gleixner } 4140fa07576SThomas Gleixner 41554271fb0SThomas Gleixner static __always_inline u64 apic_icr_read(void) 416e2780a68SIngo Molnar { 417e2780a68SIngo Molnar return apic->icr_read(); 418e2780a68SIngo Molnar } 419e2780a68SIngo Molnar 42054271fb0SThomas Gleixner static __always_inline void apic_icr_write(u32 low, u32 high) 421e2780a68SIngo Molnar { 422e2780a68SIngo Molnar apic->icr_write(low, high); 423e2780a68SIngo Molnar } 424e2780a68SIngo Molnar 42528b82352SDave Hansen static __always_inline void __apic_send_IPI(int cpu, int vector) 42628b82352SDave Hansen { 42728b82352SDave Hansen apic->send_IPI(cpu, vector); 42828b82352SDave Hansen } 42928b82352SDave Hansen 43028b82352SDave Hansen static __always_inline void __apic_send_IPI_mask(const struct cpumask *mask, int vector) 43128b82352SDave Hansen { 43228b82352SDave Hansen apic->send_IPI_mask(mask, vector); 43328b82352SDave Hansen } 43428b82352SDave Hansen 43528b82352SDave Hansen static __always_inline void __apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) 43628b82352SDave Hansen { 43728b82352SDave Hansen apic->send_IPI_mask_allbutself(mask, vector); 43828b82352SDave Hansen } 43928b82352SDave Hansen 44028b82352SDave Hansen static __always_inline void __apic_send_IPI_allbutself(int vector) 44128b82352SDave Hansen { 44228b82352SDave Hansen apic->send_IPI_allbutself(vector); 44328b82352SDave Hansen } 44428b82352SDave Hansen 44528b82352SDave Hansen static __always_inline void __apic_send_IPI_all(int vector) 44628b82352SDave Hansen { 44728b82352SDave Hansen apic->send_IPI_all(vector); 44828b82352SDave Hansen } 44928b82352SDave Hansen 45028b82352SDave Hansen static __always_inline void __apic_send_IPI_self(int vector) 45128b82352SDave Hansen { 45228b82352SDave Hansen apic->send_IPI_self(vector); 45328b82352SDave Hansen } 45428b82352SDave Hansen 45554271fb0SThomas Gleixner static __always_inline void apic_wait_icr_idle(void) 456e2780a68SIngo Molnar { 457ee513d9dSThomas Gleixner if (apic->wait_icr_idle) 458e2780a68SIngo Molnar apic->wait_icr_idle(); 459e2780a68SIngo Molnar } 460e2780a68SIngo Molnar 46154271fb0SThomas Gleixner static __always_inline u32 safe_apic_wait_icr_idle(void) 462e2780a68SIngo Molnar { 46313d779fdSThomas Gleixner return apic->safe_wait_icr_idle ? apic->safe_wait_icr_idle() : 0; 464e2780a68SIngo Molnar } 465e2780a68SIngo Molnar 46654271fb0SThomas Gleixner static __always_inline bool apic_id_valid(u32 apic_id) 4679132d720SThomas Gleixner { 468d8666cf7SThomas Gleixner return apic_id <= apic->max_apic_id; 4699132d720SThomas Gleixner } 4709132d720SThomas Gleixner 471d674cd19SCyrill Gorcunov #else /* CONFIG_X86_LOCAL_APIC */ 472d674cd19SCyrill Gorcunov 473d674cd19SCyrill Gorcunov static inline u32 apic_read(u32 reg) { return 0; } 474d674cd19SCyrill Gorcunov static inline void apic_write(u32 reg, u32 val) { } 4752a43195dSMichael S. Tsirkin static inline void apic_eoi(void) { } 476d674cd19SCyrill Gorcunov static inline u64 apic_icr_read(void) { return 0; } 477d674cd19SCyrill Gorcunov static inline void apic_icr_write(u32 low, u32 high) { } 478d674cd19SCyrill Gorcunov static inline void apic_wait_icr_idle(void) { } 479d674cd19SCyrill Gorcunov static inline u32 safe_apic_wait_icr_idle(void) { return 0; } 480185c8f33SThomas Gleixner static inline void apic_set_eoi_cb(void (*eoi)(void)) {} 4810fa07576SThomas Gleixner static inline void apic_native_eoi(void) { WARN_ON_ONCE(1); } 482bef4f379SThomas Gleixner static inline void apic_setup_apic_calls(void) { } 483bef4f379SThomas Gleixner 484bef4f379SThomas Gleixner #define apic_update_callback(_callback, _fn) do { } while (0) 485d674cd19SCyrill Gorcunov 486d674cd19SCyrill Gorcunov #endif /* CONFIG_X86_LOCAL_APIC */ 487e2780a68SIngo Molnar 488c0255770SThomas Gleixner extern void apic_ack_irq(struct irq_data *data); 489c0255770SThomas Gleixner 4906f1a4891SThomas Gleixner static inline bool lapic_vector_set_in_irr(unsigned int vector) 4916f1a4891SThomas Gleixner { 4926f1a4891SThomas Gleixner u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); 4936f1a4891SThomas Gleixner 4946f1a4891SThomas Gleixner return !!(irr & (1U << (vector % 32))); 4956f1a4891SThomas Gleixner } 4966f1a4891SThomas Gleixner 497e2780a68SIngo Molnar static inline unsigned default_get_apic_id(unsigned long x) 498e2780a68SIngo Molnar { 499e2780a68SIngo Molnar unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 500e2780a68SIngo Molnar 50142937e81SAndreas Herrmann if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID)) 502e2780a68SIngo Molnar return (x >> 24) & 0xFF; 503e2780a68SIngo Molnar else 504e2780a68SIngo Molnar return (x >> 24) & 0x0F; 505e2780a68SIngo Molnar } 506e2780a68SIngo Molnar 507e2780a68SIngo Molnar /* 5086ab1b27cSDavid Rientjes * Warm reset vector position: 509e2780a68SIngo Molnar */ 5106ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_LOW 0x467 5116ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_HIGH 0x469 512e2780a68SIngo Molnar 513838312beSJan Beulich extern void generic_bigsmp_probe(void); 514e2780a68SIngo Molnar 515e2780a68SIngo Molnar #ifdef CONFIG_X86_LOCAL_APIC 516e2780a68SIngo Molnar 517e2780a68SIngo Molnar #include <asm/smp.h> 518e2780a68SIngo Molnar 51983a10522SThomas Gleixner extern struct apic apic_noop; 520e2780a68SIngo Molnar 521e2780a68SIngo Molnar static inline unsigned int read_apic_id(void) 522e2780a68SIngo Molnar { 52383a10522SThomas Gleixner unsigned int reg = apic_read(APIC_ID); 524e2780a68SIngo Molnar 525e2780a68SIngo Molnar return apic->get_apic_id(reg); 526e2780a68SIngo Molnar } 527e2780a68SIngo Molnar 528f39642d0SKuppuswamy Sathyanarayanan #ifdef CONFIG_X86_64 529f39642d0SKuppuswamy Sathyanarayanan typedef int (*wakeup_cpu_handler)(int apicid, unsigned long start_eip); 530d75baa26SThomas Gleixner extern int default_acpi_madt_oem_check(char *, char *); 5319d87f5b6SThomas Gleixner extern void x86_64_probe_apic(void); 532d75baa26SThomas Gleixner #else 533d75baa26SThomas Gleixner static inline int default_acpi_madt_oem_check(char *a, char *b) { return 0; } 5349d87f5b6SThomas Gleixner static inline void x86_64_probe_apic(void) { } 535f39642d0SKuppuswamy Sathyanarayanan #endif 536f39642d0SKuppuswamy Sathyanarayanan 537a774635dSLi RongQing extern int default_apic_id_valid(u32 apicid); 5389f9e3bb1SThomas Gleixner 5399f9e3bb1SThomas Gleixner extern u32 apic_default_calc_apicid(unsigned int cpu); 5409f9e3bb1SThomas Gleixner extern u32 apic_flat_calc_apicid(unsigned int cpu); 5419f9e3bb1SThomas Gleixner 54283a10522SThomas Gleixner extern bool default_check_apicid_used(physid_mask_t *map, int apicid); 54383a10522SThomas Gleixner extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap); 544e2780a68SIngo Molnar extern int default_cpu_present_to_apicid(int mps_cpu); 545e2780a68SIngo Molnar 546a6625b47SThomas Gleixner #else /* CONFIG_X86_LOCAL_APIC */ 547a6625b47SThomas Gleixner 548a6625b47SThomas Gleixner static inline unsigned int read_apic_id(void) { return 0; } 549a6625b47SThomas Gleixner 550a6625b47SThomas Gleixner #endif /* !CONFIG_X86_LOCAL_APIC */ 55183a10522SThomas Gleixner 5526a4d2657SThomas Gleixner #ifdef CONFIG_SMP 5536a1cb5f5SThomas Gleixner void apic_smt_update(void); 5546a4d2657SThomas Gleixner #else 5556a1cb5f5SThomas Gleixner static inline void apic_smt_update(void) { } 5566a4d2657SThomas Gleixner #endif 5576a4d2657SThomas Gleixner 558b0a19555SThomas Gleixner struct msi_msg; 559f598181aSDavid Woodhouse struct irq_cfg; 560b0a19555SThomas Gleixner 561f598181aSDavid Woodhouse extern void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg, 562f598181aSDavid Woodhouse bool dmar); 563b0a19555SThomas Gleixner 56417405453SYoshihiro YUNOMAE extern void ioapic_zap_locks(void); 56517405453SYoshihiro YUNOMAE 5661965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 567