11965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 21965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 3bb898558SAl Viro 4e2780a68SIngo Molnar #include <linux/cpumask.h> 5bb898558SAl Viro 6bb898558SAl Viro #include <asm/alternative.h> 7bb898558SAl Viro #include <asm/cpufeature.h> 8e2780a68SIngo Molnar #include <asm/apicdef.h> 960063497SArun Sharma #include <linux/atomic.h> 10e2780a68SIngo Molnar #include <asm/fixmap.h> 11e2780a68SIngo Molnar #include <asm/mpspec.h> 12bb898558SAl Viro #include <asm/msr.h> 13bb898558SAl Viro 14bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 15bb898558SAl Viro 16bb898558SAl Viro /* 17bb898558SAl Viro * Debugging macros 18bb898558SAl Viro */ 19bb898558SAl Viro #define APIC_QUIET 0 20bb898558SAl Viro #define APIC_VERBOSE 1 21bb898558SAl Viro #define APIC_DEBUG 2 22bb898558SAl Viro 23b7c4948eSHidehiro Kawai /* Macros for apic_extnmi which controls external NMI masking */ 24b7c4948eSHidehiro Kawai #define APIC_EXTNMI_BSP 0 /* Default */ 25b7c4948eSHidehiro Kawai #define APIC_EXTNMI_ALL 1 26b7c4948eSHidehiro Kawai #define APIC_EXTNMI_NONE 2 27b7c4948eSHidehiro Kawai 28bb898558SAl Viro /* 29bb898558SAl Viro * Define the default level of output to be very little 30bb898558SAl Viro * This can be turned up by using apic=verbose for more 31bb898558SAl Viro * information and apic=debug for _lots_ of information. 32bb898558SAl Viro * apic_verbosity is defined in apic.c 33bb898558SAl Viro */ 34bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 35bb898558SAl Viro if ((v) <= apic_verbosity) \ 36bb898558SAl Viro printk(s, ##a); \ 37bb898558SAl Viro } while (0) 38bb898558SAl Viro 39bb898558SAl Viro 40160d8dacSIngo Molnar #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 41bb898558SAl Viro extern void generic_apic_probe(void); 42160d8dacSIngo Molnar #else 43160d8dacSIngo Molnar static inline void generic_apic_probe(void) 44160d8dacSIngo Molnar { 45160d8dacSIngo Molnar } 46160d8dacSIngo Molnar #endif 47bb898558SAl Viro 48bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 49bb898558SAl Viro 50bb898558SAl Viro extern unsigned int apic_verbosity; 51bb898558SAl Viro extern int local_apic_timer_c2_ok; 52bb898558SAl Viro 53bb898558SAl Viro extern int disable_apic; 541ade93efSJacob Pan extern unsigned int lapic_timer_frequency; 550939e4fdSIngo Molnar 564f45ed9fSDou Liyang extern enum apic_intr_mode_id apic_intr_mode; 574f45ed9fSDou Liyang enum apic_intr_mode_id { 584f45ed9fSDou Liyang APIC_PIC, 594f45ed9fSDou Liyang APIC_VIRTUAL_WIRE, 604f45ed9fSDou Liyang APIC_VIRTUAL_WIRE_NO_CONFIG, 614f45ed9fSDou Liyang APIC_SYMMETRIC_IO, 624f45ed9fSDou Liyang APIC_SYMMETRIC_IO_NO_ROUTING 634f45ed9fSDou Liyang }; 644f45ed9fSDou Liyang 650939e4fdSIngo Molnar #ifdef CONFIG_SMP 660939e4fdSIngo Molnar extern void __inquire_remote_apic(int apicid); 670939e4fdSIngo Molnar #else /* CONFIG_SMP */ 680939e4fdSIngo Molnar static inline void __inquire_remote_apic(int apicid) 690939e4fdSIngo Molnar { 700939e4fdSIngo Molnar } 710939e4fdSIngo Molnar #endif /* CONFIG_SMP */ 720939e4fdSIngo Molnar 730939e4fdSIngo Molnar static inline void default_inquire_remote_apic(int apicid) 740939e4fdSIngo Molnar { 750939e4fdSIngo Molnar if (apic_verbosity >= APIC_DEBUG) 760939e4fdSIngo Molnar __inquire_remote_apic(apicid); 770939e4fdSIngo Molnar } 780939e4fdSIngo Molnar 79bb898558SAl Viro /* 808312136fSCyrill Gorcunov * With 82489DX we can't rely on apic feature bit 818312136fSCyrill Gorcunov * retrieved via cpuid but still have to deal with 828312136fSCyrill Gorcunov * such an apic chip so we assume that SMP configuration 838312136fSCyrill Gorcunov * is found from MP table (64bit case uses ACPI mostly 848312136fSCyrill Gorcunov * which set smp presence flag as well so we are safe 858312136fSCyrill Gorcunov * to use this helper too). 868312136fSCyrill Gorcunov */ 878312136fSCyrill Gorcunov static inline bool apic_from_smp_config(void) 888312136fSCyrill Gorcunov { 898312136fSCyrill Gorcunov return smp_found_config && !disable_apic; 908312136fSCyrill Gorcunov } 918312136fSCyrill Gorcunov 928312136fSCyrill Gorcunov /* 93bb898558SAl Viro * Basic functions accessing APICs. 94bb898558SAl Viro */ 95bb898558SAl Viro #ifdef CONFIG_PARAVIRT 96bb898558SAl Viro #include <asm/paravirt.h> 97bb898558SAl Viro #endif 98bb898558SAl Viro 99bb898558SAl Viro extern int setup_profiling_timer(unsigned int); 100bb898558SAl Viro 101bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 102bb898558SAl Viro { 103bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 104bb898558SAl Viro 105a930dc45SBorislav Petkov alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP, 106bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 107bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 108bb898558SAl Viro } 109bb898558SAl Viro 110bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 111bb898558SAl Viro { 112bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 113bb898558SAl Viro } 114bb898558SAl Viro 115c1eeb2deSYinghai Lu extern void native_apic_wait_icr_idle(void); 116c1eeb2deSYinghai Lu extern u32 native_safe_apic_wait_icr_idle(void); 117c1eeb2deSYinghai Lu extern void native_apic_icr_write(u32 low, u32 id); 118c1eeb2deSYinghai Lu extern u64 native_apic_icr_read(void); 119c1eeb2deSYinghai Lu 1208d806960SThomas Gleixner static inline bool apic_is_x2apic_enabled(void) 1218d806960SThomas Gleixner { 1228d806960SThomas Gleixner u64 msr; 1238d806960SThomas Gleixner 1248d806960SThomas Gleixner if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) 1258d806960SThomas Gleixner return false; 1268d806960SThomas Gleixner return msr & X2APIC_ENABLE; 1278d806960SThomas Gleixner } 1288d806960SThomas Gleixner 129e02ae387SPaolo Bonzini extern void enable_IR_x2apic(void); 130e02ae387SPaolo Bonzini 131e02ae387SPaolo Bonzini extern int get_physical_broadcast(void); 132e02ae387SPaolo Bonzini 133e02ae387SPaolo Bonzini extern int lapic_get_maxlvt(void); 134e02ae387SPaolo Bonzini extern void clear_local_APIC(void); 135e02ae387SPaolo Bonzini extern void disconnect_bsp_APIC(int virt_wire_setup); 136e02ae387SPaolo Bonzini extern void disable_local_APIC(void); 137e02ae387SPaolo Bonzini extern void lapic_shutdown(void); 138e02ae387SPaolo Bonzini extern void sync_Arb_IDs(void); 1394b1669e8SDou Liyang extern void apic_intr_mode_init(void); 140e02ae387SPaolo Bonzini extern void setup_local_APIC(void); 141e02ae387SPaolo Bonzini extern void init_apic_mappings(void); 142e02ae387SPaolo Bonzini void register_lapic_address(unsigned long address); 143e02ae387SPaolo Bonzini extern void setup_boot_APIC_clock(void); 144e02ae387SPaolo Bonzini extern void setup_secondary_APIC_clock(void); 1456731b0d6SNicolai Stange extern void lapic_update_tsc_freq(void); 146e02ae387SPaolo Bonzini 147e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 148e02ae387SPaolo Bonzini static inline int apic_force_enable(unsigned long addr) 149e02ae387SPaolo Bonzini { 150e02ae387SPaolo Bonzini return -1; 151e02ae387SPaolo Bonzini } 152e02ae387SPaolo Bonzini #else 153e02ae387SPaolo Bonzini extern int apic_force_enable(unsigned long addr); 154e02ae387SPaolo Bonzini #endif 155e02ae387SPaolo Bonzini 1564b1244b4SDou Liyang extern void apic_bsp_setup(bool upmode); 157e02ae387SPaolo Bonzini extern void apic_ap_setup(void); 158e02ae387SPaolo Bonzini 159e02ae387SPaolo Bonzini /* 160e02ae387SPaolo Bonzini * On 32bit this is mach-xxx local 161e02ae387SPaolo Bonzini */ 162e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 163e02ae387SPaolo Bonzini extern int apic_is_clustered_box(void); 164e02ae387SPaolo Bonzini #else 165e02ae387SPaolo Bonzini static inline int apic_is_clustered_box(void) 166e02ae387SPaolo Bonzini { 167e02ae387SPaolo Bonzini return 0; 168e02ae387SPaolo Bonzini } 169e02ae387SPaolo Bonzini #endif 170e02ae387SPaolo Bonzini 171e02ae387SPaolo Bonzini extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask); 1720fa115daSThomas Gleixner extern void lapic_assign_system_vectors(void); 1730fa115daSThomas Gleixner extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace); 1740fa115daSThomas Gleixner extern void lapic_online(void); 1750fa115daSThomas Gleixner extern void lapic_offline(void); 176e02ae387SPaolo Bonzini 177e02ae387SPaolo Bonzini #else /* !CONFIG_X86_LOCAL_APIC */ 178e02ae387SPaolo Bonzini static inline void lapic_shutdown(void) { } 179e02ae387SPaolo Bonzini #define local_apic_timer_c2_ok 1 180e02ae387SPaolo Bonzini static inline void init_apic_mappings(void) { } 181e02ae387SPaolo Bonzini static inline void disable_local_APIC(void) { } 182e02ae387SPaolo Bonzini # define setup_boot_APIC_clock x86_init_noop 183e02ae387SPaolo Bonzini # define setup_secondary_APIC_clock x86_init_noop 1846731b0d6SNicolai Stange static inline void lapic_update_tsc_freq(void) { } 1854b1669e8SDou Liyang static inline void apic_intr_mode_init(void) { } 1860fa115daSThomas Gleixner static inline void lapic_assign_system_vectors(void) { } 1870fa115daSThomas Gleixner static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { } 188e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_LOCAL_APIC */ 189e02ae387SPaolo Bonzini 190d0b03bd1SHan, Weidong #ifdef CONFIG_X86_X2APIC 191ce4e240cSSuresh Siddha /* 192ce4e240cSSuresh Siddha * Make previous memory operations globally visible before 193ce4e240cSSuresh Siddha * sending the IPI through x2apic wrmsr. We need a serializing instruction or 194ce4e240cSSuresh Siddha * mfence for this. 195ce4e240cSSuresh Siddha */ 196ce4e240cSSuresh Siddha static inline void x2apic_wrmsr_fence(void) 197ce4e240cSSuresh Siddha { 198ce4e240cSSuresh Siddha asm volatile("mfence" : : : "memory"); 199ce4e240cSSuresh Siddha } 200ce4e240cSSuresh Siddha 201bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 202bb898558SAl Viro { 203bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 204bb898558SAl Viro reg == APIC_LVR) 205bb898558SAl Viro return; 206bb898558SAl Viro 207bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 208bb898558SAl Viro } 209bb898558SAl Viro 2100ab711aeSMichael S. Tsirkin static inline void native_apic_msr_eoi_write(u32 reg, u32 v) 2110ab711aeSMichael S. Tsirkin { 212a585df8eSBorislav Petkov __wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0); 2130ab711aeSMichael S. Tsirkin } 2140ab711aeSMichael S. Tsirkin 215bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 216bb898558SAl Viro { 2170059b243SAndi Kleen u64 msr; 218bb898558SAl Viro 219bb898558SAl Viro if (reg == APIC_DFR) 220bb898558SAl Viro return -1; 221bb898558SAl Viro 2220059b243SAndi Kleen rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); 2230059b243SAndi Kleen return (u32)msr; 224bb898558SAl Viro } 225bb898558SAl Viro 226c1eeb2deSYinghai Lu static inline void native_x2apic_wait_icr_idle(void) 227c1eeb2deSYinghai Lu { 228c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 229c1eeb2deSYinghai Lu return; 230c1eeb2deSYinghai Lu } 231c1eeb2deSYinghai Lu 232c1eeb2deSYinghai Lu static inline u32 native_safe_x2apic_wait_icr_idle(void) 233c1eeb2deSYinghai Lu { 234c1eeb2deSYinghai Lu /* no need to wait for icr idle in x2apic */ 235c1eeb2deSYinghai Lu return 0; 236c1eeb2deSYinghai Lu } 237c1eeb2deSYinghai Lu 238c1eeb2deSYinghai Lu static inline void native_x2apic_icr_write(u32 low, u32 id) 239c1eeb2deSYinghai Lu { 240c1eeb2deSYinghai Lu wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); 241c1eeb2deSYinghai Lu } 242c1eeb2deSYinghai Lu 243c1eeb2deSYinghai Lu static inline u64 native_x2apic_icr_read(void) 244c1eeb2deSYinghai Lu { 245c1eeb2deSYinghai Lu unsigned long val; 246c1eeb2deSYinghai Lu 247c1eeb2deSYinghai Lu rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); 248c1eeb2deSYinghai Lu return val; 249c1eeb2deSYinghai Lu } 250c1eeb2deSYinghai Lu 25181a46dd8SThomas Gleixner extern int x2apic_mode; 252fc1edaf9SSuresh Siddha extern int x2apic_phys; 253d524165cSThomas Gleixner extern void __init check_x2apic(void); 254659006bfSThomas Gleixner extern void x2apic_setup(void); 255bb898558SAl Viro static inline int x2apic_enabled(void) 256bb898558SAl Viro { 25762436a4dSBorislav Petkov return boot_cpu_has(X86_FEATURE_X2APIC) && apic_is_x2apic_enabled(); 258bb898558SAl Viro } 259fc1edaf9SSuresh Siddha 26062436a4dSBorislav Petkov #define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC)) 261e02ae387SPaolo Bonzini #else /* !CONFIG_X86_X2APIC */ 26255eae7deSThomas Gleixner static inline void check_x2apic(void) { } 263659006bfSThomas Gleixner static inline void x2apic_setup(void) { } 26455eae7deSThomas Gleixner static inline int x2apic_enabled(void) { return 0; } 265cf6567feSSuresh Siddha 26681a46dd8SThomas Gleixner #define x2apic_mode (0) 26781a46dd8SThomas Gleixner #define x2apic_supported() (0) 268e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_X2APIC */ 269bb898558SAl Viro 2700e24f7c9SThomas Gleixner struct irq_data; 2710e24f7c9SThomas Gleixner 272e2780a68SIngo Molnar /* 273e2780a68SIngo Molnar * Copyright 2004 James Cleverdon, IBM. 274e2780a68SIngo Molnar * Subject to the GNU Public License, v.2 275e2780a68SIngo Molnar * 276e2780a68SIngo Molnar * Generic APIC sub-arch data struct. 277e2780a68SIngo Molnar * 278e2780a68SIngo Molnar * Hacked for x86-64 by James Cleverdon from i386 architecture code by 279e2780a68SIngo Molnar * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and 280e2780a68SIngo Molnar * James Cleverdon. 281e2780a68SIngo Molnar */ 282be163a15SIngo Molnar struct apic { 28372f48a38SThomas Gleixner /* Hotpath functions first */ 28472f48a38SThomas Gleixner void (*eoi_write)(u32 reg, u32 v); 28572f48a38SThomas Gleixner void (*native_eoi_write)(u32 reg, u32 v); 28672f48a38SThomas Gleixner void (*write)(u32 reg, u32 v); 28772f48a38SThomas Gleixner u32 (*read)(u32 reg); 288e2780a68SIngo Molnar 28972f48a38SThomas Gleixner /* IPI related functions */ 29072f48a38SThomas Gleixner void (*wait_icr_idle)(void); 29172f48a38SThomas Gleixner u32 (*safe_wait_icr_idle)(void); 29272f48a38SThomas Gleixner 29372f48a38SThomas Gleixner void (*send_IPI)(int cpu, int vector); 29472f48a38SThomas Gleixner void (*send_IPI_mask)(const struct cpumask *mask, int vector); 29572f48a38SThomas Gleixner void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); 29672f48a38SThomas Gleixner void (*send_IPI_allbutself)(int vector); 29772f48a38SThomas Gleixner void (*send_IPI_all)(int vector); 29872f48a38SThomas Gleixner void (*send_IPI_self)(int vector); 29972f48a38SThomas Gleixner 30072f48a38SThomas Gleixner /* dest_logical is used by the IPI functions */ 30172f48a38SThomas Gleixner u32 dest_logical; 30272f48a38SThomas Gleixner u32 disable_esr; 30372f48a38SThomas Gleixner u32 irq_delivery_mode; 30472f48a38SThomas Gleixner u32 irq_dest_mode; 30572f48a38SThomas Gleixner 30672f48a38SThomas Gleixner /* Functions and data related to vector allocation */ 30772f48a38SThomas Gleixner void (*vector_allocation_domain)(int cpu, struct cpumask *retmask, 30872f48a38SThomas Gleixner const struct cpumask *mask); 30972f48a38SThomas Gleixner int (*cpu_mask_to_apicid)(const struct cpumask *cpumask, 31072f48a38SThomas Gleixner struct irq_data *irqdata, 31172f48a38SThomas Gleixner unsigned int *apicid); 3129f9e3bb1SThomas Gleixner u32 (*calc_dest_apicid)(unsigned int cpu); 31372f48a38SThomas Gleixner 31472f48a38SThomas Gleixner /* ICR related functions */ 31572f48a38SThomas Gleixner u64 (*icr_read)(void); 31672f48a38SThomas Gleixner void (*icr_write)(u32 low, u32 high); 31772f48a38SThomas Gleixner 31872f48a38SThomas Gleixner /* Probe, setup and smpboot functions */ 319e2780a68SIngo Molnar int (*probe)(void); 320e2780a68SIngo Molnar int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); 321fa63030eSDaniel J Blueman int (*apic_id_valid)(int apicid); 322e2780a68SIngo Molnar int (*apic_id_registered)(void); 323e2780a68SIngo Molnar 32457e0aa44SThomas Gleixner bool (*check_apicid_used)(physid_mask_t *map, int apicid); 325e2780a68SIngo Molnar void (*init_apic_ldr)(void); 3267abc0753SCyrill Gorcunov void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); 327e2780a68SIngo Molnar void (*setup_apic_routing)(void); 328e2780a68SIngo Molnar int (*cpu_present_to_apicid)(int mps_cpu); 3297abc0753SCyrill Gorcunov void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap); 330e11dadabSThomas Gleixner int (*check_phys_apicid_present)(int phys_apicid); 331e2780a68SIngo Molnar int (*phys_pkg_id)(int cpuid_apic, int index_msb); 332e2780a68SIngo Molnar 33372f48a38SThomas Gleixner u32 (*get_apic_id)(unsigned long x); 334727657e6SThomas Gleixner u32 (*set_apic_id)(unsigned int id); 335e2780a68SIngo Molnar 336e2780a68SIngo Molnar /* wakeup_secondary_cpu */ 3371f5bcabfSIngo Molnar int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); 338e2780a68SIngo Molnar 339e2780a68SIngo Molnar void (*inquire_remote_apic)(int apicid); 340e2780a68SIngo Molnar 341acb8bc09STejun Heo #ifdef CONFIG_X86_32 342acb8bc09STejun Heo /* 343acb8bc09STejun Heo * Called very early during boot from get_smp_config(). It should 344acb8bc09STejun Heo * return the logical apicid. x86_[bios]_cpu_to_apicid is 345acb8bc09STejun Heo * initialized before this function is called. 346acb8bc09STejun Heo * 347acb8bc09STejun Heo * If logical apicid can't be determined that early, the function 348acb8bc09STejun Heo * may return BAD_APICID. Logical apicid will be configured after 349acb8bc09STejun Heo * init_apic_ldr() while bringing up CPUs. Note that NUMA affinity 350acb8bc09STejun Heo * won't be applied properly during early boot in this case. 351acb8bc09STejun Heo */ 352acb8bc09STejun Heo int (*x86_32_early_logical_apicid)(int cpu); 353acb8bc09STejun Heo #endif 35472f48a38SThomas Gleixner char *name; 355e2780a68SIngo Molnar }; 356e2780a68SIngo Molnar 3570917c01fSIngo Molnar /* 3580917c01fSIngo Molnar * Pointer to the local APIC driver in use on this system (there's 3590917c01fSIngo Molnar * always just one such driver in use - the kernel decides via an 3600917c01fSIngo Molnar * early probing process which one it picks - and then sticks to it): 3610917c01fSIngo Molnar */ 362be163a15SIngo Molnar extern struct apic *apic; 3630917c01fSIngo Molnar 3640917c01fSIngo Molnar /* 365107e0e0cSSuresh Siddha * APIC drivers are probed based on how they are listed in the .apicdrivers 366107e0e0cSSuresh Siddha * section. So the order is important and enforced by the ordering 367107e0e0cSSuresh Siddha * of different apic driver files in the Makefile. 368107e0e0cSSuresh Siddha * 369107e0e0cSSuresh Siddha * For the files having two apic drivers, we use apic_drivers() 370107e0e0cSSuresh Siddha * to enforce the order with in them. 371107e0e0cSSuresh Siddha */ 372107e0e0cSSuresh Siddha #define apic_driver(sym) \ 37375fdd155SAndi Kleen static const struct apic *__apicdrivers_##sym __used \ 374107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 375107e0e0cSSuresh Siddha __section(.apicdrivers) = { &sym } 376107e0e0cSSuresh Siddha 377107e0e0cSSuresh Siddha #define apic_drivers(sym1, sym2) \ 378107e0e0cSSuresh Siddha static struct apic *__apicdrivers_##sym1##sym2[2] __used \ 379107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 380107e0e0cSSuresh Siddha __section(.apicdrivers) = { &sym1, &sym2 } 381107e0e0cSSuresh Siddha 382107e0e0cSSuresh Siddha extern struct apic *__apicdrivers[], *__apicdrivers_end[]; 383107e0e0cSSuresh Siddha 384107e0e0cSSuresh Siddha /* 3850917c01fSIngo Molnar * APIC functionality to boot other CPUs - only used on SMP: 3860917c01fSIngo Molnar */ 3870917c01fSIngo Molnar #ifdef CONFIG_SMP 3882b6163bfSYinghai Lu extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip); 3892cffad7bSThomas Gleixner extern int lapic_can_unplug_cpu(void); 3900917c01fSIngo Molnar #endif 391e2780a68SIngo Molnar 392d674cd19SCyrill Gorcunov #ifdef CONFIG_X86_LOCAL_APIC 393346b46beSFernando Luis Vázquez Cao 394e2780a68SIngo Molnar static inline u32 apic_read(u32 reg) 395e2780a68SIngo Molnar { 396e2780a68SIngo Molnar return apic->read(reg); 397e2780a68SIngo Molnar } 398e2780a68SIngo Molnar 399e2780a68SIngo Molnar static inline void apic_write(u32 reg, u32 val) 400e2780a68SIngo Molnar { 401e2780a68SIngo Molnar apic->write(reg, val); 402e2780a68SIngo Molnar } 403e2780a68SIngo Molnar 4042a43195dSMichael S. Tsirkin static inline void apic_eoi(void) 4052a43195dSMichael S. Tsirkin { 4062a43195dSMichael S. Tsirkin apic->eoi_write(APIC_EOI, APIC_EOI_ACK); 4072a43195dSMichael S. Tsirkin } 4082a43195dSMichael S. Tsirkin 409e2780a68SIngo Molnar static inline u64 apic_icr_read(void) 410e2780a68SIngo Molnar { 411e2780a68SIngo Molnar return apic->icr_read(); 412e2780a68SIngo Molnar } 413e2780a68SIngo Molnar 414e2780a68SIngo Molnar static inline void apic_icr_write(u32 low, u32 high) 415e2780a68SIngo Molnar { 416e2780a68SIngo Molnar apic->icr_write(low, high); 417e2780a68SIngo Molnar } 418e2780a68SIngo Molnar 419e2780a68SIngo Molnar static inline void apic_wait_icr_idle(void) 420e2780a68SIngo Molnar { 421e2780a68SIngo Molnar apic->wait_icr_idle(); 422e2780a68SIngo Molnar } 423e2780a68SIngo Molnar 424e2780a68SIngo Molnar static inline u32 safe_apic_wait_icr_idle(void) 425e2780a68SIngo Molnar { 426e2780a68SIngo Molnar return apic->safe_wait_icr_idle(); 427e2780a68SIngo Molnar } 428e2780a68SIngo Molnar 4291551df64SMichael S. Tsirkin extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); 4301551df64SMichael S. Tsirkin 431d674cd19SCyrill Gorcunov #else /* CONFIG_X86_LOCAL_APIC */ 432d674cd19SCyrill Gorcunov 433d674cd19SCyrill Gorcunov static inline u32 apic_read(u32 reg) { return 0; } 434d674cd19SCyrill Gorcunov static inline void apic_write(u32 reg, u32 val) { } 4352a43195dSMichael S. Tsirkin static inline void apic_eoi(void) { } 436d674cd19SCyrill Gorcunov static inline u64 apic_icr_read(void) { return 0; } 437d674cd19SCyrill Gorcunov static inline void apic_icr_write(u32 low, u32 high) { } 438d674cd19SCyrill Gorcunov static inline void apic_wait_icr_idle(void) { } 439d674cd19SCyrill Gorcunov static inline u32 safe_apic_wait_icr_idle(void) { return 0; } 4401551df64SMichael S. Tsirkin static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {} 441d674cd19SCyrill Gorcunov 442d674cd19SCyrill Gorcunov #endif /* CONFIG_X86_LOCAL_APIC */ 443e2780a68SIngo Molnar 444e2780a68SIngo Molnar static inline void ack_APIC_irq(void) 445e2780a68SIngo Molnar { 446e2780a68SIngo Molnar /* 447e2780a68SIngo Molnar * ack_APIC_irq() actually gets compiled as a single instruction 448e2780a68SIngo Molnar * ... yummie. 449e2780a68SIngo Molnar */ 4502a43195dSMichael S. Tsirkin apic_eoi(); 451e2780a68SIngo Molnar } 452e2780a68SIngo Molnar 453e2780a68SIngo Molnar static inline unsigned default_get_apic_id(unsigned long x) 454e2780a68SIngo Molnar { 455e2780a68SIngo Molnar unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 456e2780a68SIngo Molnar 45742937e81SAndreas Herrmann if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID)) 458e2780a68SIngo Molnar return (x >> 24) & 0xFF; 459e2780a68SIngo Molnar else 460e2780a68SIngo Molnar return (x >> 24) & 0x0F; 461e2780a68SIngo Molnar } 462e2780a68SIngo Molnar 463e2780a68SIngo Molnar /* 4646ab1b27cSDavid Rientjes * Warm reset vector position: 465e2780a68SIngo Molnar */ 4666ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_LOW 0x467 4676ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_HIGH 0x469 468e2780a68SIngo Molnar 4692b6163bfSYinghai Lu #ifdef CONFIG_X86_64 470e2780a68SIngo Molnar extern void apic_send_IPI_self(int vector); 471e2780a68SIngo Molnar 472e2780a68SIngo Molnar DECLARE_PER_CPU(int, x2apic_extra_bits); 473e2780a68SIngo Molnar #endif 474e2780a68SIngo Molnar 475838312beSJan Beulich extern void generic_bigsmp_probe(void); 476e2780a68SIngo Molnar 477e2780a68SIngo Molnar #ifdef CONFIG_X86_LOCAL_APIC 478e2780a68SIngo Molnar 479e2780a68SIngo Molnar #include <asm/smp.h> 480e2780a68SIngo Molnar 481e2780a68SIngo Molnar #define APIC_DFR_VALUE (APIC_DFR_FLAT) 482e2780a68SIngo Molnar 4830816b0f0SVlad Zolotarov DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid); 484e2780a68SIngo Molnar 48583a10522SThomas Gleixner extern struct apic apic_noop; 486e2780a68SIngo Molnar 487e2780a68SIngo Molnar static inline unsigned int read_apic_id(void) 488e2780a68SIngo Molnar { 48983a10522SThomas Gleixner unsigned int reg = apic_read(APIC_ID); 490e2780a68SIngo Molnar 491e2780a68SIngo Molnar return apic->get_apic_id(reg); 492e2780a68SIngo Molnar } 493e2780a68SIngo Molnar 49483a10522SThomas Gleixner extern int default_apic_id_valid(int apicid); 495a491cc90SJiang Liu extern int default_acpi_madt_oem_check(char *, char *); 496e2780a68SIngo Molnar extern void default_setup_apic_routing(void); 4979f9e3bb1SThomas Gleixner 4989f9e3bb1SThomas Gleixner extern u32 apic_default_calc_apicid(unsigned int cpu); 4999f9e3bb1SThomas Gleixner extern u32 apic_flat_calc_apicid(unsigned int cpu); 5009f9e3bb1SThomas Gleixner 50191cd9cb7SThomas Gleixner extern int flat_cpu_mask_to_apicid(const struct cpumask *cpumask, 5020e24f7c9SThomas Gleixner struct irq_data *irqdata, 503ad95212eSThomas Gleixner unsigned int *apicid); 50491cd9cb7SThomas Gleixner extern int default_cpu_mask_to_apicid(const struct cpumask *cpumask, 5050e24f7c9SThomas Gleixner struct irq_data *irqdata, 506ff164324SAlexander Gordeev unsigned int *apicid); 50783a10522SThomas Gleixner extern bool default_check_apicid_used(physid_mask_t *map, int apicid); 50883a10522SThomas Gleixner extern void flat_vector_allocation_domain(int cpu, struct cpumask *retmask, 50983a10522SThomas Gleixner const struct cpumask *mask); 51083a10522SThomas Gleixner extern void default_vector_allocation_domain(int cpu, struct cpumask *retmask, 51183a10522SThomas Gleixner const struct cpumask *mask); 51283a10522SThomas Gleixner extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap); 513e2780a68SIngo Molnar extern int default_cpu_present_to_apicid(int mps_cpu); 514e11dadabSThomas Gleixner extern int default_check_phys_apicid_present(int phys_apicid); 515e2780a68SIngo Molnar 516e2780a68SIngo Molnar #endif /* CONFIG_X86_LOCAL_APIC */ 51783a10522SThomas Gleixner 518eddc0e92SSeiji Aguchi extern void irq_enter(void); 519eddc0e92SSeiji Aguchi extern void irq_exit(void); 520eddc0e92SSeiji Aguchi 521eddc0e92SSeiji Aguchi static inline void entering_irq(void) 522eddc0e92SSeiji Aguchi { 523eddc0e92SSeiji Aguchi irq_enter(); 524eddc0e92SSeiji Aguchi } 525eddc0e92SSeiji Aguchi 526eddc0e92SSeiji Aguchi static inline void entering_ack_irq(void) 527eddc0e92SSeiji Aguchi { 528eddc0e92SSeiji Aguchi entering_irq(); 5297834c103SDave Jones ack_APIC_irq(); 530eddc0e92SSeiji Aguchi } 531eddc0e92SSeiji Aguchi 5326dc17876SThomas Gleixner static inline void ipi_entering_ack_irq(void) 5336dc17876SThomas Gleixner { 5346dc17876SThomas Gleixner irq_enter(); 535b0f48706SWanpeng Li ack_APIC_irq(); 5366dc17876SThomas Gleixner } 5376dc17876SThomas Gleixner 538eddc0e92SSeiji Aguchi static inline void exiting_irq(void) 539eddc0e92SSeiji Aguchi { 540eddc0e92SSeiji Aguchi irq_exit(); 541eddc0e92SSeiji Aguchi } 542eddc0e92SSeiji Aguchi 543eddc0e92SSeiji Aguchi static inline void exiting_ack_irq(void) 544eddc0e92SSeiji Aguchi { 545eddc0e92SSeiji Aguchi ack_APIC_irq(); 546b0f48706SWanpeng Li irq_exit(); 547eddc0e92SSeiji Aguchi } 548e2780a68SIngo Molnar 54917405453SYoshihiro YUNOMAE extern void ioapic_zap_locks(void); 55017405453SYoshihiro YUNOMAE 5511965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 552