17e300dabSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 21965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 31965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 4bb898558SAl Viro 5e2780a68SIngo Molnar #include <linux/cpumask.h> 6bb898558SAl Viro 7bb898558SAl Viro #include <asm/alternative.h> 8bb898558SAl Viro #include <asm/cpufeature.h> 9e2780a68SIngo Molnar #include <asm/apicdef.h> 1060063497SArun Sharma #include <linux/atomic.h> 11e2780a68SIngo Molnar #include <asm/fixmap.h> 12e2780a68SIngo Molnar #include <asm/mpspec.h> 13bb898558SAl Viro #include <asm/msr.h> 14ffcba43fSNicolai Stange #include <asm/hardirq.h> 15bb898558SAl Viro 16bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 17bb898558SAl Viro 18bb898558SAl Viro /* 19bb898558SAl Viro * Debugging macros 20bb898558SAl Viro */ 21bb898558SAl Viro #define APIC_QUIET 0 22bb898558SAl Viro #define APIC_VERBOSE 1 23bb898558SAl Viro #define APIC_DEBUG 2 24bb898558SAl Viro 25b7c4948eSHidehiro Kawai /* Macros for apic_extnmi which controls external NMI masking */ 26b7c4948eSHidehiro Kawai #define APIC_EXTNMI_BSP 0 /* Default */ 27b7c4948eSHidehiro Kawai #define APIC_EXTNMI_ALL 1 28b7c4948eSHidehiro Kawai #define APIC_EXTNMI_NONE 2 29b7c4948eSHidehiro Kawai 30bb898558SAl Viro /* 31bb898558SAl Viro * Define the default level of output to be very little 32bb898558SAl Viro * This can be turned up by using apic=verbose for more 33bb898558SAl Viro * information and apic=debug for _lots_ of information. 34bb898558SAl Viro * apic_verbosity is defined in apic.c 35bb898558SAl Viro */ 36bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 37bb898558SAl Viro if ((v) <= apic_verbosity) \ 38bb898558SAl Viro printk(s, ##a); \ 39bb898558SAl Viro } while (0) 40bb898558SAl Viro 41bb898558SAl Viro 42160d8dacSIngo Molnar #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 439d87f5b6SThomas Gleixner extern void x86_32_probe_apic(void); 44160d8dacSIngo Molnar #else 459d87f5b6SThomas Gleixner static inline void x86_32_probe_apic(void) { } 46160d8dacSIngo Molnar #endif 47bb898558SAl Viro 48bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 49bb898558SAl Viro 50ec633558SQian Cai extern int apic_verbosity; 51bb898558SAl Viro extern int local_apic_timer_c2_ok; 52bb898558SAl Viro 5349062454SThomas Gleixner extern bool apic_is_disabled; 5452ae346bSDaniel Drake extern unsigned int lapic_timer_period; 550939e4fdSIngo Molnar 567e75178aSDavid Woodhouse extern int cpuid_to_apicid[]; 577e75178aSDavid Woodhouse 584f45ed9fSDou Liyang extern enum apic_intr_mode_id apic_intr_mode; 594f45ed9fSDou Liyang enum apic_intr_mode_id { 604f45ed9fSDou Liyang APIC_PIC, 614f45ed9fSDou Liyang APIC_VIRTUAL_WIRE, 624f45ed9fSDou Liyang APIC_VIRTUAL_WIRE_NO_CONFIG, 634f45ed9fSDou Liyang APIC_SYMMETRIC_IO, 644f45ed9fSDou Liyang APIC_SYMMETRIC_IO_NO_ROUTING 654f45ed9fSDou Liyang }; 664f45ed9fSDou Liyang 67bb898558SAl Viro /* 688312136fSCyrill Gorcunov * With 82489DX we can't rely on apic feature bit 698312136fSCyrill Gorcunov * retrieved via cpuid but still have to deal with 708312136fSCyrill Gorcunov * such an apic chip so we assume that SMP configuration 718312136fSCyrill Gorcunov * is found from MP table (64bit case uses ACPI mostly 728312136fSCyrill Gorcunov * which set smp presence flag as well so we are safe 738312136fSCyrill Gorcunov * to use this helper too). 748312136fSCyrill Gorcunov */ 758312136fSCyrill Gorcunov static inline bool apic_from_smp_config(void) 768312136fSCyrill Gorcunov { 7749062454SThomas Gleixner return smp_found_config && !apic_is_disabled; 788312136fSCyrill Gorcunov } 798312136fSCyrill Gorcunov 808312136fSCyrill Gorcunov /* 81bb898558SAl Viro * Basic functions accessing APICs. 82bb898558SAl Viro */ 83bb898558SAl Viro #ifdef CONFIG_PARAVIRT 84bb898558SAl Viro #include <asm/paravirt.h> 85bb898558SAl Viro #endif 86bb898558SAl Viro 87bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 88bb898558SAl Viro { 89bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 90bb898558SAl Viro 91a930dc45SBorislav Petkov alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP, 92bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 93bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 94bb898558SAl Viro } 95bb898558SAl Viro 96bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 97bb898558SAl Viro { 98bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 99bb898558SAl Viro } 100bb898558SAl Viro 101c1eeb2deSYinghai Lu extern u32 native_safe_apic_wait_icr_idle(void); 102c1eeb2deSYinghai Lu extern void native_apic_icr_write(u32 low, u32 id); 103c1eeb2deSYinghai Lu extern u64 native_apic_icr_read(void); 104c1eeb2deSYinghai Lu 1058d806960SThomas Gleixner static inline bool apic_is_x2apic_enabled(void) 1068d806960SThomas Gleixner { 1078d806960SThomas Gleixner u64 msr; 1088d806960SThomas Gleixner 1098d806960SThomas Gleixner if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) 1108d806960SThomas Gleixner return false; 1118d806960SThomas Gleixner return msr & X2APIC_ENABLE; 1128d806960SThomas Gleixner } 1138d806960SThomas Gleixner 114e02ae387SPaolo Bonzini extern void enable_IR_x2apic(void); 115e02ae387SPaolo Bonzini 116e02ae387SPaolo Bonzini extern int get_physical_broadcast(void); 117e02ae387SPaolo Bonzini 118e02ae387SPaolo Bonzini extern int lapic_get_maxlvt(void); 119e02ae387SPaolo Bonzini extern void clear_local_APIC(void); 120e02ae387SPaolo Bonzini extern void disconnect_bsp_APIC(int virt_wire_setup); 121e02ae387SPaolo Bonzini extern void disable_local_APIC(void); 12260dcaad5SThomas Gleixner extern void apic_soft_disable(void); 123e02ae387SPaolo Bonzini extern void lapic_shutdown(void); 124e02ae387SPaolo Bonzini extern void sync_Arb_IDs(void); 125fc90ccfdSVille Syrjälä extern void init_bsp_APIC(void); 12697992387SThomas Gleixner extern void apic_intr_mode_select(void); 1274b1669e8SDou Liyang extern void apic_intr_mode_init(void); 128e02ae387SPaolo Bonzini extern void init_apic_mappings(void); 129e02ae387SPaolo Bonzini void register_lapic_address(unsigned long address); 130e02ae387SPaolo Bonzini extern void setup_boot_APIC_clock(void); 131e02ae387SPaolo Bonzini extern void setup_secondary_APIC_clock(void); 1326731b0d6SNicolai Stange extern void lapic_update_tsc_freq(void); 133e02ae387SPaolo Bonzini 134e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 1351751adedSThomas Gleixner static inline bool apic_force_enable(unsigned long addr) 136e02ae387SPaolo Bonzini { 1371751adedSThomas Gleixner return false; 138e02ae387SPaolo Bonzini } 139e02ae387SPaolo Bonzini #else 1401751adedSThomas Gleixner extern bool apic_force_enable(unsigned long addr); 141e02ae387SPaolo Bonzini #endif 142e02ae387SPaolo Bonzini 143e02ae387SPaolo Bonzini extern void apic_ap_setup(void); 144e02ae387SPaolo Bonzini 145e02ae387SPaolo Bonzini /* 146e02ae387SPaolo Bonzini * On 32bit this is mach-xxx local 147e02ae387SPaolo Bonzini */ 148e02ae387SPaolo Bonzini #ifdef CONFIG_X86_64 149e02ae387SPaolo Bonzini extern int apic_is_clustered_box(void); 150e02ae387SPaolo Bonzini #else 151e02ae387SPaolo Bonzini static inline int apic_is_clustered_box(void) 152e02ae387SPaolo Bonzini { 153e02ae387SPaolo Bonzini return 0; 154e02ae387SPaolo Bonzini } 155e02ae387SPaolo Bonzini #endif 156e02ae387SPaolo Bonzini 157e02ae387SPaolo Bonzini extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask); 1580fa115daSThomas Gleixner extern void lapic_assign_system_vectors(void); 1590fa115daSThomas Gleixner extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace); 1607d65f9e8SThomas Gleixner extern void lapic_update_legacy_vectors(void); 1610fa115daSThomas Gleixner extern void lapic_online(void); 1620fa115daSThomas Gleixner extern void lapic_offline(void); 163c8c40767SThomas Gleixner extern bool apic_needs_pit(void); 164e02ae387SPaolo Bonzini 16522ca7ee9SThomas Gleixner extern void apic_send_IPI_allbutself(unsigned int vector); 16622ca7ee9SThomas Gleixner 167e02ae387SPaolo Bonzini #else /* !CONFIG_X86_LOCAL_APIC */ 168e02ae387SPaolo Bonzini static inline void lapic_shutdown(void) { } 169e02ae387SPaolo Bonzini #define local_apic_timer_c2_ok 1 170e02ae387SPaolo Bonzini static inline void init_apic_mappings(void) { } 171e02ae387SPaolo Bonzini static inline void disable_local_APIC(void) { } 172e02ae387SPaolo Bonzini # define setup_boot_APIC_clock x86_init_noop 173e02ae387SPaolo Bonzini # define setup_secondary_APIC_clock x86_init_noop 1746731b0d6SNicolai Stange static inline void lapic_update_tsc_freq(void) { } 175ccf5355dSDou Liyang static inline void init_bsp_APIC(void) { } 17697992387SThomas Gleixner static inline void apic_intr_mode_select(void) { } 1774b1669e8SDou Liyang static inline void apic_intr_mode_init(void) { } 1780fa115daSThomas Gleixner static inline void lapic_assign_system_vectors(void) { } 1790fa115daSThomas Gleixner static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { } 180c8c40767SThomas Gleixner static inline bool apic_needs_pit(void) { return true; } 181e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_LOCAL_APIC */ 182e02ae387SPaolo Bonzini 183d0b03bd1SHan, Weidong #ifdef CONFIG_X86_X2APIC 184bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 185bb898558SAl Viro { 186bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 187bb898558SAl Viro reg == APIC_LVR) 188bb898558SAl Viro return; 189bb898558SAl Viro 190bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 191bb898558SAl Viro } 192bb898558SAl Viro 1930ab711aeSMichael S. Tsirkin static inline void native_apic_msr_eoi_write(u32 reg, u32 v) 1940ab711aeSMichael S. Tsirkin { 195a585df8eSBorislav Petkov __wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0); 1960ab711aeSMichael S. Tsirkin } 1970ab711aeSMichael S. Tsirkin 198bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 199bb898558SAl Viro { 2000059b243SAndi Kleen u64 msr; 201bb898558SAl Viro 202bb898558SAl Viro if (reg == APIC_DFR) 203bb898558SAl Viro return -1; 204bb898558SAl Viro 2050059b243SAndi Kleen rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); 2060059b243SAndi Kleen return (u32)msr; 207bb898558SAl Viro } 208bb898558SAl Viro 209c1eeb2deSYinghai Lu static inline void native_x2apic_icr_write(u32 low, u32 id) 210c1eeb2deSYinghai Lu { 211c1eeb2deSYinghai Lu wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); 212c1eeb2deSYinghai Lu } 213c1eeb2deSYinghai Lu 214c1eeb2deSYinghai Lu static inline u64 native_x2apic_icr_read(void) 215c1eeb2deSYinghai Lu { 216c1eeb2deSYinghai Lu unsigned long val; 217c1eeb2deSYinghai Lu 218c1eeb2deSYinghai Lu rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); 219c1eeb2deSYinghai Lu return val; 220c1eeb2deSYinghai Lu } 221c1eeb2deSYinghai Lu 22281a46dd8SThomas Gleixner extern int x2apic_mode; 223fc1edaf9SSuresh Siddha extern int x2apic_phys; 22426573a97SDavid Woodhouse extern void __init x2apic_set_max_apicid(u32 apicid); 225659006bfSThomas Gleixner extern void x2apic_setup(void); 226bb898558SAl Viro static inline int x2apic_enabled(void) 227bb898558SAl Viro { 22862436a4dSBorislav Petkov return boot_cpu_has(X86_FEATURE_X2APIC) && apic_is_x2apic_enabled(); 229bb898558SAl Viro } 230fc1edaf9SSuresh Siddha 23162436a4dSBorislav Petkov #define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC)) 232e02ae387SPaolo Bonzini #else /* !CONFIG_X86_X2APIC */ 233659006bfSThomas Gleixner static inline void x2apic_setup(void) { } 23455eae7deSThomas Gleixner static inline int x2apic_enabled(void) { return 0; } 235d10a9044SThomas Gleixner static inline u32 native_apic_msr_read(u32 reg) { BUG(); } 23681a46dd8SThomas Gleixner #define x2apic_mode (0) 23781a46dd8SThomas Gleixner #define x2apic_supported() (0) 238e02ae387SPaolo Bonzini #endif /* !CONFIG_X86_X2APIC */ 239e3998434SMateusz Jończyk extern void __init check_x2apic(void); 240bb898558SAl Viro 2410e24f7c9SThomas Gleixner struct irq_data; 2420e24f7c9SThomas Gleixner 243e2780a68SIngo Molnar /* 244e2780a68SIngo Molnar * Copyright 2004 James Cleverdon, IBM. 245e2780a68SIngo Molnar * 246e2780a68SIngo Molnar * Generic APIC sub-arch data struct. 247e2780a68SIngo Molnar * 248e2780a68SIngo Molnar * Hacked for x86-64 by James Cleverdon from i386 architecture code by 249e2780a68SIngo Molnar * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and 250e2780a68SIngo Molnar * James Cleverdon. 251e2780a68SIngo Molnar */ 252be163a15SIngo Molnar struct apic { 25372f48a38SThomas Gleixner /* Hotpath functions first */ 25472f48a38SThomas Gleixner void (*eoi_write)(u32 reg, u32 v); 25572f48a38SThomas Gleixner void (*native_eoi_write)(u32 reg, u32 v); 25672f48a38SThomas Gleixner void (*write)(u32 reg, u32 v); 25772f48a38SThomas Gleixner u32 (*read)(u32 reg); 258e2780a68SIngo Molnar 25972f48a38SThomas Gleixner /* IPI related functions */ 26072f48a38SThomas Gleixner void (*wait_icr_idle)(void); 26172f48a38SThomas Gleixner u32 (*safe_wait_icr_idle)(void); 26272f48a38SThomas Gleixner 26372f48a38SThomas Gleixner void (*send_IPI)(int cpu, int vector); 26472f48a38SThomas Gleixner void (*send_IPI_mask)(const struct cpumask *mask, int vector); 26572f48a38SThomas Gleixner void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); 26672f48a38SThomas Gleixner void (*send_IPI_allbutself)(int vector); 26772f48a38SThomas Gleixner void (*send_IPI_all)(int vector); 26872f48a38SThomas Gleixner void (*send_IPI_self)(int vector); 26972f48a38SThomas Gleixner 27072f48a38SThomas Gleixner u32 disable_esr; 27172161299SThomas Gleixner 27272161299SThomas Gleixner enum apic_delivery_modes delivery_mode; 2738c44963bSThomas Gleixner bool dest_mode_logical; 27472f48a38SThomas Gleixner 2759f9e3bb1SThomas Gleixner u32 (*calc_dest_apicid)(unsigned int cpu); 27672f48a38SThomas Gleixner 27772f48a38SThomas Gleixner /* ICR related functions */ 27872f48a38SThomas Gleixner u64 (*icr_read)(void); 27972f48a38SThomas Gleixner void (*icr_write)(u32 low, u32 high); 28072f48a38SThomas Gleixner 28172f48a38SThomas Gleixner /* Probe, setup and smpboot functions */ 282e2780a68SIngo Molnar int (*probe)(void); 283e2780a68SIngo Molnar int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); 284a774635dSLi RongQing int (*apic_id_valid)(u32 apicid); 2855a3a46bdSThomas Gleixner bool (*apic_id_registered)(void); 286e2780a68SIngo Molnar 28757e0aa44SThomas Gleixner bool (*check_apicid_used)(physid_mask_t *map, int apicid); 288e2780a68SIngo Molnar void (*init_apic_ldr)(void); 2897abc0753SCyrill Gorcunov void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); 290e2780a68SIngo Molnar int (*cpu_present_to_apicid)(int mps_cpu); 291e2780a68SIngo Molnar int (*phys_pkg_id)(int cpuid_apic, int index_msb); 292e2780a68SIngo Molnar 29372f48a38SThomas Gleixner u32 (*get_apic_id)(unsigned long x); 294727657e6SThomas Gleixner u32 (*set_apic_id)(unsigned int id); 295e2780a68SIngo Molnar 296e2780a68SIngo Molnar /* wakeup_secondary_cpu */ 2971f5bcabfSIngo Molnar int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); 298ff2e6468SSean Christopherson /* wakeup secondary CPU using 64-bit wakeup point */ 299ff2e6468SSean Christopherson int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); 300e2780a68SIngo Molnar 30172f48a38SThomas Gleixner char *name; 302e2780a68SIngo Molnar }; 303e2780a68SIngo Molnar 3040917c01fSIngo Molnar /* 3050917c01fSIngo Molnar * Pointer to the local APIC driver in use on this system (there's 3060917c01fSIngo Molnar * always just one such driver in use - the kernel decides via an 3070917c01fSIngo Molnar * early probing process which one it picks - and then sticks to it): 3080917c01fSIngo Molnar */ 309be163a15SIngo Molnar extern struct apic *apic; 3100917c01fSIngo Molnar 3110917c01fSIngo Molnar /* 312107e0e0cSSuresh Siddha * APIC drivers are probed based on how they are listed in the .apicdrivers 313107e0e0cSSuresh Siddha * section. So the order is important and enforced by the ordering 314107e0e0cSSuresh Siddha * of different apic driver files in the Makefile. 315107e0e0cSSuresh Siddha * 316107e0e0cSSuresh Siddha * For the files having two apic drivers, we use apic_drivers() 317107e0e0cSSuresh Siddha * to enforce the order with in them. 318107e0e0cSSuresh Siddha */ 319107e0e0cSSuresh Siddha #define apic_driver(sym) \ 32075fdd155SAndi Kleen static const struct apic *__apicdrivers_##sym __used \ 321107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 32233def849SJoe Perches __section(".apicdrivers") = { &sym } 323107e0e0cSSuresh Siddha 324107e0e0cSSuresh Siddha #define apic_drivers(sym1, sym2) \ 325107e0e0cSSuresh Siddha static struct apic *__apicdrivers_##sym1##sym2[2] __used \ 326107e0e0cSSuresh Siddha __aligned(sizeof(struct apic *)) \ 32733def849SJoe Perches __section(".apicdrivers") = { &sym1, &sym2 } 328107e0e0cSSuresh Siddha 329107e0e0cSSuresh Siddha extern struct apic *__apicdrivers[], *__apicdrivers_end[]; 330107e0e0cSSuresh Siddha 331107e0e0cSSuresh Siddha /* 3320917c01fSIngo Molnar * APIC functionality to boot other CPUs - only used on SMP: 3330917c01fSIngo Molnar */ 3340917c01fSIngo Molnar #ifdef CONFIG_SMP 3352cffad7bSThomas Gleixner extern int lapic_can_unplug_cpu(void); 3360917c01fSIngo Molnar #endif 337e2780a68SIngo Molnar 338d674cd19SCyrill Gorcunov #ifdef CONFIG_X86_LOCAL_APIC 339346b46beSFernando Luis Vázquez Cao 340e2780a68SIngo Molnar static inline u32 apic_read(u32 reg) 341e2780a68SIngo Molnar { 342e2780a68SIngo Molnar return apic->read(reg); 343e2780a68SIngo Molnar } 344e2780a68SIngo Molnar 345e2780a68SIngo Molnar static inline void apic_write(u32 reg, u32 val) 346e2780a68SIngo Molnar { 347e2780a68SIngo Molnar apic->write(reg, val); 348e2780a68SIngo Molnar } 349e2780a68SIngo Molnar 3502a43195dSMichael S. Tsirkin static inline void apic_eoi(void) 3512a43195dSMichael S. Tsirkin { 3522a43195dSMichael S. Tsirkin apic->eoi_write(APIC_EOI, APIC_EOI_ACK); 3532a43195dSMichael S. Tsirkin } 3542a43195dSMichael S. Tsirkin 355e2780a68SIngo Molnar static inline u64 apic_icr_read(void) 356e2780a68SIngo Molnar { 357e2780a68SIngo Molnar return apic->icr_read(); 358e2780a68SIngo Molnar } 359e2780a68SIngo Molnar 360e2780a68SIngo Molnar static inline void apic_icr_write(u32 low, u32 high) 361e2780a68SIngo Molnar { 362e2780a68SIngo Molnar apic->icr_write(low, high); 363e2780a68SIngo Molnar } 364e2780a68SIngo Molnar 365e2780a68SIngo Molnar static inline void apic_wait_icr_idle(void) 366e2780a68SIngo Molnar { 367ee513d9dSThomas Gleixner if (apic->wait_icr_idle) 368e2780a68SIngo Molnar apic->wait_icr_idle(); 369e2780a68SIngo Molnar } 370e2780a68SIngo Molnar 371e2780a68SIngo Molnar static inline u32 safe_apic_wait_icr_idle(void) 372e2780a68SIngo Molnar { 373*13d779fdSThomas Gleixner return apic->safe_wait_icr_idle ? apic->safe_wait_icr_idle() : 0; 374e2780a68SIngo Molnar } 375e2780a68SIngo Molnar 3761551df64SMichael S. Tsirkin extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); 3771551df64SMichael S. Tsirkin 378d674cd19SCyrill Gorcunov #else /* CONFIG_X86_LOCAL_APIC */ 379d674cd19SCyrill Gorcunov 380d674cd19SCyrill Gorcunov static inline u32 apic_read(u32 reg) { return 0; } 381d674cd19SCyrill Gorcunov static inline void apic_write(u32 reg, u32 val) { } 3822a43195dSMichael S. Tsirkin static inline void apic_eoi(void) { } 383d674cd19SCyrill Gorcunov static inline u64 apic_icr_read(void) { return 0; } 384d674cd19SCyrill Gorcunov static inline void apic_icr_write(u32 low, u32 high) { } 385d674cd19SCyrill Gorcunov static inline void apic_wait_icr_idle(void) { } 386d674cd19SCyrill Gorcunov static inline u32 safe_apic_wait_icr_idle(void) { return 0; } 3871551df64SMichael S. Tsirkin static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {} 388d674cd19SCyrill Gorcunov 389d674cd19SCyrill Gorcunov #endif /* CONFIG_X86_LOCAL_APIC */ 390e2780a68SIngo Molnar 391c0255770SThomas Gleixner extern void apic_ack_irq(struct irq_data *data); 392c0255770SThomas Gleixner 393e2780a68SIngo Molnar static inline void ack_APIC_irq(void) 394e2780a68SIngo Molnar { 395e2780a68SIngo Molnar /* 396e2780a68SIngo Molnar * ack_APIC_irq() actually gets compiled as a single instruction 397e2780a68SIngo Molnar * ... yummie. 398e2780a68SIngo Molnar */ 3992a43195dSMichael S. Tsirkin apic_eoi(); 400e2780a68SIngo Molnar } 401e2780a68SIngo Molnar 4026f1a4891SThomas Gleixner 4036f1a4891SThomas Gleixner static inline bool lapic_vector_set_in_irr(unsigned int vector) 4046f1a4891SThomas Gleixner { 4056f1a4891SThomas Gleixner u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); 4066f1a4891SThomas Gleixner 4076f1a4891SThomas Gleixner return !!(irr & (1U << (vector % 32))); 4086f1a4891SThomas Gleixner } 4096f1a4891SThomas Gleixner 410e2780a68SIngo Molnar static inline unsigned default_get_apic_id(unsigned long x) 411e2780a68SIngo Molnar { 412e2780a68SIngo Molnar unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 413e2780a68SIngo Molnar 41442937e81SAndreas Herrmann if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID)) 415e2780a68SIngo Molnar return (x >> 24) & 0xFF; 416e2780a68SIngo Molnar else 417e2780a68SIngo Molnar return (x >> 24) & 0x0F; 418e2780a68SIngo Molnar } 419e2780a68SIngo Molnar 420e2780a68SIngo Molnar /* 4216ab1b27cSDavid Rientjes * Warm reset vector position: 422e2780a68SIngo Molnar */ 4236ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_LOW 0x467 4246ab1b27cSDavid Rientjes #define TRAMPOLINE_PHYS_HIGH 0x469 425e2780a68SIngo Molnar 426838312beSJan Beulich extern void generic_bigsmp_probe(void); 427e2780a68SIngo Molnar 428e2780a68SIngo Molnar #ifdef CONFIG_X86_LOCAL_APIC 429e2780a68SIngo Molnar 430e2780a68SIngo Molnar #include <asm/smp.h> 431e2780a68SIngo Molnar 43283a10522SThomas Gleixner extern struct apic apic_noop; 433e2780a68SIngo Molnar 434e2780a68SIngo Molnar static inline unsigned int read_apic_id(void) 435e2780a68SIngo Molnar { 43683a10522SThomas Gleixner unsigned int reg = apic_read(APIC_ID); 437e2780a68SIngo Molnar 438e2780a68SIngo Molnar return apic->get_apic_id(reg); 439e2780a68SIngo Molnar } 440e2780a68SIngo Molnar 441f39642d0SKuppuswamy Sathyanarayanan #ifdef CONFIG_X86_64 442f39642d0SKuppuswamy Sathyanarayanan typedef int (*wakeup_cpu_handler)(int apicid, unsigned long start_eip); 443f39642d0SKuppuswamy Sathyanarayanan extern void acpi_wake_cpu_handler_update(wakeup_cpu_handler handler); 444d75baa26SThomas Gleixner extern int default_acpi_madt_oem_check(char *, char *); 4459d87f5b6SThomas Gleixner extern void x86_64_probe_apic(void); 446d75baa26SThomas Gleixner #else 447d75baa26SThomas Gleixner static inline int default_acpi_madt_oem_check(char *a, char *b) { return 0; } 4489d87f5b6SThomas Gleixner static inline void x86_64_probe_apic(void) { } 449f39642d0SKuppuswamy Sathyanarayanan #endif 450f39642d0SKuppuswamy Sathyanarayanan 451a774635dSLi RongQing extern int default_apic_id_valid(u32 apicid); 4529f9e3bb1SThomas Gleixner 4539f9e3bb1SThomas Gleixner extern u32 apic_default_calc_apicid(unsigned int cpu); 4549f9e3bb1SThomas Gleixner extern u32 apic_flat_calc_apicid(unsigned int cpu); 4559f9e3bb1SThomas Gleixner 45683a10522SThomas Gleixner extern bool default_check_apicid_used(physid_mask_t *map, int apicid); 45783a10522SThomas Gleixner extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap); 458e2780a68SIngo Molnar extern int default_cpu_present_to_apicid(int mps_cpu); 459e2780a68SIngo Molnar 460a6625b47SThomas Gleixner #else /* CONFIG_X86_LOCAL_APIC */ 461a6625b47SThomas Gleixner 462a6625b47SThomas Gleixner static inline unsigned int read_apic_id(void) { return 0; } 463a6625b47SThomas Gleixner 464a6625b47SThomas Gleixner #endif /* !CONFIG_X86_LOCAL_APIC */ 46583a10522SThomas Gleixner 4666a4d2657SThomas Gleixner #ifdef CONFIG_SMP 4676a1cb5f5SThomas Gleixner void apic_smt_update(void); 4686a4d2657SThomas Gleixner #else 4696a1cb5f5SThomas Gleixner static inline void apic_smt_update(void) { } 4706a4d2657SThomas Gleixner #endif 4716a4d2657SThomas Gleixner 472b0a19555SThomas Gleixner struct msi_msg; 473f598181aSDavid Woodhouse struct irq_cfg; 474b0a19555SThomas Gleixner 475f598181aSDavid Woodhouse extern void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg, 476f598181aSDavid Woodhouse bool dmar); 477b0a19555SThomas Gleixner 47817405453SYoshihiro YUNOMAE extern void ioapic_zap_locks(void); 47917405453SYoshihiro YUNOMAE 4801965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 481